1 | /* ----------------------------------------------------------------------
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2 | * Project: CMSIS DSP Library
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3 | * Title: arm_shift_q7.c
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4 | * Description: Processing function for the Q7 Shifting
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5 | *
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6 | * $Date: 27. January 2017
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7 | * $Revision: V.1.5.1
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8 | *
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9 | * Target Processor: Cortex-M cores
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10 | * -------------------------------------------------------------------- */
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11 | /*
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12 | * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
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13 | *
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14 | * SPDX-License-Identifier: Apache-2.0
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15 | *
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16 | * Licensed under the Apache License, Version 2.0 (the License); you may
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17 | * not use this file except in compliance with the License.
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18 | * You may obtain a copy of the License at
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19 | *
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20 | * www.apache.org/licenses/LICENSE-2.0
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21 | *
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22 | * Unless required by applicable law or agreed to in writing, software
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23 | * distributed under the License is distributed on an AS IS BASIS, WITHOUT
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24 | * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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25 | * See the License for the specific language governing permissions and
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26 | * limitations under the License.
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27 | */
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28 |
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29 | #include "arm_math.h"
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30 |
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31 | /**
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32 | * @ingroup groupMath
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33 | */
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34 |
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35 | /**
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36 | * @addtogroup shift
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37 | * @{
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38 | */
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39 |
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40 |
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41 | /**
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42 | * @brief Shifts the elements of a Q7 vector a specified number of bits.
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43 | * @param[in] *pSrc points to the input vector
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44 | * @param[in] shiftBits number of bits to shift. A positive value shifts left; a negative value shifts right.
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45 | * @param[out] *pDst points to the output vector
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46 | * @param[in] blockSize number of samples in the vector
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47 | * @return none.
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48 | *
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49 | * \par Conditions for optimum performance
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50 | * Input and output buffers should be aligned by 32-bit
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51 | *
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52 | *
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53 | * <b>Scaling and Overflow Behavior:</b>
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54 | * \par
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55 | * The function uses saturating arithmetic.
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56 | * Results outside of the allowable Q7 range [0x8 0x7F] will be saturated.
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57 | */
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58 |
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59 | void arm_shift_q7(
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60 | q7_t * pSrc,
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61 | int8_t shiftBits,
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62 | q7_t * pDst,
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63 | uint32_t blockSize)
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64 | {
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65 | uint32_t blkCnt; /* loop counter */
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66 | uint8_t sign; /* Sign of shiftBits */
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67 |
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68 | #if defined (ARM_MATH_DSP)
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69 |
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70 | /* Run the below code for Cortex-M4 and Cortex-M3 */
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71 | q7_t in1; /* Input value1 */
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72 | q7_t in2; /* Input value2 */
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73 | q7_t in3; /* Input value3 */
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74 | q7_t in4; /* Input value4 */
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75 |
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76 |
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77 | /*loop Unrolling */
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78 | blkCnt = blockSize >> 2U;
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79 |
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80 | /* Getting the sign of shiftBits */
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81 | sign = (shiftBits & 0x80);
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82 |
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83 | /* If the shift value is positive then do right shift else left shift */
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84 | if (sign == 0U)
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85 | {
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86 | /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
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87 | ** a second loop below computes the remaining 1 to 3 samples. */
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88 | while (blkCnt > 0U)
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89 | {
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90 | /* C = A << shiftBits */
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91 | /* Read 4 inputs */
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92 | in1 = *pSrc;
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93 | in2 = *(pSrc + 1);
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94 | in3 = *(pSrc + 2);
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95 | in4 = *(pSrc + 3);
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96 |
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97 | /* Store the Shifted result in the destination buffer in single cycle by packing the outputs */
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98 | *__SIMD32(pDst)++ = __PACKq7(__SSAT((in1 << shiftBits), 8),
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99 | __SSAT((in2 << shiftBits), 8),
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100 | __SSAT((in3 << shiftBits), 8),
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101 | __SSAT((in4 << shiftBits), 8));
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102 | /* Update source pointer to process next sampels */
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103 | pSrc += 4U;
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104 |
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105 | /* Decrement the loop counter */
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106 | blkCnt--;
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107 | }
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108 |
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109 | /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
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110 | ** No loop unrolling is used. */
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111 | blkCnt = blockSize % 0x4U;
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112 |
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113 | while (blkCnt > 0U)
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114 | {
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115 | /* C = A << shiftBits */
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116 | /* Shift the input and then store the result in the destination buffer. */
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117 | *pDst++ = (q7_t) __SSAT((*pSrc++ << shiftBits), 8);
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118 |
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119 | /* Decrement the loop counter */
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120 | blkCnt--;
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121 | }
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122 | }
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123 | else
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124 | {
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125 | shiftBits = -shiftBits;
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126 | /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
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127 | ** a second loop below computes the remaining 1 to 3 samples. */
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128 | while (blkCnt > 0U)
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129 | {
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130 | /* C = A >> shiftBits */
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131 | /* Read 4 inputs */
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132 | in1 = *pSrc;
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133 | in2 = *(pSrc + 1);
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134 | in3 = *(pSrc + 2);
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135 | in4 = *(pSrc + 3);
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136 |
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137 | /* Store the Shifted result in the destination buffer in single cycle by packing the outputs */
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138 | *__SIMD32(pDst)++ = __PACKq7((in1 >> shiftBits), (in2 >> shiftBits),
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139 | (in3 >> shiftBits), (in4 >> shiftBits));
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140 |
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141 |
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142 | pSrc += 4U;
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143 |
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144 | /* Decrement the loop counter */
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145 | blkCnt--;
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146 | }
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147 |
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148 | /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
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149 | ** No loop unrolling is used. */
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150 | blkCnt = blockSize % 0x4U;
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151 |
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152 | while (blkCnt > 0U)
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153 | {
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154 | /* C = A >> shiftBits */
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155 | /* Shift the input and then store the result in the destination buffer. */
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156 | in1 = *pSrc++;
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157 | *pDst++ = (in1 >> shiftBits);
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158 |
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159 | /* Decrement the loop counter */
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160 | blkCnt--;
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161 | }
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162 | }
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163 |
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164 | #else
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165 |
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166 | /* Run the below code for Cortex-M0 */
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167 |
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168 | /* Getting the sign of shiftBits */
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169 | sign = (shiftBits & 0x80);
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170 |
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171 | /* If the shift value is positive then do right shift else left shift */
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172 | if (sign == 0U)
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173 | {
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174 | /* Initialize blkCnt with number of samples */
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175 | blkCnt = blockSize;
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176 |
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177 | while (blkCnt > 0U)
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178 | {
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179 | /* C = A << shiftBits */
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180 | /* Shift the input and then store the result in the destination buffer. */
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181 | *pDst++ = (q7_t) __SSAT(((q15_t) * pSrc++ << shiftBits), 8);
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182 |
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183 | /* Decrement the loop counter */
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184 | blkCnt--;
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185 | }
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186 | }
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187 | else
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188 | {
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189 | /* Initialize blkCnt with number of samples */
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190 | blkCnt = blockSize;
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191 |
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192 | while (blkCnt > 0U)
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193 | {
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194 | /* C = A >> shiftBits */
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195 | /* Shift the input and then store the result in the destination buffer. */
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196 | *pDst++ = (*pSrc++ >> -shiftBits);
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197 |
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198 | /* Decrement the loop counter */
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199 | blkCnt--;
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200 | }
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201 | }
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202 |
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203 | #endif /* #if defined (ARM_MATH_DSP) */
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204 | }
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205 |
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206 | /**
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207 | * @} end of shift group
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208 | */
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