1 | /**
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2 | ******************************************************************************
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3 | * @file startup_stm32f410rx.s
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4 | * @author MCD Application Team
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5 | * @brief STM32F410Rx Devices vector table for GCC based toolchains.
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6 | * This module performs:
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7 | * - Set the initial SP
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8 | * - Set the initial PC == Reset_Handler,
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9 | * - Set the vector table entries with the exceptions ISR address
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10 | * - Branches to main in the C library (which eventually
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11 | * calls main()).
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12 | * After Reset the Cortex-M4 processor is in Thread mode,
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13 | * priority is Privileged, and the Stack is set to Main.
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14 | ******************************************************************************
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15 | * @attention
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16 | *
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17 | * <h2><center>© Copyright (c) 2017 STMicroelectronics.
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18 | * All rights reserved.</center></h2>
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19 | *
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20 | * This software component is licensed by ST under BSD 3-Clause license,
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21 | * the "License"; You may not use this file except in compliance with the
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22 | * License. You may obtain a copy of the License at:
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23 | * opensource.org/licenses/BSD-3-Clause
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24 | *
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25 | ******************************************************************************
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26 | */
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27 |
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28 | .syntax unified
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29 | .cpu cortex-m4
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30 | .fpu softvfp
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31 | .thumb
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32 |
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33 | .global g_pfnVectors
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34 | .global Default_Handler
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35 |
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36 | /* start address for the initialization values of the .data section.
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37 | defined in linker script */
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38 | .word _sidata
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39 | /* start address for the .data section. defined in linker script */
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40 | .word _sdata
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41 | /* end address for the .data section. defined in linker script */
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42 | .word _edata
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43 | /* start address for the .bss section. defined in linker script */
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44 | .word _sbss
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45 | /* end address for the .bss section. defined in linker script */
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46 | .word _ebss
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47 | /* stack used for SystemInit_ExtMemCtl; always internal RAM used */
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48 |
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49 | /**
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50 | * @brief This is the code that gets called when the processor first
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51 | * starts execution following a reset event. Only the absolutely
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52 | * necessary set is performed, after which the application
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53 | * supplied main() routine is called.
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54 | * @param None
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55 | * @retval : None
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56 | */
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57 |
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58 | .section .text.Reset_Handler
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59 | .weak Reset_Handler
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60 | .type Reset_Handler, %function
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61 | Reset_Handler:
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62 | ldr sp, =_estack /* set stack pointer */
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63 |
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64 | /* Copy the data segment initializers from flash to SRAM */
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65 | ldr r0, =_sdata
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66 | ldr r1, =_edata
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67 | ldr r2, =_sidata
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68 | movs r3, #0
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69 | b LoopCopyDataInit
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70 |
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71 | CopyDataInit:
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72 | ldr r4, [r2, r3]
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73 | str r4, [r0, r3]
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74 | adds r3, r3, #4
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75 |
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76 | LoopCopyDataInit:
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77 | adds r4, r0, r3
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78 | cmp r4, r1
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79 | bcc CopyDataInit
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80 |
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81 | /* Zero fill the bss segment. */
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82 | ldr r2, =_sbss
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83 | ldr r4, =_ebss
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84 | movs r3, #0
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85 | b LoopFillZerobss
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86 |
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87 | FillZerobss:
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88 | str r3, [r2]
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89 | adds r2, r2, #4
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90 |
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91 | LoopFillZerobss:
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92 | cmp r2, r4
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93 | bcc FillZerobss
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94 |
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95 | /* Call the clock system intitialization function.*/
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96 | bl SystemInit
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97 | /* Call static constructors */
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98 | bl __libc_init_array
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99 | /* Call the application's entry point.*/
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100 | bl main
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101 | bx lr
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102 | .size Reset_Handler, .-Reset_Handler
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103 |
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104 | /**
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105 | * @brief This is the code that gets called when the processor receives an
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106 | * unexpected interrupt. This simply enters an infinite loop, preserving
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107 | * the system state for examination by a debugger.
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108 | * @param None
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109 | * @retval None
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110 | */
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111 | .section .text.Default_Handler,"ax",%progbits
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112 | Default_Handler:
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113 | Infinite_Loop:
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114 | b Infinite_Loop
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115 | .size Default_Handler, .-Default_Handler
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116 | /******************************************************************************
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117 | *
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118 | * The minimal vector table for a Cortex M3. Note that the proper constructs
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119 | * must be placed on this to ensure that it ends up at physical address
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120 | * 0x0000.0000.
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121 | *
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122 | *******************************************************************************/
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123 | .section .isr_vector,"a",%progbits
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124 | .type g_pfnVectors, %object
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125 | .size g_pfnVectors, .-g_pfnVectors
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126 |
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127 | g_pfnVectors:
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128 | .word _estack
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129 | .word Reset_Handler
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130 | .word NMI_Handler
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131 | .word HardFault_Handler
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132 | .word MemManage_Handler
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133 | .word BusFault_Handler
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134 | .word UsageFault_Handler
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135 | .word 0
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136 | .word 0
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137 | .word 0
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138 | .word 0
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139 | .word SVC_Handler
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140 | .word DebugMon_Handler
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141 | .word 0
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142 | .word PendSV_Handler
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143 | .word SysTick_Handler
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144 |
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145 | /* External Interrupts */
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146 | .word WWDG_IRQHandler /* Window WatchDog */
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147 | .word PVD_IRQHandler /* PVD through EXTI Line detection */
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148 | .word TAMP_STAMP_IRQHandler /* Tamper and TimeStamps through the EXTI line */
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149 | .word RTC_WKUP_IRQHandler /* RTC Wakeup through the EXTI line */
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150 | .word FLASH_IRQHandler /* FLASH */
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151 | .word RCC_IRQHandler /* RCC */
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152 | .word EXTI0_IRQHandler /* EXTI Line0 */
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153 | .word EXTI1_IRQHandler /* EXTI Line1 */
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154 | .word EXTI2_IRQHandler /* EXTI Line2 */
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155 | .word EXTI3_IRQHandler /* EXTI Line3 */
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156 | .word EXTI4_IRQHandler /* EXTI Line4 */
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157 | .word DMA1_Stream0_IRQHandler /* DMA1 Stream 0 */
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158 | .word DMA1_Stream1_IRQHandler /* DMA1 Stream 1 */
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159 | .word DMA1_Stream2_IRQHandler /* DMA1 Stream 2 */
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160 | .word DMA1_Stream3_IRQHandler /* DMA1 Stream 3 */
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161 | .word DMA1_Stream4_IRQHandler /* DMA1 Stream 4 */
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162 | .word DMA1_Stream5_IRQHandler /* DMA1 Stream 5 */
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163 | .word DMA1_Stream6_IRQHandler /* DMA1 Stream 6 */
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164 | .word ADC_IRQHandler /* ADC1, ADC2 and ADC3s */
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165 | .word 0 /* Reserved */
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166 | .word 0 /* Reserved */
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167 | .word 0 /* Reserved */
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168 | .word 0 /* Reserved */
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169 | .word EXTI9_5_IRQHandler /* External Line[9:5]s */
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170 | .word TIM1_BRK_TIM9_IRQHandler /* TIM1 Break and TIM9 */
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171 | .word TIM1_UP_IRQHandler /* TIM1 Update */
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172 | .word TIM1_TRG_COM_TIM11_IRQHandler /* TIM1 Trigger and Commutation and TIM11 */
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173 | .word TIM1_CC_IRQHandler /* TIM1 Capture Compare */
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174 | .word 0 /* Reserved */
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175 | .word 0 /* Reserved */
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176 | .word 0 /* Reserved */
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177 | .word I2C1_EV_IRQHandler /* I2C1 Event */
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178 | .word I2C1_ER_IRQHandler /* I2C1 Error */
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179 | .word I2C2_EV_IRQHandler /* I2C2 Event */
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180 | .word I2C2_ER_IRQHandler /* I2C2 Error */
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181 | .word SPI1_IRQHandler /* SPI1 */
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182 | .word SPI2_IRQHandler /* SPI2 */
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183 | .word USART1_IRQHandler /* USART1 */
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184 | .word USART2_IRQHandler /* USART2 */
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185 | .word 0 /* Reserved */
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186 | .word EXTI15_10_IRQHandler /* External Line[15:10]s */
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187 | .word RTC_Alarm_IRQHandler /* RTC Alarm (A and B) through EXTI Line */
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188 | .word 0 /* Reserved */
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189 | .word 0 /* Reserved */
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190 | .word 0 /* Reserved */
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191 | .word 0 /* Reserved */
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192 | .word 0 /* Reserved */
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193 | .word DMA1_Stream7_IRQHandler /* DMA1 Stream7 */
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194 | .word 0 /* Reserved */
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195 | .word 0 /* Reserved */
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196 | .word TIM5_IRQHandler /* TIM5 */
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197 | .word 0 /* Reserved */
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198 | .word 0 /* Reserved */
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199 | .word 0 /* Reserved */
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200 | .word TIM6_DAC_IRQHandler /* TIM6 and DAC */
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201 | .word 0 /* Reserved */
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202 | .word DMA2_Stream0_IRQHandler /* DMA2 Stream 0 */
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203 | .word DMA2_Stream1_IRQHandler /* DMA2 Stream 1 */
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204 | .word DMA2_Stream2_IRQHandler /* DMA2 Stream 2 */
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205 | .word DMA2_Stream3_IRQHandler /* DMA2 Stream 3 */
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206 | .word DMA2_Stream4_IRQHandler /* DMA2 Stream 4 */
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207 | .word 0 /* Reserved */
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208 | .word 0 /* Reserved */
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209 | .word 0 /* Reserved */
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210 | .word 0 /* Reserved */
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211 | .word 0 /* Reserved */
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212 | .word 0 /* Reserved */
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213 | .word 0 /* Reserved */
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214 | .word DMA2_Stream5_IRQHandler /* DMA2 Stream 5 */
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215 | .word DMA2_Stream6_IRQHandler /* DMA2 Stream 6 */
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216 | .word DMA2_Stream7_IRQHandler /* DMA2 Stream 7 */
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217 | .word USART6_IRQHandler /* USART6 */
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218 | .word 0 /* Reserved */
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219 | .word 0 /* Reserved */
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220 | .word 0 /* Reserved */
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221 | .word 0 /* Reserved */
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222 | .word 0 /* Reserved */
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223 | .word 0 /* Reserved */
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224 | .word 0 /* Reserved */
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225 | .word 0 /* Reserved */
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226 | .word RNG_IRQHandler /* RNG */
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227 | .word FPU_IRQHandler /* FPU */
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228 | .word 0 /* Reserved */
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229 | .word 0 /* Reserved */
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230 | .word 0 /* Reserved */
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231 | .word SPI5_IRQHandler /* SPI5 */
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232 | .word 0 /* Reserved */
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233 | .word 0 /* Reserved */
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234 | .word 0 /* Reserved */
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235 | .word 0 /* Reserved */
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236 | .word 0 /* Reserved */
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237 | .word 0 /* Reserved */
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238 | .word 0 /* Reserved */
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239 | .word 0 /* Reserved */
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240 | .word 0 /* Reserved */
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241 | .word FMPI2C1_EV_IRQHandler /* FMPI2C1 Event */
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242 | .word FMPI2C1_ER_IRQHandler /* FMPI2C1 Error */
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243 | .word LPTIM1_IRQHandler /* LP TIM1 */
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244 |
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245 | /*******************************************************************************
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246 | *
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247 | * Provide weak aliases for each Exception handler to the Default_Handler.
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248 | * As they are weak aliases, any function with the same name will override
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249 | * this definition.
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250 | *
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251 | *******************************************************************************/
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252 | .weak NMI_Handler
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253 | .thumb_set NMI_Handler,Default_Handler
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254 |
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255 | .weak HardFault_Handler
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256 | .thumb_set HardFault_Handler,Default_Handler
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257 |
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258 | .weak MemManage_Handler
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259 | .thumb_set MemManage_Handler,Default_Handler
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260 |
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261 | .weak BusFault_Handler
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262 | .thumb_set BusFault_Handler,Default_Handler
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263 |
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264 | .weak UsageFault_Handler
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265 | .thumb_set UsageFault_Handler,Default_Handler
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266 |
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267 | .weak SVC_Handler
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268 | .thumb_set SVC_Handler,Default_Handler
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269 |
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270 | .weak DebugMon_Handler
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271 | .thumb_set DebugMon_Handler,Default_Handler
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272 |
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273 | .weak PendSV_Handler
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274 | .thumb_set PendSV_Handler,Default_Handler
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275 |
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276 | .weak SysTick_Handler
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277 | .thumb_set SysTick_Handler,Default_Handler
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278 |
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279 | .weak WWDG_IRQHandler
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280 | .thumb_set WWDG_IRQHandler,Default_Handler
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281 |
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282 | .weak PVD_IRQHandler
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283 | .thumb_set PVD_IRQHandler,Default_Handler
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284 |
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285 | .weak TAMP_STAMP_IRQHandler
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286 | .thumb_set TAMP_STAMP_IRQHandler,Default_Handler
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287 |
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288 | .weak RTC_WKUP_IRQHandler
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289 | .thumb_set RTC_WKUP_IRQHandler,Default_Handler
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290 |
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291 | .weak FLASH_IRQHandler
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292 | .thumb_set FLASH_IRQHandler,Default_Handler
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293 |
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294 | .weak RCC_IRQHandler
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295 | .thumb_set RCC_IRQHandler,Default_Handler
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296 |
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297 | .weak EXTI0_IRQHandler
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298 | .thumb_set EXTI0_IRQHandler,Default_Handler
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299 |
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300 | .weak EXTI1_IRQHandler
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301 | .thumb_set EXTI1_IRQHandler,Default_Handler
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302 |
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303 | .weak EXTI2_IRQHandler
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304 | .thumb_set EXTI2_IRQHandler,Default_Handler
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305 |
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306 | .weak EXTI3_IRQHandler
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307 | .thumb_set EXTI3_IRQHandler,Default_Handler
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308 |
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309 | .weak EXTI4_IRQHandler
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310 | .thumb_set EXTI4_IRQHandler,Default_Handler
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311 |
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312 | .weak DMA1_Stream0_IRQHandler
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313 | .thumb_set DMA1_Stream0_IRQHandler,Default_Handler
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314 |
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315 | .weak DMA1_Stream1_IRQHandler
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316 | .thumb_set DMA1_Stream1_IRQHandler,Default_Handler
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317 |
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318 | .weak DMA1_Stream2_IRQHandler
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319 | .thumb_set DMA1_Stream2_IRQHandler,Default_Handler
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320 |
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321 | .weak DMA1_Stream3_IRQHandler
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322 | .thumb_set DMA1_Stream3_IRQHandler,Default_Handler
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323 |
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324 | .weak DMA1_Stream4_IRQHandler
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325 | .thumb_set DMA1_Stream4_IRQHandler,Default_Handler
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326 |
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327 | .weak DMA1_Stream5_IRQHandler
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328 | .thumb_set DMA1_Stream5_IRQHandler,Default_Handler
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329 |
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330 | .weak DMA1_Stream6_IRQHandler
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331 | .thumb_set DMA1_Stream6_IRQHandler,Default_Handler
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332 |
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333 | .weak ADC_IRQHandler
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334 | .thumb_set ADC_IRQHandler,Default_Handler
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335 |
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336 | .weak EXTI9_5_IRQHandler
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337 | .thumb_set EXTI9_5_IRQHandler,Default_Handler
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338 |
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339 | .weak TIM1_BRK_TIM9_IRQHandler
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340 | .thumb_set TIM1_BRK_TIM9_IRQHandler,Default_Handler
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341 |
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342 | .weak TIM1_UP_IRQHandler
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343 | .thumb_set TIM1_UP_IRQHandler,Default_Handler
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344 |
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345 | .weak TIM1_TRG_COM_TIM11_IRQHandler
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346 | .thumb_set TIM1_TRG_COM_TIM11_IRQHandler,Default_Handler
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347 |
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348 | .weak TIM1_CC_IRQHandler
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349 | .thumb_set TIM1_CC_IRQHandler,Default_Handler
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350 |
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351 | .weak I2C1_EV_IRQHandler
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352 | .thumb_set I2C1_EV_IRQHandler,Default_Handler
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353 |
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354 | .weak I2C1_ER_IRQHandler
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355 | .thumb_set I2C1_ER_IRQHandler,Default_Handler
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356 |
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357 | .weak I2C2_EV_IRQHandler
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358 | .thumb_set I2C2_EV_IRQHandler,Default_Handler
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359 |
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360 | .weak I2C2_ER_IRQHandler
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361 | .thumb_set I2C2_ER_IRQHandler,Default_Handler
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362 |
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363 | .weak SPI1_IRQHandler
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364 | .thumb_set SPI1_IRQHandler,Default_Handler
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365 |
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366 | .weak SPI2_IRQHandler
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367 | .thumb_set SPI2_IRQHandler,Default_Handler
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368 |
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369 | .weak USART1_IRQHandler
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370 | .thumb_set USART1_IRQHandler,Default_Handler
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371 |
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372 | .weak USART2_IRQHandler
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373 | .thumb_set USART2_IRQHandler,Default_Handler
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374 |
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375 | .weak EXTI15_10_IRQHandler
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376 | .thumb_set EXTI15_10_IRQHandler,Default_Handler
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377 |
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378 | .weak RTC_Alarm_IRQHandler
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379 | .thumb_set RTC_Alarm_IRQHandler,Default_Handler
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380 |
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381 | .weak DMA1_Stream7_IRQHandler
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382 | .thumb_set DMA1_Stream7_IRQHandler,Default_Handler
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383 |
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384 | .weak TIM5_IRQHandler
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385 | .thumb_set TIM5_IRQHandler,Default_Handler
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386 |
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387 | .weak TIM6_DAC_IRQHandler
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388 | .thumb_set TIM6_DAC_IRQHandler,Default_Handler
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389 |
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390 | .weak DMA2_Stream0_IRQHandler
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391 | .thumb_set DMA2_Stream0_IRQHandler,Default_Handler
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392 |
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393 | .weak DMA2_Stream1_IRQHandler
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394 | .thumb_set DMA2_Stream1_IRQHandler,Default_Handler
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395 |
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396 | .weak DMA2_Stream2_IRQHandler
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397 | .thumb_set DMA2_Stream2_IRQHandler,Default_Handler
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398 |
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399 | .weak DMA2_Stream3_IRQHandler
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400 | .thumb_set DMA2_Stream3_IRQHandler,Default_Handler
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401 |
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402 | .weak DMA2_Stream4_IRQHandler
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403 | .thumb_set DMA2_Stream4_IRQHandler,Default_Handler
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404 |
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405 | .weak DMA2_Stream5_IRQHandler
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406 | .thumb_set DMA2_Stream5_IRQHandler,Default_Handler
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407 |
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408 | .weak DMA2_Stream6_IRQHandler
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409 | .thumb_set DMA2_Stream6_IRQHandler,Default_Handler
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410 |
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411 | .weak DMA2_Stream7_IRQHandler
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412 | .thumb_set DMA2_Stream7_IRQHandler,Default_Handler
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413 |
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414 | .weak USART6_IRQHandler
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415 | .thumb_set USART6_IRQHandler,Default_Handler
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416 |
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417 | .weak RNG_IRQHandler
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418 | .thumb_set RNG_IRQHandler,Default_Handler
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419 |
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420 | .weak FPU_IRQHandler
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421 | .thumb_set FPU_IRQHandler,Default_Handler
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422 |
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423 | .weak SPI5_IRQHandler
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424 | .thumb_set SPI5_IRQHandler,Default_Handler
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425 |
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426 | .weak FMPI2C1_EV_IRQHandler
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427 | .thumb_set FMPI2C1_EV_IRQHandler,Default_Handler
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428 |
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429 | .weak FMPI2C1_ER_IRQHandler
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430 | .thumb_set FMPI2C1_ER_IRQHandler,Default_Handler
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431 |
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432 | .weak LPTIM1_IRQHandler
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433 | .thumb_set LPTIM1_IRQHandler,Default_Handler
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434 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
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