source: S-port/trunk/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/startup_stm32f412rx.s@ 1

Last change on this file since 1 was 1, checked in by AlexLir, 2 years ago
File size: 21.3 KB
Line 
1/**
2 ******************************************************************************
3 * @file startup_stm32f412rx.s
4 * @author MCD Application Team
5 * @brief STM32F412Rx Devices vector table for GCC based toolchains.
6 * This module performs:
7 * - Set the initial SP
8 * - Set the initial PC == Reset_Handler,
9 * - Set the vector table entries with the exceptions ISR address
10 * - Branches to main in the C library (which eventually
11 * calls main()).
12 * After Reset the Cortex-M4 processor is in Thread mode,
13 * priority is Privileged, and the Stack is set to Main.
14 ******************************************************************************
15 * @attention
16 *
17 * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
18 * All rights reserved.</center></h2>
19 *
20 * This software component is licensed by ST under BSD 3-Clause license,
21 * the "License"; You may not use this file except in compliance with the
22 * License. You may obtain a copy of the License at:
23 * opensource.org/licenses/BSD-3-Clause
24 *
25 ******************************************************************************
26 */
27
28 .syntax unified
29 .cpu cortex-m4
30 .fpu softvfp
31 .thumb
32
33.global g_pfnVectors
34.global Default_Handler
35
36/* start address for the initialization values of the .data section.
37defined in linker script */
38.word _sidata
39/* start address for the .data section. defined in linker script */
40.word _sdata
41/* end address for the .data section. defined in linker script */
42.word _edata
43/* start address for the .bss section. defined in linker script */
44.word _sbss
45/* end address for the .bss section. defined in linker script */
46.word _ebss
47/* stack used for SystemInit_ExtMemCtl; always internal RAM used */
48
49/**
50 * @brief This is the code that gets called when the processor first
51 * starts execution following a reset event. Only the absolutely
52 * necessary set is performed, after which the application
53 * supplied main() routine is called.
54 * @param None
55 * @retval : None
56*/
57
58 .section .text.Reset_Handler
59 .weak Reset_Handler
60 .type Reset_Handler, %function
61Reset_Handler:
62 ldr sp, =_estack /* set stack pointer */
63
64/* Copy the data segment initializers from flash to SRAM */
65 ldr r0, =_sdata
66 ldr r1, =_edata
67 ldr r2, =_sidata
68 movs r3, #0
69 b LoopCopyDataInit
70
71CopyDataInit:
72 ldr r4, [r2, r3]
73 str r4, [r0, r3]
74 adds r3, r3, #4
75
76LoopCopyDataInit:
77 adds r4, r0, r3
78 cmp r4, r1
79 bcc CopyDataInit
80
81/* Zero fill the bss segment. */
82 ldr r2, =_sbss
83 ldr r4, =_ebss
84 movs r3, #0
85 b LoopFillZerobss
86
87FillZerobss:
88 str r3, [r2]
89 adds r2, r2, #4
90
91LoopFillZerobss:
92 cmp r2, r4
93 bcc FillZerobss
94
95/* Call the clock system intitialization function.*/
96 bl SystemInit
97/* Call static constructors */
98 bl __libc_init_array
99/* Call the application's entry point.*/
100 bl main
101 bx lr
102.size Reset_Handler, .-Reset_Handler
103
104/**
105 * @brief This is the code that gets called when the processor receives an
106 * unexpected interrupt. This simply enters an infinite loop, preserving
107 * the system state for examination by a debugger.
108 * @param None
109 * @retval None
110*/
111 .section .text.Default_Handler,"ax",%progbits
112Default_Handler:
113Infinite_Loop:
114 b Infinite_Loop
115 .size Default_Handler, .-Default_Handler
116/******************************************************************************
117*
118* The minimal vector table for a Cortex M3. Note that the proper constructs
119* must be placed on this to ensure that it ends up at physical address
120* 0x0000.0000.
121*
122*******************************************************************************/
123 .section .isr_vector,"a",%progbits
124 .type g_pfnVectors, %object
125 .size g_pfnVectors, .-g_pfnVectors
126
127g_pfnVectors:
128 .word _estack
129 .word Reset_Handler
130 .word NMI_Handler
131 .word HardFault_Handler
132 .word MemManage_Handler
133 .word BusFault_Handler
134 .word UsageFault_Handler
135 .word 0
136 .word 0
137 .word 0
138 .word 0
139 .word SVC_Handler
140 .word DebugMon_Handler
141 .word 0
142 .word PendSV_Handler
143 .word SysTick_Handler
144
145 /* External Interrupts */
146 .word WWDG_IRQHandler /* Window WatchDog */
147 .word PVD_IRQHandler /* PVD through EXTI Line detection */
148 .word TAMP_STAMP_IRQHandler /* Tamper and TimeStamps through the EXTI line */
149 .word RTC_WKUP_IRQHandler /* RTC Wakeup through the EXTI line */
150 .word FLASH_IRQHandler /* FLASH */
151 .word RCC_IRQHandler /* RCC */
152 .word EXTI0_IRQHandler /* EXTI Line0 */
153 .word EXTI1_IRQHandler /* EXTI Line1 */
154 .word EXTI2_IRQHandler /* EXTI Line2 */
155 .word EXTI3_IRQHandler /* EXTI Line3 */
156 .word EXTI4_IRQHandler /* EXTI Line4 */
157 .word DMA1_Stream0_IRQHandler /* DMA1 Stream 0 */
158 .word DMA1_Stream1_IRQHandler /* DMA1 Stream 1 */
159 .word DMA1_Stream2_IRQHandler /* DMA1 Stream 2 */
160 .word DMA1_Stream3_IRQHandler /* DMA1 Stream 3 */
161 .word DMA1_Stream4_IRQHandler /* DMA1 Stream 4 */
162 .word DMA1_Stream5_IRQHandler /* DMA1 Stream 5 */
163 .word DMA1_Stream6_IRQHandler /* DMA1 Stream 6 */
164 .word ADC_IRQHandler /* ADC1, ADC2 and ADC3s */
165 .word CAN1_TX_IRQHandler /* CAN1 TX */
166 .word CAN1_RX0_IRQHandler /* CAN1 RX0 */
167 .word CAN1_RX1_IRQHandler /* CAN1 RX1 */
168 .word CAN1_SCE_IRQHandler /* CAN1 SCE */
169 .word EXTI9_5_IRQHandler /* External Line[9:5]s */
170 .word TIM1_BRK_TIM9_IRQHandler /* TIM1 Break and TIM9 */
171 .word TIM1_UP_TIM10_IRQHandler /* TIM1 Update and TIM10 */
172 .word TIM1_TRG_COM_TIM11_IRQHandler /* TIM1 Trigger and Commutation and TIM11 */
173 .word TIM1_CC_IRQHandler /* TIM1 Capture Compare */
174 .word TIM2_IRQHandler /* TIM2 */
175 .word TIM3_IRQHandler /* TIM3 */
176 .word TIM4_IRQHandler /* TIM4 */
177 .word I2C1_EV_IRQHandler /* I2C1 Event */
178 .word I2C1_ER_IRQHandler /* I2C1 Error */
179 .word I2C2_EV_IRQHandler /* I2C2 Event */
180 .word I2C2_ER_IRQHandler /* I2C2 Error */
181 .word SPI1_IRQHandler /* SPI1 */
182 .word SPI2_IRQHandler /* SPI2 */
183 .word USART1_IRQHandler /* USART1 */
184 .word USART2_IRQHandler /* USART2 */
185 .word USART3_IRQHandler /* USART3 */
186 .word EXTI15_10_IRQHandler /* External Line[15:10]s */
187 .word RTC_Alarm_IRQHandler /* RTC Alarm (A and B) through EXTI Line */
188 .word OTG_FS_WKUP_IRQHandler /* USB OTG FS Wakeup through EXTI line */
189 .word TIM8_BRK_TIM12_IRQHandler /* TIM8 Break and TIM12 */
190 .word TIM8_UP_TIM13_IRQHandler /* TIM8 Update and TIM13 */
191 .word TIM8_TRG_COM_TIM14_IRQHandler /* TIM8 Trigger and Commutation and TIM14 */
192 .word TIM8_CC_IRQHandler /* TIM8 Capture Compare */
193 .word DMA1_Stream7_IRQHandler /* DMA1 Stream7 */
194 .word 0 /* Reserved */
195 .word SDIO_IRQHandler /* SDIO */
196 .word TIM5_IRQHandler /* TIM5 */
197 .word SPI3_IRQHandler /* SPI3 */
198 .word 0 /* Reserved */
199 .word 0 /* Reserved */
200 .word TIM6_IRQHandler /* TIM6 */
201 .word TIM7_IRQHandler /* TIM7 */
202 .word DMA2_Stream0_IRQHandler /* DMA2 Stream 0 */
203 .word DMA2_Stream1_IRQHandler /* DMA2 Stream 1 */
204 .word DMA2_Stream2_IRQHandler /* DMA2 Stream 2 */
205 .word DMA2_Stream3_IRQHandler /* DMA2 Stream 3 */
206 .word DMA2_Stream4_IRQHandler /* DMA2 Stream 4 */
207 .word DFSDM1_FLT0_IRQHandler /* DFSDM1 Filter0 */
208 .word DFSDM1_FLT1_IRQHandler /* DFSDM1 Filter1 */
209 .word CAN2_TX_IRQHandler /* CAN2 TX */
210 .word CAN2_RX0_IRQHandler /* CAN2 RX0 */
211 .word CAN2_RX1_IRQHandler /* CAN2 RX1 */
212 .word CAN2_SCE_IRQHandler /* CAN2 SCE */
213 .word OTG_FS_IRQHandler /* USB OTG FS */
214 .word DMA2_Stream5_IRQHandler /* DMA2 Stream 5 */
215 .word DMA2_Stream6_IRQHandler /* DMA2 Stream 6 */
216 .word DMA2_Stream7_IRQHandler /* DMA2 Stream 7 */
217 .word USART6_IRQHandler /* USART6 */
218 .word I2C3_EV_IRQHandler /* I2C3 event */
219 .word I2C3_ER_IRQHandler /* I2C3 error */
220 .word 0 /* Reserved */
221 .word 0 /* Reserved */
222 .word 0 /* Reserved */
223 .word 0 /* Reserved */
224 .word 0 /* Reserved */
225 .word 0 /* Reserved */
226 .word RNG_IRQHandler /* RNG */
227 .word FPU_IRQHandler /* FPU */
228 .word 0 /* Reserved */
229 .word 0 /* Reserved */
230 .word SPI4_IRQHandler /* SPI4 */
231 .word SPI5_IRQHandler /* SPI5 */
232 .word 0 /* Reserved */
233 .word 0 /* Reserved */
234 .word 0 /* Reserved */
235 .word 0 /* Reserved */
236 .word 0 /* Reserved */
237 .word 0 /* Reserved */
238 .word QUADSPI_IRQHandler /* QuadSPI */
239 .word 0 /* Reserved */
240 .word 0 /* Reserved */
241 .word FMPI2C1_EV_IRQHandler /* FMPI2C1 Event */
242 .word FMPI2C1_ER_IRQHandler /* FMPI2C1 Error */
243
244/*******************************************************************************
245*
246* Provide weak aliases for each Exception handler to the Default_Handler.
247* As they are weak aliases, any function with the same name will override
248* this definition.
249*
250*******************************************************************************/
251 .weak NMI_Handler
252 .thumb_set NMI_Handler,Default_Handler
253
254 .weak HardFault_Handler
255 .thumb_set HardFault_Handler,Default_Handler
256
257 .weak MemManage_Handler
258 .thumb_set MemManage_Handler,Default_Handler
259
260 .weak BusFault_Handler
261 .thumb_set BusFault_Handler,Default_Handler
262
263 .weak UsageFault_Handler
264 .thumb_set UsageFault_Handler,Default_Handler
265
266 .weak SVC_Handler
267 .thumb_set SVC_Handler,Default_Handler
268
269 .weak DebugMon_Handler
270 .thumb_set DebugMon_Handler,Default_Handler
271
272 .weak PendSV_Handler
273 .thumb_set PendSV_Handler,Default_Handler
274
275 .weak SysTick_Handler
276 .thumb_set SysTick_Handler,Default_Handler
277
278 .weak WWDG_IRQHandler
279 .thumb_set WWDG_IRQHandler,Default_Handler
280
281 .weak PVD_IRQHandler
282 .thumb_set PVD_IRQHandler,Default_Handler
283
284 .weak TAMP_STAMP_IRQHandler
285 .thumb_set TAMP_STAMP_IRQHandler,Default_Handler
286
287 .weak RTC_WKUP_IRQHandler
288 .thumb_set RTC_WKUP_IRQHandler,Default_Handler
289
290 .weak FLASH_IRQHandler
291 .thumb_set FLASH_IRQHandler,Default_Handler
292
293 .weak RCC_IRQHandler
294 .thumb_set RCC_IRQHandler,Default_Handler
295
296 .weak EXTI0_IRQHandler
297 .thumb_set EXTI0_IRQHandler,Default_Handler
298
299 .weak EXTI1_IRQHandler
300 .thumb_set EXTI1_IRQHandler,Default_Handler
301
302 .weak EXTI2_IRQHandler
303 .thumb_set EXTI2_IRQHandler,Default_Handler
304
305 .weak EXTI3_IRQHandler
306 .thumb_set EXTI3_IRQHandler,Default_Handler
307
308 .weak EXTI4_IRQHandler
309 .thumb_set EXTI4_IRQHandler,Default_Handler
310
311 .weak DMA1_Stream0_IRQHandler
312 .thumb_set DMA1_Stream0_IRQHandler,Default_Handler
313
314 .weak DMA1_Stream1_IRQHandler
315 .thumb_set DMA1_Stream1_IRQHandler,Default_Handler
316
317 .weak DMA1_Stream2_IRQHandler
318 .thumb_set DMA1_Stream2_IRQHandler,Default_Handler
319
320 .weak DMA1_Stream3_IRQHandler
321 .thumb_set DMA1_Stream3_IRQHandler,Default_Handler
322
323 .weak DMA1_Stream4_IRQHandler
324 .thumb_set DMA1_Stream4_IRQHandler,Default_Handler
325
326 .weak DMA1_Stream5_IRQHandler
327 .thumb_set DMA1_Stream5_IRQHandler,Default_Handler
328
329 .weak DMA1_Stream6_IRQHandler
330 .thumb_set DMA1_Stream6_IRQHandler,Default_Handler
331
332 .weak ADC_IRQHandler
333 .thumb_set ADC_IRQHandler,Default_Handler
334
335 .weak CAN1_TX_IRQHandler
336 .thumb_set CAN1_TX_IRQHandler,Default_Handler
337
338 .weak CAN1_RX0_IRQHandler
339 .thumb_set CAN1_RX0_IRQHandler,Default_Handler
340
341 .weak CAN1_RX1_IRQHandler
342 .thumb_set CAN1_RX1_IRQHandler,Default_Handler
343
344 .weak CAN1_SCE_IRQHandler
345 .thumb_set CAN1_SCE_IRQHandler,Default_Handler
346
347 .weak EXTI9_5_IRQHandler
348 .thumb_set EXTI9_5_IRQHandler,Default_Handler
349
350 .weak TIM1_BRK_TIM9_IRQHandler
351 .thumb_set TIM1_BRK_TIM9_IRQHandler,Default_Handler
352
353 .weak TIM1_UP_TIM10_IRQHandler
354 .thumb_set TIM1_UP_TIM10_IRQHandler,Default_Handler
355
356 .weak TIM1_TRG_COM_TIM11_IRQHandler
357 .thumb_set TIM1_TRG_COM_TIM11_IRQHandler,Default_Handler
358
359 .weak TIM1_CC_IRQHandler
360 .thumb_set TIM1_CC_IRQHandler,Default_Handler
361
362 .weak TIM2_IRQHandler
363 .thumb_set TIM2_IRQHandler,Default_Handler
364
365 .weak TIM3_IRQHandler
366 .thumb_set TIM3_IRQHandler,Default_Handler
367
368 .weak TIM4_IRQHandler
369 .thumb_set TIM4_IRQHandler,Default_Handler
370
371 .weak I2C1_EV_IRQHandler
372 .thumb_set I2C1_EV_IRQHandler,Default_Handler
373
374 .weak I2C1_ER_IRQHandler
375 .thumb_set I2C1_ER_IRQHandler,Default_Handler
376
377 .weak I2C2_EV_IRQHandler
378 .thumb_set I2C2_EV_IRQHandler,Default_Handler
379
380 .weak I2C2_ER_IRQHandler
381 .thumb_set I2C2_ER_IRQHandler,Default_Handler
382
383 .weak SPI1_IRQHandler
384 .thumb_set SPI1_IRQHandler,Default_Handler
385
386 .weak SPI2_IRQHandler
387 .thumb_set SPI2_IRQHandler,Default_Handler
388
389 .weak USART1_IRQHandler
390 .thumb_set USART1_IRQHandler,Default_Handler
391
392 .weak USART2_IRQHandler
393 .thumb_set USART2_IRQHandler,Default_Handler
394
395 .weak USART3_IRQHandler
396 .thumb_set USART3_IRQHandler,Default_Handler
397
398 .weak EXTI15_10_IRQHandler
399 .thumb_set EXTI15_10_IRQHandler,Default_Handler
400
401 .weak RTC_Alarm_IRQHandler
402 .thumb_set RTC_Alarm_IRQHandler,Default_Handler
403
404 .weak OTG_FS_WKUP_IRQHandler
405 .thumb_set OTG_FS_WKUP_IRQHandler,Default_Handler
406
407 .weak TIM8_BRK_TIM12_IRQHandler
408 .thumb_set TIM8_BRK_TIM12_IRQHandler,Default_Handler
409
410 .weak TIM8_UP_TIM13_IRQHandler
411 .thumb_set TIM8_UP_TIM13_IRQHandler,Default_Handler
412
413 .weak TIM8_TRG_COM_TIM14_IRQHandler
414 .thumb_set TIM8_TRG_COM_TIM14_IRQHandler,Default_Handler
415
416 .weak TIM8_CC_IRQHandler
417 .thumb_set TIM8_CC_IRQHandler,Default_Handler
418
419 .weak DMA1_Stream7_IRQHandler
420 .thumb_set DMA1_Stream7_IRQHandler,Default_Handler
421
422 .weak SDIO_IRQHandler
423 .thumb_set SDIO_IRQHandler,Default_Handler
424
425 .weak TIM5_IRQHandler
426 .thumb_set TIM5_IRQHandler,Default_Handler
427
428 .weak SPI3_IRQHandler
429 .thumb_set SPI3_IRQHandler,Default_Handler
430
431 .weak TIM6_IRQHandler
432 .thumb_set TIM6_IRQHandler,Default_Handler
433
434 .weak TIM7_IRQHandler
435 .thumb_set TIM7_IRQHandler,Default_Handler
436
437 .weak DMA2_Stream0_IRQHandler
438 .thumb_set DMA2_Stream0_IRQHandler,Default_Handler
439
440 .weak DMA2_Stream1_IRQHandler
441 .thumb_set DMA2_Stream1_IRQHandler,Default_Handler
442
443 .weak DMA2_Stream2_IRQHandler
444 .thumb_set DMA2_Stream2_IRQHandler,Default_Handler
445
446 .weak DMA2_Stream3_IRQHandler
447 .thumb_set DMA2_Stream3_IRQHandler,Default_Handler
448
449 .weak DMA2_Stream4_IRQHandler
450 .thumb_set DMA2_Stream4_IRQHandler,Default_Handler
451
452 .weak DFSDM1_FLT0_IRQHandler
453 .thumb_set DFSDM1_FLT0_IRQHandler,Default_Handler
454
455 .weak DFSDM1_FLT1_IRQHandler
456 .thumb_set DFSDM1_FLT1_IRQHandler,Default_Handler
457
458 .weak CAN2_TX_IRQHandler
459 .thumb_set CAN2_TX_IRQHandler,Default_Handler
460
461 .weak CAN2_RX0_IRQHandler
462 .thumb_set CAN2_RX0_IRQHandler,Default_Handler
463
464 .weak CAN2_RX1_IRQHandler
465 .thumb_set CAN2_RX1_IRQHandler,Default_Handler
466
467 .weak CAN2_SCE_IRQHandler
468 .thumb_set CAN2_SCE_IRQHandler,Default_Handler
469
470 .weak OTG_FS_IRQHandler
471 .thumb_set OTG_FS_IRQHandler,Default_Handler
472
473 .weak DMA2_Stream5_IRQHandler
474 .thumb_set DMA2_Stream5_IRQHandler,Default_Handler
475
476 .weak DMA2_Stream6_IRQHandler
477 .thumb_set DMA2_Stream6_IRQHandler,Default_Handler
478
479 .weak DMA2_Stream7_IRQHandler
480 .thumb_set DMA2_Stream7_IRQHandler,Default_Handler
481
482 .weak USART6_IRQHandler
483 .thumb_set USART6_IRQHandler,Default_Handler
484
485 .weak I2C3_EV_IRQHandler
486 .thumb_set I2C3_EV_IRQHandler,Default_Handler
487
488 .weak I2C3_ER_IRQHandler
489 .thumb_set I2C3_ER_IRQHandler,Default_Handler
490
491 .weak RNG_IRQHandler
492 .thumb_set RNG_IRQHandler,Default_Handler
493
494 .weak FPU_IRQHandler
495 .thumb_set FPU_IRQHandler,Default_Handler
496
497 .weak SPI4_IRQHandler
498 .thumb_set SPI4_IRQHandler,Default_Handler
499
500 .weak SPI5_IRQHandler
501 .thumb_set SPI5_IRQHandler,Default_Handler
502
503 .weak QUADSPI_IRQHandler
504 .thumb_set QUADSPI_IRQHandler,Default_Handler
505
506 .weak FMPI2C1_EV_IRQHandler
507 .thumb_set FMPI2C1_EV_IRQHandler,Default_Handler
508
509 .weak FMPI2C1_ER_IRQHandler
510 .thumb_set FMPI2C1_ER_IRQHandler,Default_Handler
511/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
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