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stm32f4xx_hal_can.h

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1	/**
2	******************************************************************************
3	* @file stm32f4xx_hal_can.h
4	* @author MCD Application Team
5	* @brief Header file of CAN HAL module.
6	******************************************************************************
7	* @attention
8	*
9	* <h2><center>© Copyright (c) 2016 STMicroelectronics.
10	* All rights reserved.</center></h2>
11	*
12	* This software component is licensed by ST under BSD 3-Clause license,
13	* the "License"; You may not use this file except in compliance with the
14	* License. You may obtain a copy of the License at:
15	* opensource.org/licenses/BSD-3-Clause
16	*
17	******************************************************************************
18	*/
19
20	/* Define to prevent recursive inclusion -------------------------------------*/
21	#ifndef STM32F4xx_HAL_CAN_H
22	#define STM32F4xx_HAL_CAN_H
23
24	#ifdef __cplusplus
25	extern "C" {
26	#endif
27
28	/* Includes ------------------------------------------------------------------*/
29	#include "stm32f4xx_hal_def.h"
30
31	/** @addtogroup STM32F4xx_HAL_Driver
32	* @{
33	*/
34
35	#if defined (CAN1)
36	/** @addtogroup CAN
37	* @{
38	*/
39
40	/* Exported types ------------------------------------------------------------*/
41	/** @defgroup CAN_Exported_Types CAN Exported Types
42	* @{
43	*/
44	/**
45	* @brief HAL State structures definition
46	*/
47	typedef enum
48	{
49	HAL_CAN_STATE_RESET = 0x00U, /!< CAN not yet initialized or disabled /
50	HAL_CAN_STATE_READY = 0x01U, /!< CAN initialized and ready for use /
51	HAL_CAN_STATE_LISTENING = 0x02U, /!< CAN receive process is ongoing /
52	HAL_CAN_STATE_SLEEP_PENDING = 0x03U, /!< CAN sleep request is pending /
53	HAL_CAN_STATE_SLEEP_ACTIVE = 0x04U, /!< CAN sleep mode is active /
54	HAL_CAN_STATE_ERROR = 0x05U /!< CAN error state /
55
56	} HAL_CAN_StateTypeDef;
57
58	/**
59	* @brief CAN init structure definition
60	*/
61	typedef struct
62	{
63	uint32_t Prescaler; /*!< Specifies the length of a time quantum.
64	This parameter must be a number between Min_Data = 1 and Max_Data = 1024. */
65
66	uint32_t Mode; /*!< Specifies the CAN operating mode.
67	This parameter can be a value of @ref CAN_operating_mode */
68
69	uint32_t SyncJumpWidth; /*!< Specifies the maximum number of time quanta the CAN hardware
70	is allowed to lengthen or shorten a bit to perform resynchronization.
71	This parameter can be a value of @ref CAN_synchronisation_jump_width */
72
73	uint32_t TimeSeg1; /*!< Specifies the number of time quanta in Bit Segment 1.
74	This parameter can be a value of @ref CAN_time_quantum_in_bit_segment_1 */
75
76	uint32_t TimeSeg2; /*!< Specifies the number of time quanta in Bit Segment 2.
77	This parameter can be a value of @ref CAN_time_quantum_in_bit_segment_2 */
78
79	FunctionalState TimeTriggeredMode; /*!< Enable or disable the time triggered communication mode.
80	This parameter can be set to ENABLE or DISABLE. */
81
82	FunctionalState AutoBusOff; /*!< Enable or disable the automatic bus-off management.
83	This parameter can be set to ENABLE or DISABLE. */
84
85	FunctionalState AutoWakeUp; /*!< Enable or disable the automatic wake-up mode.
86	This parameter can be set to ENABLE or DISABLE. */
87
88	FunctionalState AutoRetransmission; /*!< Enable or disable the non-automatic retransmission mode.
89	This parameter can be set to ENABLE or DISABLE. */
90
91	FunctionalState ReceiveFifoLocked; /*!< Enable or disable the Receive FIFO Locked mode.
92	This parameter can be set to ENABLE or DISABLE. */
93
94	FunctionalState TransmitFifoPriority;/*!< Enable or disable the transmit FIFO priority.
95	This parameter can be set to ENABLE or DISABLE. */
96
97	} CAN_InitTypeDef;
98
99	/**
100	* @brief CAN filter configuration structure definition
101	*/
102	typedef struct
103	{
104	uint32_t FilterIdHigh; /*!< Specifies the filter identification number (MSBs for a 32-bit
105	configuration, first one for a 16-bit configuration).
106	This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF. */
107
108	uint32_t FilterIdLow; /*!< Specifies the filter identification number (LSBs for a 32-bit
109	configuration, second one for a 16-bit configuration).
110	This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF. */
111
112	uint32_t FilterMaskIdHigh; /*!< Specifies the filter mask number or identification number,
113	according to the mode (MSBs for a 32-bit configuration,
114	first one for a 16-bit configuration).
115	This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF. */
116
117	uint32_t FilterMaskIdLow; /*!< Specifies the filter mask number or identification number,
118	according to the mode (LSBs for a 32-bit configuration,
119	second one for a 16-bit configuration).
120	This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF. */
121
122	uint32_t FilterFIFOAssignment; /*!< Specifies the FIFO (0 or 1U) which will be assigned to the filter.
123	This parameter can be a value of @ref CAN_filter_FIFO */
124
125	uint32_t FilterBank; /*!< Specifies the filter bank which will be initialized.
126	For single CAN instance(14 dedicated filter banks),
127	this parameter must be a number between Min_Data = 0 and Max_Data = 13.
128	For dual CAN instances(28 filter banks shared),
129	this parameter must be a number between Min_Data = 0 and Max_Data = 27. */
130
131	uint32_t FilterMode; /*!< Specifies the filter mode to be initialized.
132	This parameter can be a value of @ref CAN_filter_mode */
133
134	uint32_t FilterScale; /*!< Specifies the filter scale.
135	This parameter can be a value of @ref CAN_filter_scale */
136
137	uint32_t FilterActivation; /*!< Enable or disable the filter.
138	This parameter can be a value of @ref CAN_filter_activation */
139
140	uint32_t SlaveStartFilterBank; /*!< Select the start filter bank for the slave CAN instance.
141	For single CAN instances, this parameter is meaningless.
142	For dual CAN instances, all filter banks with lower index are assigned to master
143	CAN instance, whereas all filter banks with greater index are assigned to slave
144	CAN instance.
145	This parameter must be a number between Min_Data = 0 and Max_Data = 27. */
146
147	} CAN_FilterTypeDef;
148
149	/**
150	* @brief CAN Tx message header structure definition
151	*/
152	typedef struct
153	{
154	uint32_t StdId; /*!< Specifies the standard identifier.
155	This parameter must be a number between Min_Data = 0 and Max_Data = 0x7FF. */
156
157	uint32_t ExtId; /*!< Specifies the extended identifier.
158	This parameter must be a number between Min_Data = 0 and Max_Data = 0x1FFFFFFF. */
159
160	uint32_t IDE; /*!< Specifies the type of identifier for the message that will be transmitted.
161	This parameter can be a value of @ref CAN_identifier_type */
162
163	uint32_t RTR; /*!< Specifies the type of frame for the message that will be transmitted.
164	This parameter can be a value of @ref CAN_remote_transmission_request */
165
166	uint32_t DLC; /*!< Specifies the length of the frame that will be transmitted.
167	This parameter must be a number between Min_Data = 0 and Max_Data = 8. */
168
169	FunctionalState TransmitGlobalTime; /*!< Specifies whether the timestamp counter value captured on start
170	of frame transmission, is sent in DATA6 and DATA7 replacing pData[6] and pData[7].
171	@note: Time Triggered Communication Mode must be enabled.
172	@note: DLC must be programmed as 8 bytes, in order these 2 bytes are sent.
173	This parameter can be set to ENABLE or DISABLE. */
174
175	} CAN_TxHeaderTypeDef;
176
177	/**
178	* @brief CAN Rx message header structure definition
179	*/
180	typedef struct
181	{
182	uint32_t StdId; /*!< Specifies the standard identifier.
183	This parameter must be a number between Min_Data = 0 and Max_Data = 0x7FF. */
184
185	uint32_t ExtId; /*!< Specifies the extended identifier.
186	This parameter must be a number between Min_Data = 0 and Max_Data = 0x1FFFFFFF. */
187
188	uint32_t IDE; /*!< Specifies the type of identifier for the message that will be transmitted.
189	This parameter can be a value of @ref CAN_identifier_type */
190
191	uint32_t RTR; /*!< Specifies the type of frame for the message that will be transmitted.
192	This parameter can be a value of @ref CAN_remote_transmission_request */
193
194	uint32_t DLC; /*!< Specifies the length of the frame that will be transmitted.
195	This parameter must be a number between Min_Data = 0 and Max_Data = 8. */
196
197	uint32_t Timestamp; /*!< Specifies the timestamp counter value captured on start of frame reception.
198	@note: Time Triggered Communication Mode must be enabled.
199	This parameter must be a number between Min_Data = 0 and Max_Data = 0xFFFF. */
200
201	uint32_t FilterMatchIndex; /*!< Specifies the index of matching acceptance filter element.
202	This parameter must be a number between Min_Data = 0 and Max_Data = 0xFF. */
203
204	} CAN_RxHeaderTypeDef;
205
206	/**
207	* @brief CAN handle Structure definition
208	*/
209	typedef struct __CAN_HandleTypeDef
210	{
211	CAN_TypeDef Instance; /!< Register base address */
212
213	CAN_InitTypeDef Init; /!< CAN required parameters /
214
215	__IO HAL_CAN_StateTypeDef State; /!< CAN communication state /
216
217	__IO uint32_t ErrorCode; /*!< CAN Error code.
218	This parameter can be a value of @ref CAN_Error_Code */
219
220	#if USE_HAL_CAN_REGISTER_CALLBACKS == 1
221	void (* TxMailbox0CompleteCallback)(struct __CAN_HandleTypeDef hcan);/!< CAN Tx Mailbox 0 complete callback */
222	void (* TxMailbox1CompleteCallback)(struct __CAN_HandleTypeDef hcan);/!< CAN Tx Mailbox 1 complete callback */
223	void (* TxMailbox2CompleteCallback)(struct __CAN_HandleTypeDef hcan);/!< CAN Tx Mailbox 2 complete callback */
224	void (* TxMailbox0AbortCallback)(struct __CAN_HandleTypeDef hcan); /!< CAN Tx Mailbox 0 abort callback */
225	void (* TxMailbox1AbortCallback)(struct __CAN_HandleTypeDef hcan); /!< CAN Tx Mailbox 1 abort callback */
226	void (* TxMailbox2AbortCallback)(struct __CAN_HandleTypeDef hcan); /!< CAN Tx Mailbox 2 abort callback */
227	void (* RxFifo0MsgPendingCallback)(struct __CAN_HandleTypeDef hcan); /!< CAN Rx FIFO 0 msg pending callback */
228	void (* RxFifo0FullCallback)(struct __CAN_HandleTypeDef hcan); /!< CAN Rx FIFO 0 full callback */
229	void (* RxFifo1MsgPendingCallback)(struct __CAN_HandleTypeDef hcan); /!< CAN Rx FIFO 1 msg pending callback */
230	void (* RxFifo1FullCallback)(struct __CAN_HandleTypeDef hcan); /!< CAN Rx FIFO 1 full callback */
231	void (* SleepCallback)(struct __CAN_HandleTypeDef hcan); /!< CAN Sleep callback */
232	void (* WakeUpFromRxMsgCallback)(struct __CAN_HandleTypeDef hcan); /!< CAN Wake Up from Rx msg callback */
233	void (* ErrorCallback)(struct __CAN_HandleTypeDef hcan); /!< CAN Error callback */
234
235	void (* MspInitCallback)(struct __CAN_HandleTypeDef hcan); /!< CAN Msp Init callback */
236	void (* MspDeInitCallback)(struct __CAN_HandleTypeDef hcan); /!< CAN Msp DeInit callback */
237
238	#endif /* (USE_HAL_CAN_REGISTER_CALLBACKS) */
239	} CAN_HandleTypeDef;
240
241	#if USE_HAL_CAN_REGISTER_CALLBACKS == 1
242	/**
243	* @brief HAL CAN common Callback ID enumeration definition
244	*/
245	typedef enum
246	{
247	HAL_CAN_TX_MAILBOX0_COMPLETE_CB_ID = 0x00U, /!< CAN Tx Mailbox 0 complete callback ID /
248	HAL_CAN_TX_MAILBOX1_COMPLETE_CB_ID = 0x01U, /!< CAN Tx Mailbox 1 complete callback ID /
249	HAL_CAN_TX_MAILBOX2_COMPLETE_CB_ID = 0x02U, /!< CAN Tx Mailbox 2 complete callback ID /
250	HAL_CAN_TX_MAILBOX0_ABORT_CB_ID = 0x03U, /!< CAN Tx Mailbox 0 abort callback ID /
251	HAL_CAN_TX_MAILBOX1_ABORT_CB_ID = 0x04U, /!< CAN Tx Mailbox 1 abort callback ID /
252	HAL_CAN_TX_MAILBOX2_ABORT_CB_ID = 0x05U, /!< CAN Tx Mailbox 2 abort callback ID /
253	HAL_CAN_RX_FIFO0_MSG_PENDING_CB_ID = 0x06U, /!< CAN Rx FIFO 0 message pending callback ID /
254	HAL_CAN_RX_FIFO0_FULL_CB_ID = 0x07U, /!< CAN Rx FIFO 0 full callback ID /
255	HAL_CAN_RX_FIFO1_MSG_PENDING_CB_ID = 0x08U, /!< CAN Rx FIFO 1 message pending callback ID /
256	HAL_CAN_RX_FIFO1_FULL_CB_ID = 0x09U, /!< CAN Rx FIFO 1 full callback ID /
257	HAL_CAN_SLEEP_CB_ID = 0x0AU, /!< CAN Sleep callback ID /
258	HAL_CAN_WAKEUP_FROM_RX_MSG_CB_ID = 0x0BU, /!< CAN Wake Up from Rx msg callback ID /
259	HAL_CAN_ERROR_CB_ID = 0x0CU, /!< CAN Error callback ID /
260
261	HAL_CAN_MSPINIT_CB_ID = 0x0DU, /!< CAN MspInit callback ID /
262	HAL_CAN_MSPDEINIT_CB_ID = 0x0EU, /!< CAN MspDeInit callback ID /
263
264	} HAL_CAN_CallbackIDTypeDef;
265
266	/**
267	* @brief HAL CAN Callback pointer definition
268	*/
269	typedef void (pCAN_CallbackTypeDef)(CAN_HandleTypeDef hcan); /!< pointer to a CAN callback function /
270
271	#endif /* USE_HAL_CAN_REGISTER_CALLBACKS */
272	/**
273	* @}
274	*/
275
276	/* Exported constants --------------------------------------------------------*/
277
278	/** @defgroup CAN_Exported_Constants CAN Exported Constants
279	* @{
280	*/
281
282	/** @defgroup CAN_Error_Code CAN Error Code
283	* @{
284	*/
285	#define HAL_CAN_ERROR_NONE (0x00000000U) /!< No error /
286	#define HAL_CAN_ERROR_EWG (0x00000001U) /!< Protocol Error Warning /
287	#define HAL_CAN_ERROR_EPV (0x00000002U) /!< Error Passive /
288	#define HAL_CAN_ERROR_BOF (0x00000004U) /!< Bus-off error /
289	#define HAL_CAN_ERROR_STF (0x00000008U) /!< Stuff error /
290	#define HAL_CAN_ERROR_FOR (0x00000010U) /!< Form error /
291	#define HAL_CAN_ERROR_ACK (0x00000020U) /!< Acknowledgment error /
292	#define HAL_CAN_ERROR_BR (0x00000040U) /!< Bit recessive error /
293	#define HAL_CAN_ERROR_BD (0x00000080U) /!< Bit dominant error /
294	#define HAL_CAN_ERROR_CRC (0x00000100U) /!< CRC error /
295	#define HAL_CAN_ERROR_RX_FOV0 (0x00000200U) /!< Rx FIFO0 overrun error /
296	#define HAL_CAN_ERROR_RX_FOV1 (0x00000400U) /!< Rx FIFO1 overrun error /
297	#define HAL_CAN_ERROR_TX_ALST0 (0x00000800U) /!< TxMailbox 0 transmit failure due to arbitration lost /
298	#define HAL_CAN_ERROR_TX_TERR0 (0x00001000U) /!< TxMailbox 0 transmit failure due to transmit error /
299	#define HAL_CAN_ERROR_TX_ALST1 (0x00002000U) /!< TxMailbox 1 transmit failure due to arbitration lost /
300	#define HAL_CAN_ERROR_TX_TERR1 (0x00004000U) /!< TxMailbox 1 transmit failure due to transmit error /
301	#define HAL_CAN_ERROR_TX_ALST2 (0x00008000U) /!< TxMailbox 2 transmit failure due to arbitration lost /
302	#define HAL_CAN_ERROR_TX_TERR2 (0x00010000U) /!< TxMailbox 2 transmit failure due to transmit error /
303	#define HAL_CAN_ERROR_TIMEOUT (0x00020000U) /!< Timeout error /
304	#define HAL_CAN_ERROR_NOT_INITIALIZED (0x00040000U) /!< Peripheral not initialized /
305	#define HAL_CAN_ERROR_NOT_READY (0x00080000U) /!< Peripheral not ready /
306	#define HAL_CAN_ERROR_NOT_STARTED (0x00100000U) /!< Peripheral not started /
307	#define HAL_CAN_ERROR_PARAM (0x00200000U) /!< Parameter error /
308
309	#if USE_HAL_CAN_REGISTER_CALLBACKS == 1
310	#define HAL_CAN_ERROR_INVALID_CALLBACK (0x00400000U) /!< Invalid Callback error /
311	#endif /* USE_HAL_CAN_REGISTER_CALLBACKS */
312	#define HAL_CAN_ERROR_INTERNAL (0x00800000U) /!< Internal error /
313
314	/**
315	* @}
316	*/
317
318	/** @defgroup CAN_InitStatus CAN InitStatus
319	* @{
320	*/
321	#define CAN_INITSTATUS_FAILED (0x00000000U) /!< CAN initialization failed /
322	#define CAN_INITSTATUS_SUCCESS (0x00000001U) /!< CAN initialization OK /
323	/**
324	* @}
325	*/
326
327	/** @defgroup CAN_operating_mode CAN Operating Mode
328	* @{
329	*/
330	#define CAN_MODE_NORMAL (0x00000000U) /!< Normal mode /
331	#define CAN_MODE_LOOPBACK ((uint32_t)CAN_BTR_LBKM) /!< Loopback mode /
332	#define CAN_MODE_SILENT ((uint32_t)CAN_BTR_SILM) /!< Silent mode /
333	#define CAN_MODE_SILENT_LOOPBACK ((uint32_t)(CAN_BTR_LBKM \| CAN_BTR_SILM)) /!< Loopback combined with silent mode /
334	/**
335	* @}
336	*/
337
338
339	/** @defgroup CAN_synchronisation_jump_width CAN Synchronization Jump Width
340	* @{
341	*/
342	#define CAN_SJW_1TQ (0x00000000U) /!< 1 time quantum /
343	#define CAN_SJW_2TQ ((uint32_t)CAN_BTR_SJW_0) /!< 2 time quantum /
344	#define CAN_SJW_3TQ ((uint32_t)CAN_BTR_SJW_1) /!< 3 time quantum /
345	#define CAN_SJW_4TQ ((uint32_t)CAN_BTR_SJW) /!< 4 time quantum /
346	/**
347	* @}
348	*/
349
350	/** @defgroup CAN_time_quantum_in_bit_segment_1 CAN Time Quantum in Bit Segment 1
351	* @{
352	*/
353	#define CAN_BS1_1TQ (0x00000000U) /!< 1 time quantum /
354	#define CAN_BS1_2TQ ((uint32_t)CAN_BTR_TS1_0) /!< 2 time quantum /
355	#define CAN_BS1_3TQ ((uint32_t)CAN_BTR_TS1_1) /!< 3 time quantum /
356	#define CAN_BS1_4TQ ((uint32_t)(CAN_BTR_TS1_1 \| CAN_BTR_TS1_0)) /!< 4 time quantum /
357	#define CAN_BS1_5TQ ((uint32_t)CAN_BTR_TS1_2) /!< 5 time quantum /
358	#define CAN_BS1_6TQ ((uint32_t)(CAN_BTR_TS1_2 \| CAN_BTR_TS1_0)) /!< 6 time quantum /
359	#define CAN_BS1_7TQ ((uint32_t)(CAN_BTR_TS1_2 \| CAN_BTR_TS1_1)) /!< 7 time quantum /
360	#define CAN_BS1_8TQ ((uint32_t)(CAN_BTR_TS1_2 \| CAN_BTR_TS1_1 \| CAN_BTR_TS1_0)) /!< 8 time quantum /
361	#define CAN_BS1_9TQ ((uint32_t)CAN_BTR_TS1_3) /!< 9 time quantum /
362	#define CAN_BS1_10TQ ((uint32_t)(CAN_BTR_TS1_3 \| CAN_BTR_TS1_0)) /!< 10 time quantum /
363	#define CAN_BS1_11TQ ((uint32_t)(CAN_BTR_TS1_3 \| CAN_BTR_TS1_1)) /!< 11 time quantum /
364	#define CAN_BS1_12TQ ((uint32_t)(CAN_BTR_TS1_3 \| CAN_BTR_TS1_1 \| CAN_BTR_TS1_0)) /!< 12 time quantum /
365	#define CAN_BS1_13TQ ((uint32_t)(CAN_BTR_TS1_3 \| CAN_BTR_TS1_2)) /!< 13 time quantum /
366	#define CAN_BS1_14TQ ((uint32_t)(CAN_BTR_TS1_3 \| CAN_BTR_TS1_2 \| CAN_BTR_TS1_0)) /!< 14 time quantum /
367	#define CAN_BS1_15TQ ((uint32_t)(CAN_BTR_TS1_3 \| CAN_BTR_TS1_2 \| CAN_BTR_TS1_1)) /!< 15 time quantum /
368	#define CAN_BS1_16TQ ((uint32_t)CAN_BTR_TS1) /!< 16 time quantum /
369	/**
370	* @}
371	*/
372
373	/** @defgroup CAN_time_quantum_in_bit_segment_2 CAN Time Quantum in Bit Segment 2
374	* @{
375	*/
376	#define CAN_BS2_1TQ (0x00000000U) /!< 1 time quantum /
377	#define CAN_BS2_2TQ ((uint32_t)CAN_BTR_TS2_0) /!< 2 time quantum /
378	#define CAN_BS2_3TQ ((uint32_t)CAN_BTR_TS2_1) /!< 3 time quantum /
379	#define CAN_BS2_4TQ ((uint32_t)(CAN_BTR_TS2_1 \| CAN_BTR_TS2_0)) /!< 4 time quantum /
380	#define CAN_BS2_5TQ ((uint32_t)CAN_BTR_TS2_2) /!< 5 time quantum /
381	#define CAN_BS2_6TQ ((uint32_t)(CAN_BTR_TS2_2 \| CAN_BTR_TS2_0)) /!< 6 time quantum /
382	#define CAN_BS2_7TQ ((uint32_t)(CAN_BTR_TS2_2 \| CAN_BTR_TS2_1)) /!< 7 time quantum /
383	#define CAN_BS2_8TQ ((uint32_t)CAN_BTR_TS2) /!< 8 time quantum /
384	/**
385	* @}
386	*/
387
388	/** @defgroup CAN_filter_mode CAN Filter Mode
389	* @{
390	*/
391	#define CAN_FILTERMODE_IDMASK (0x00000000U) /!< Identifier mask mode /
392	#define CAN_FILTERMODE_IDLIST (0x00000001U) /!< Identifier list mode /
393	/**
394	* @}
395	*/
396
397	/** @defgroup CAN_filter_scale CAN Filter Scale
398	* @{
399	*/
400	#define CAN_FILTERSCALE_16BIT (0x00000000U) /!< Two 16-bit filters /
401	#define CAN_FILTERSCALE_32BIT (0x00000001U) /!< One 32-bit filter /
402	/**
403	* @}
404	*/
405
406	/** @defgroup CAN_filter_activation CAN Filter Activation
407	* @{
408	*/
409	#define CAN_FILTER_DISABLE (0x00000000U) /!< Disable filter /
410	#define CAN_FILTER_ENABLE (0x00000001U) /!< Enable filter /
411	/**
412	* @}
413	*/
414
415	/** @defgroup CAN_filter_FIFO CAN Filter FIFO
416	* @{
417	*/
418	#define CAN_FILTER_FIFO0 (0x00000000U) /!< Filter FIFO 0 assignment for filter x /
419	#define CAN_FILTER_FIFO1 (0x00000001U) /!< Filter FIFO 1 assignment for filter x /
420	/**
421	* @}
422	*/
423
424	/** @defgroup CAN_identifier_type CAN Identifier Type
425	* @{
426	*/
427	#define CAN_ID_STD (0x00000000U) /!< Standard Id /
428	#define CAN_ID_EXT (0x00000004U) /!< Extended Id /
429	/**
430	* @}
431	*/
432
433	/** @defgroup CAN_remote_transmission_request CAN Remote Transmission Request
434	* @{
435	*/
436	#define CAN_RTR_DATA (0x00000000U) /!< Data frame /
437	#define CAN_RTR_REMOTE (0x00000002U) /!< Remote frame /
438	/**
439	* @}
440	*/
441
442	/** @defgroup CAN_receive_FIFO_number CAN Receive FIFO Number
443	* @{
444	*/
445	#define CAN_RX_FIFO0 (0x00000000U) /!< CAN receive FIFO 0 /
446	#define CAN_RX_FIFO1 (0x00000001U) /!< CAN receive FIFO 1 /
447	/**
448	* @}
449	*/
450
451	/** @defgroup CAN_Tx_Mailboxes CAN Tx Mailboxes
452	* @{
453	*/
454	#define CAN_TX_MAILBOX0 (0x00000001U) /!< Tx Mailbox 0 /
455	#define CAN_TX_MAILBOX1 (0x00000002U) /!< Tx Mailbox 1 /
456	#define CAN_TX_MAILBOX2 (0x00000004U) /!< Tx Mailbox 2 /
457	/**
458	* @}
459	*/
460
461	/** @defgroup CAN_flags CAN Flags
462	* @{
463	*/
464	/* Transmit Flags */
465	#define CAN_FLAG_RQCP0 (0x00000500U) /!< Request complete MailBox 0 flag /
466	#define CAN_FLAG_TXOK0 (0x00000501U) /!< Transmission OK MailBox 0 flag /
467	#define CAN_FLAG_ALST0 (0x00000502U) /!< Arbitration Lost MailBox 0 flag /
468	#define CAN_FLAG_TERR0 (0x00000503U) /!< Transmission error MailBox 0 flag /
469	#define CAN_FLAG_RQCP1 (0x00000508U) /!< Request complete MailBox1 flag /
470	#define CAN_FLAG_TXOK1 (0x00000509U) /!< Transmission OK MailBox 1 flag /
471	#define CAN_FLAG_ALST1 (0x0000050AU) /!< Arbitration Lost MailBox 1 flag /
472	#define CAN_FLAG_TERR1 (0x0000050BU) /!< Transmission error MailBox 1 flag /
473	#define CAN_FLAG_RQCP2 (0x00000510U) /!< Request complete MailBox2 flag /
474	#define CAN_FLAG_TXOK2 (0x00000511U) /!< Transmission OK MailBox 2 flag /
475	#define CAN_FLAG_ALST2 (0x00000512U) /!< Arbitration Lost MailBox 2 flag /
476	#define CAN_FLAG_TERR2 (0x00000513U) /!< Transmission error MailBox 2 flag /
477	#define CAN_FLAG_TME0 (0x0000051AU) /!< Transmit mailbox 0 empty flag /
478	#define CAN_FLAG_TME1 (0x0000051BU) /!< Transmit mailbox 1 empty flag /
479	#define CAN_FLAG_TME2 (0x0000051CU) /!< Transmit mailbox 2 empty flag /
480	#define CAN_FLAG_LOW0 (0x0000051DU) /!< Lowest priority mailbox 0 flag /
481	#define CAN_FLAG_LOW1 (0x0000051EU) /!< Lowest priority mailbox 1 flag /
482	#define CAN_FLAG_LOW2 (0x0000051FU) /!< Lowest priority mailbox 2 flag /
483
484	/* Receive Flags */
485	#define CAN_FLAG_FF0 (0x00000203U) /!< RX FIFO 0 Full flag /
486	#define CAN_FLAG_FOV0 (0x00000204U) /!< RX FIFO 0 Overrun flag /
487	#define CAN_FLAG_FF1 (0x00000403U) /!< RX FIFO 1 Full flag /
488	#define CAN_FLAG_FOV1 (0x00000404U) /!< RX FIFO 1 Overrun flag /
489
490	/* Operating Mode Flags */
491	#define CAN_FLAG_INAK (0x00000100U) /!< Initialization acknowledge flag /
492	#define CAN_FLAG_SLAK (0x00000101U) /!< Sleep acknowledge flag /
493	#define CAN_FLAG_ERRI (0x00000102U) /!< Error flag /
494	#define CAN_FLAG_WKU (0x00000103U) /!< Wake up interrupt flag /
495	#define CAN_FLAG_SLAKI (0x00000104U) /!< Sleep acknowledge interrupt flag /
496
497	/* Error Flags */
498	#define CAN_FLAG_EWG (0x00000300U) /!< Error warning flag /
499	#define CAN_FLAG_EPV (0x00000301U) /!< Error passive flag /
500	#define CAN_FLAG_BOF (0x00000302U) /!< Bus-Off flag /
501	/**
502	* @}
503	*/
504
505
506	/** @defgroup CAN_Interrupts CAN Interrupts
507	* @{
508	*/
509	/* Transmit Interrupt */
510	#define CAN_IT_TX_MAILBOX_EMPTY ((uint32_t)CAN_IER_TMEIE) /!< Transmit mailbox empty interrupt /
511
512	/* Receive Interrupts */
513	#define CAN_IT_RX_FIFO0_MSG_PENDING ((uint32_t)CAN_IER_FMPIE0) /!< FIFO 0 message pending interrupt /
514	#define CAN_IT_RX_FIFO0_FULL ((uint32_t)CAN_IER_FFIE0) /!< FIFO 0 full interrupt /
515	#define CAN_IT_RX_FIFO0_OVERRUN ((uint32_t)CAN_IER_FOVIE0) /!< FIFO 0 overrun interrupt /
516	#define CAN_IT_RX_FIFO1_MSG_PENDING ((uint32_t)CAN_IER_FMPIE1) /!< FIFO 1 message pending interrupt /
517	#define CAN_IT_RX_FIFO1_FULL ((uint32_t)CAN_IER_FFIE1) /!< FIFO 1 full interrupt /
518	#define CAN_IT_RX_FIFO1_OVERRUN ((uint32_t)CAN_IER_FOVIE1) /!< FIFO 1 overrun interrupt /
519
520	/* Operating Mode Interrupts */
521	#define CAN_IT_WAKEUP ((uint32_t)CAN_IER_WKUIE) /!< Wake-up interrupt /
522	#define CAN_IT_SLEEP_ACK ((uint32_t)CAN_IER_SLKIE) /!< Sleep acknowledge interrupt /
523
524	/* Error Interrupts */
525	#define CAN_IT_ERROR_WARNING ((uint32_t)CAN_IER_EWGIE) /!< Error warning interrupt /
526	#define CAN_IT_ERROR_PASSIVE ((uint32_t)CAN_IER_EPVIE) /!< Error passive interrupt /
527	#define CAN_IT_BUSOFF ((uint32_t)CAN_IER_BOFIE) /!< Bus-off interrupt /
528	#define CAN_IT_LAST_ERROR_CODE ((uint32_t)CAN_IER_LECIE) /!< Last error code interrupt /
529	#define CAN_IT_ERROR ((uint32_t)CAN_IER_ERRIE) /!< Error Interrupt /
530	/**
531	* @}
532	*/
533
534	/**
535	* @}
536	*/
537
538	/* Exported macros -----------------------------------------------------------*/
539	/** @defgroup CAN_Exported_Macros CAN Exported Macros
540	* @{
541	*/
542
543	/** @brief Reset CAN handle state
544	* @param __HANDLE__ CAN handle.
545	* @retval None
546	*/
547	#if USE_HAL_CAN_REGISTER_CALLBACKS == 1
548	#define __HAL_CAN_RESET_HANDLE_STATE(__HANDLE__) do{ \
549	(__HANDLE__)->State = HAL_CAN_STATE_RESET; \
550	(__HANDLE__)->MspInitCallback = NULL; \
551	(__HANDLE__)->MspDeInitCallback = NULL; \
552	} while(0)
553	#else
554	#define __HAL_CAN_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_CAN_STATE_RESET)
555	#endif /USE_HAL_CAN_REGISTER_CALLBACKS /
556
557	/**
558	* @brief Enable the specified CAN interrupts.
559	* @param __HANDLE__ CAN handle.
560	* @param __INTERRUPT__ CAN Interrupt sources to enable.
561	* This parameter can be any combination of @arg CAN_Interrupts
562	* @retval None
563	*/
564	#define __HAL_CAN_ENABLE_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->IER) \|= (__INTERRUPT__))
565
566	/**
567	* @brief Disable the specified CAN interrupts.
568	* @param __HANDLE__ CAN handle.
569	* @param __INTERRUPT__ CAN Interrupt sources to disable.
570	* This parameter can be any combination of @arg CAN_Interrupts
571	* @retval None
572	*/
573	#define __HAL_CAN_DISABLE_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->IER) &= ~(__INTERRUPT__))
574
575	/** @brief Check if the specified CAN interrupt source is enabled or disabled.
576	* @param __HANDLE__ specifies the CAN Handle.
577	* @param __INTERRUPT__ specifies the CAN interrupt source to check.
578	* This parameter can be a value of @arg CAN_Interrupts
579	* @retval The state of __IT__ (TRUE or FALSE).
580	*/
581	#define __HAL_CAN_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->IER) & (__INTERRUPT__))
582
583	/** @brief Check whether the specified CAN flag is set or not.
584	* @param __HANDLE__ specifies the CAN Handle.
585	* @param __FLAG__ specifies the flag to check.
586	* This parameter can be one of @arg CAN_flags
587	* @retval The state of __FLAG__ (TRUE or FALSE).
588	*/
589	#define __HAL_CAN_GET_FLAG(__HANDLE__, __FLAG__) \
590	((((__FLAG__) >> 8U) == 5U)? ((((__HANDLE__)->Instance->TSR) & (1U << ((__FLAG__) & CAN_FLAG_MASK))) == (1U << ((__FLAG__) & CAN_FLAG_MASK))): \
591	(((__FLAG__) >> 8U) == 2U)? ((((__HANDLE__)->Instance->RF0R) & (1U << ((__FLAG__) & CAN_FLAG_MASK))) == (1U << ((__FLAG__) & CAN_FLAG_MASK))): \
592	(((__FLAG__) >> 8U) == 4U)? ((((__HANDLE__)->Instance->RF1R) & (1U << ((__FLAG__) & CAN_FLAG_MASK))) == (1U << ((__FLAG__) & CAN_FLAG_MASK))): \
593	(((__FLAG__) >> 8U) == 1U)? ((((__HANDLE__)->Instance->MSR) & (1U << ((__FLAG__) & CAN_FLAG_MASK))) == (1U << ((__FLAG__) & CAN_FLAG_MASK))): \
594	(((__FLAG__) >> 8U) == 3U)? ((((__HANDLE__)->Instance->ESR) & (1U << ((__FLAG__) & CAN_FLAG_MASK))) == (1U << ((__FLAG__) & CAN_FLAG_MASK))): 0U)
595
596	/** @brief Clear the specified CAN pending flag.
597	* @param __HANDLE__ specifies the CAN Handle.
598	* @param __FLAG__ specifies the flag to check.
599	* This parameter can be one of the following values:
600	* @arg CAN_FLAG_RQCP0: Request complete MailBox 0 Flag
601	* @arg CAN_FLAG_TXOK0: Transmission OK MailBox 0 Flag
602	* @arg CAN_FLAG_ALST0: Arbitration Lost MailBox 0 Flag
603	* @arg CAN_FLAG_TERR0: Transmission error MailBox 0 Flag
604	* @arg CAN_FLAG_RQCP1: Request complete MailBox 1 Flag
605	* @arg CAN_FLAG_TXOK1: Transmission OK MailBox 1 Flag
606	* @arg CAN_FLAG_ALST1: Arbitration Lost MailBox 1 Flag
607	* @arg CAN_FLAG_TERR1: Transmission error MailBox 1 Flag
608	* @arg CAN_FLAG_RQCP2: Request complete MailBox 2 Flag
609	* @arg CAN_FLAG_TXOK2: Transmission OK MailBox 2 Flag
610	* @arg CAN_FLAG_ALST2: Arbitration Lost MailBox 2 Flag
611	* @arg CAN_FLAG_TERR2: Transmission error MailBox 2 Flag
612	* @arg CAN_FLAG_FF0: RX FIFO 0 Full Flag
613	* @arg CAN_FLAG_FOV0: RX FIFO 0 Overrun Flag
614	* @arg CAN_FLAG_FF1: RX FIFO 1 Full Flag
615	* @arg CAN_FLAG_FOV1: RX FIFO 1 Overrun Flag
616	* @arg CAN_FLAG_WKUI: Wake up Interrupt Flag
617	* @arg CAN_FLAG_SLAKI: Sleep acknowledge Interrupt Flag
618	* @retval None
619	*/
620	#define __HAL_CAN_CLEAR_FLAG(__HANDLE__, __FLAG__) \
621	((((__FLAG__) >> 8U) == 5U)? (((__HANDLE__)->Instance->TSR) = (1U << ((__FLAG__) & CAN_FLAG_MASK))): \
622	(((__FLAG__) >> 8U) == 2U)? (((__HANDLE__)->Instance->RF0R) = (1U << ((__FLAG__) & CAN_FLAG_MASK))): \
623	(((__FLAG__) >> 8U) == 4U)? (((__HANDLE__)->Instance->RF1R) = (1U << ((__FLAG__) & CAN_FLAG_MASK))): \
624	(((__FLAG__) >> 8U) == 1U)? (((__HANDLE__)->Instance->MSR) = (1U << ((__FLAG__) & CAN_FLAG_MASK))): 0U)
625
626	/**
627	* @}
628	*/
629
630	/* Exported functions --------------------------------------------------------*/
631	/** @addtogroup CAN_Exported_Functions CAN Exported Functions
632	* @{
633	*/
634
635	/** @addtogroup CAN_Exported_Functions_Group1 Initialization and de-initialization functions
636	* @brief Initialization and Configuration functions
637	* @{
638	*/
639
640	/* Initialization and de-initialization functions *****************************/
641	HAL_StatusTypeDef HAL_CAN_Init(CAN_HandleTypeDef *hcan);
642	HAL_StatusTypeDef HAL_CAN_DeInit(CAN_HandleTypeDef *hcan);
643	void HAL_CAN_MspInit(CAN_HandleTypeDef *hcan);
644	void HAL_CAN_MspDeInit(CAN_HandleTypeDef *hcan);
645
646	#if USE_HAL_CAN_REGISTER_CALLBACKS == 1
647	/* Callbacks Register/UnRegister functions ***********************************/
648	HAL_StatusTypeDef HAL_CAN_RegisterCallback(CAN_HandleTypeDef hcan, HAL_CAN_CallbackIDTypeDef CallbackID, void ( pCallback)(CAN_HandleTypeDef *_hcan));
649	HAL_StatusTypeDef HAL_CAN_UnRegisterCallback(CAN_HandleTypeDef *hcan, HAL_CAN_CallbackIDTypeDef CallbackID);
650
651	#endif /* (USE_HAL_CAN_REGISTER_CALLBACKS) */
652	/**
653	* @}
654	*/
655
656	/** @addtogroup CAN_Exported_Functions_Group2 Configuration functions
657	* @brief Configuration functions
658	* @{
659	*/
660
661	/* Configuration functions ****************************************************/
662	HAL_StatusTypeDef HAL_CAN_ConfigFilter(CAN_HandleTypeDef hcan, CAN_FilterTypeDef sFilterConfig);
663
664	/**
665	* @}
666	*/
667
668	/** @addtogroup CAN_Exported_Functions_Group3 Control functions
669	* @brief Control functions
670	* @{
671	*/
672
673	/* Control functions **********************************************************/
674	HAL_StatusTypeDef HAL_CAN_Start(CAN_HandleTypeDef *hcan);
675	HAL_StatusTypeDef HAL_CAN_Stop(CAN_HandleTypeDef *hcan);
676	HAL_StatusTypeDef HAL_CAN_RequestSleep(CAN_HandleTypeDef *hcan);
677	HAL_StatusTypeDef HAL_CAN_WakeUp(CAN_HandleTypeDef *hcan);
678	uint32_t HAL_CAN_IsSleepActive(CAN_HandleTypeDef *hcan);
679	HAL_StatusTypeDef HAL_CAN_AddTxMessage(CAN_HandleTypeDef hcan, CAN_TxHeaderTypeDef pHeader, uint8_t aData[], uint32_t *pTxMailbox);
680	HAL_StatusTypeDef HAL_CAN_AbortTxRequest(CAN_HandleTypeDef *hcan, uint32_t TxMailboxes);
681	uint32_t HAL_CAN_GetTxMailboxesFreeLevel(CAN_HandleTypeDef *hcan);
682	uint32_t HAL_CAN_IsTxMessagePending(CAN_HandleTypeDef *hcan, uint32_t TxMailboxes);
683	uint32_t HAL_CAN_GetTxTimestamp(CAN_HandleTypeDef *hcan, uint32_t TxMailbox);
684	HAL_StatusTypeDef HAL_CAN_GetRxMessage(CAN_HandleTypeDef hcan, uint32_t RxFifo, CAN_RxHeaderTypeDef pHeader, uint8_t aData[]);
685	uint32_t HAL_CAN_GetRxFifoFillLevel(CAN_HandleTypeDef *hcan, uint32_t RxFifo);
686
687	/**
688	* @}
689	*/
690
691	/** @addtogroup CAN_Exported_Functions_Group4 Interrupts management
692	* @brief Interrupts management
693	* @{
694	*/
695	/* Interrupts management ******************************************************/
696	HAL_StatusTypeDef HAL_CAN_ActivateNotification(CAN_HandleTypeDef *hcan, uint32_t ActiveITs);
697	HAL_StatusTypeDef HAL_CAN_DeactivateNotification(CAN_HandleTypeDef *hcan, uint32_t InactiveITs);
698	void HAL_CAN_IRQHandler(CAN_HandleTypeDef *hcan);
699
700	/**
701	* @}
702	*/
703
704	/** @addtogroup CAN_Exported_Functions_Group5 Callback functions
705	* @brief Callback functions
706	* @{
707	*/
708	/* Callbacks functions ********************************************************/
709
710	void HAL_CAN_TxMailbox0CompleteCallback(CAN_HandleTypeDef *hcan);
711	void HAL_CAN_TxMailbox1CompleteCallback(CAN_HandleTypeDef *hcan);
712	void HAL_CAN_TxMailbox2CompleteCallback(CAN_HandleTypeDef *hcan);
713	void HAL_CAN_TxMailbox0AbortCallback(CAN_HandleTypeDef *hcan);
714	void HAL_CAN_TxMailbox1AbortCallback(CAN_HandleTypeDef *hcan);
715	void HAL_CAN_TxMailbox2AbortCallback(CAN_HandleTypeDef *hcan);
716	void HAL_CAN_RxFifo0MsgPendingCallback(CAN_HandleTypeDef *hcan);
717	void HAL_CAN_RxFifo0FullCallback(CAN_HandleTypeDef *hcan);
718	void HAL_CAN_RxFifo1MsgPendingCallback(CAN_HandleTypeDef *hcan);
719	void HAL_CAN_RxFifo1FullCallback(CAN_HandleTypeDef *hcan);
720	void HAL_CAN_SleepCallback(CAN_HandleTypeDef *hcan);
721	void HAL_CAN_WakeUpFromRxMsgCallback(CAN_HandleTypeDef *hcan);
722	void HAL_CAN_ErrorCallback(CAN_HandleTypeDef *hcan);
723
724	/**
725	* @}
726	*/
727
728	/** @addtogroup CAN_Exported_Functions_Group6 Peripheral State and Error functions
729	* @brief CAN Peripheral State functions
730	* @{
731	*/
732	/* Peripheral State and Error functions ***************************************/
733	HAL_CAN_StateTypeDef HAL_CAN_GetState(CAN_HandleTypeDef *hcan);
734	uint32_t HAL_CAN_GetError(CAN_HandleTypeDef *hcan);
735	HAL_StatusTypeDef HAL_CAN_ResetError(CAN_HandleTypeDef *hcan);
736
737	/**
738	* @}
739	*/
740
741	/**
742	* @}
743	*/
744
745	/* Private types -------------------------------------------------------------*/
746	/** @defgroup CAN_Private_Types CAN Private Types
747	* @{
748	*/
749
750	/**
751	* @}
752	*/
753
754	/* Private variables ---------------------------------------------------------*/
755	/** @defgroup CAN_Private_Variables CAN Private Variables
756	* @{
757	*/
758
759	/**
760	* @}
761	*/
762
763	/* Private constants ---------------------------------------------------------*/
764	/** @defgroup CAN_Private_Constants CAN Private Constants
765	* @{
766	*/
767	#define CAN_FLAG_MASK (0x000000FFU)
768	/**
769	* @}
770	*/
771
772	/* Private Macros -----------------------------------------------------------*/
773	/** @defgroup CAN_Private_Macros CAN Private Macros
774	* @{
775	*/
776
777	#define IS_CAN_MODE(MODE) (((MODE) == CAN_MODE_NORMAL) \|\| \
778	((MODE) == CAN_MODE_LOOPBACK)\|\| \
779	((MODE) == CAN_MODE_SILENT) \|\| \
780	((MODE) == CAN_MODE_SILENT_LOOPBACK))
781	#define IS_CAN_SJW(SJW) (((SJW) == CAN_SJW_1TQ) \|\| ((SJW) == CAN_SJW_2TQ) \|\| \
782	((SJW) == CAN_SJW_3TQ) \|\| ((SJW) == CAN_SJW_4TQ))
783	#define IS_CAN_BS1(BS1) (((BS1) == CAN_BS1_1TQ) \|\| ((BS1) == CAN_BS1_2TQ) \|\| \
784	((BS1) == CAN_BS1_3TQ) \|\| ((BS1) == CAN_BS1_4TQ) \|\| \
785	((BS1) == CAN_BS1_5TQ) \|\| ((BS1) == CAN_BS1_6TQ) \|\| \
786	((BS1) == CAN_BS1_7TQ) \|\| ((BS1) == CAN_BS1_8TQ) \|\| \
787	((BS1) == CAN_BS1_9TQ) \|\| ((BS1) == CAN_BS1_10TQ)\|\| \
788	((BS1) == CAN_BS1_11TQ)\|\| ((BS1) == CAN_BS1_12TQ)\|\| \
789	((BS1) == CAN_BS1_13TQ)\|\| ((BS1) == CAN_BS1_14TQ)\|\| \
790	((BS1) == CAN_BS1_15TQ)\|\| ((BS1) == CAN_BS1_16TQ))
791	#define IS_CAN_BS2(BS2) (((BS2) == CAN_BS2_1TQ) \|\| ((BS2) == CAN_BS2_2TQ) \|\| \
792	((BS2) == CAN_BS2_3TQ) \|\| ((BS2) == CAN_BS2_4TQ) \|\| \
793	((BS2) == CAN_BS2_5TQ) \|\| ((BS2) == CAN_BS2_6TQ) \|\| \
794	((BS2) == CAN_BS2_7TQ) \|\| ((BS2) == CAN_BS2_8TQ))
795	#define IS_CAN_PRESCALER(PRESCALER) (((PRESCALER) >= 1U) && ((PRESCALER) <= 1024U))
796	#define IS_CAN_FILTER_ID_HALFWORD(HALFWORD) ((HALFWORD) <= 0xFFFFU)
797	#define IS_CAN_FILTER_BANK_DUAL(BANK) ((BANK) <= 27U)
798	#define IS_CAN_FILTER_BANK_SINGLE(BANK) ((BANK) <= 13U)
799	#define IS_CAN_FILTER_MODE(MODE) (((MODE) == CAN_FILTERMODE_IDMASK) \|\| \
800	((MODE) == CAN_FILTERMODE_IDLIST))
801	#define IS_CAN_FILTER_SCALE(SCALE) (((SCALE) == CAN_FILTERSCALE_16BIT) \|\| \
802	((SCALE) == CAN_FILTERSCALE_32BIT))
803	#define IS_CAN_FILTER_ACTIVATION(ACTIVATION) (((ACTIVATION) == CAN_FILTER_DISABLE) \|\| \
804	((ACTIVATION) == CAN_FILTER_ENABLE))
805	#define IS_CAN_FILTER_FIFO(FIFO) (((FIFO) == CAN_FILTER_FIFO0) \|\| \
806	((FIFO) == CAN_FILTER_FIFO1))
807	#define IS_CAN_TX_MAILBOX(TRANSMITMAILBOX) (((TRANSMITMAILBOX) == CAN_TX_MAILBOX0 ) \|\| \
808	((TRANSMITMAILBOX) == CAN_TX_MAILBOX1 ) \|\| \
809	((TRANSMITMAILBOX) == CAN_TX_MAILBOX2 ))
810	#define IS_CAN_TX_MAILBOX_LIST(TRANSMITMAILBOX) ((TRANSMITMAILBOX) <= (CAN_TX_MAILBOX0 \| CAN_TX_MAILBOX1 \| CAN_TX_MAILBOX2))
811	#define IS_CAN_STDID(STDID) ((STDID) <= 0x7FFU)
812	#define IS_CAN_EXTID(EXTID) ((EXTID) <= 0x1FFFFFFFU)
813	#define IS_CAN_DLC(DLC) ((DLC) <= 8U)
814	#define IS_CAN_IDTYPE(IDTYPE) (((IDTYPE) == CAN_ID_STD) \|\| \
815	((IDTYPE) == CAN_ID_EXT))
816	#define IS_CAN_RTR(RTR) (((RTR) == CAN_RTR_DATA) \|\| ((RTR) == CAN_RTR_REMOTE))
817	#define IS_CAN_RX_FIFO(FIFO) (((FIFO) == CAN_RX_FIFO0) \|\| ((FIFO) == CAN_RX_FIFO1))
818	#define IS_CAN_IT(IT) ((IT) <= (CAN_IT_TX_MAILBOX_EMPTY \| CAN_IT_RX_FIFO0_MSG_PENDING \| \
819	CAN_IT_RX_FIFO0_FULL \| CAN_IT_RX_FIFO0_OVERRUN \| \
820	CAN_IT_RX_FIFO1_MSG_PENDING \| CAN_IT_RX_FIFO1_FULL \| \
821	CAN_IT_RX_FIFO1_OVERRUN \| CAN_IT_WAKEUP \| \
822	CAN_IT_SLEEP_ACK \| CAN_IT_ERROR_WARNING \| \
823	CAN_IT_ERROR_PASSIVE \| CAN_IT_BUSOFF \| \
824	CAN_IT_LAST_ERROR_CODE \| CAN_IT_ERROR))
825
826	/**
827	* @}
828	*/
829	/* End of private macros -----------------------------------------------------*/
830
831	/**
832	* @}
833	*/
834
835
836	#endif /* CAN1 */
837	/**
838	* @}
839	*/
840
841	#ifdef __cplusplus
842	}
843	#endif
844
845	#endif /* STM32F4xx_HAL_CAN_H */
846
847
848	/********************** (C) COPYRIGHT STMicroelectronics *END OF FILE**/

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source: S-port/trunk/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_can.h

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