source: S-port/trunk/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dac.h

Last change on this file was 1, checked in by AlexLir, 3 years ago
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1/**
2 ******************************************************************************
3 * @file stm32f4xx_hal_dac.h
4 * @author MCD Application Team
5 * @brief Header file of DAC HAL module.
6 ******************************************************************************
7 * @attention
8 *
9 * <h2><center>&copy; Copyright (c) 2016 STMicroelectronics.
10 * All rights reserved.</center></h2>
11 *
12 * This software component is licensed by ST under BSD 3-Clause license,
13 * the "License"; You may not use this file except in compliance with the
14 * License. You may obtain a copy of the License at:
15 * opensource.org/licenses/BSD-3-Clause
16 *
17 ******************************************************************************
18 */
19
20/* Define to prevent recursive inclusion -------------------------------------*/
21#ifndef STM32F4xx_HAL_DAC_H
22#define STM32F4xx_HAL_DAC_H
23
24#ifdef __cplusplus
25extern "C" {
26#endif
27
28/** @addtogroup STM32F4xx_HAL_Driver
29 * @{
30 */
31
32/* Includes ------------------------------------------------------------------*/
33#include "stm32f4xx_hal_def.h"
34
35#if defined(DAC)
36
37/** @addtogroup DAC
38 * @{
39 */
40
41/* Exported types ------------------------------------------------------------*/
42
43/** @defgroup DAC_Exported_Types DAC Exported Types
44 * @{
45 */
46
47/**
48 * @brief HAL State structures definition
49 */
50typedef enum
51{
52 HAL_DAC_STATE_RESET = 0x00U, /*!< DAC not yet initialized or disabled */
53 HAL_DAC_STATE_READY = 0x01U, /*!< DAC initialized and ready for use */
54 HAL_DAC_STATE_BUSY = 0x02U, /*!< DAC internal processing is ongoing */
55 HAL_DAC_STATE_TIMEOUT = 0x03U, /*!< DAC timeout state */
56 HAL_DAC_STATE_ERROR = 0x04U /*!< DAC error state */
57
58} HAL_DAC_StateTypeDef;
59
60/**
61 * @brief DAC handle Structure definition
62 */
63#if (USE_HAL_DAC_REGISTER_CALLBACKS == 1)
64typedef struct __DAC_HandleTypeDef
65#else
66typedef struct
67#endif /* USE_HAL_DAC_REGISTER_CALLBACKS */
68{
69 DAC_TypeDef *Instance; /*!< Register base address */
70
71 __IO HAL_DAC_StateTypeDef State; /*!< DAC communication state */
72
73 HAL_LockTypeDef Lock; /*!< DAC locking object */
74
75 DMA_HandleTypeDef *DMA_Handle1; /*!< Pointer DMA handler for channel 1 */
76
77 DMA_HandleTypeDef *DMA_Handle2; /*!< Pointer DMA handler for channel 2 */
78
79 __IO uint32_t ErrorCode; /*!< DAC Error code */
80
81#if (USE_HAL_DAC_REGISTER_CALLBACKS == 1)
82 void (* ConvCpltCallbackCh1)(struct __DAC_HandleTypeDef *hdac);
83 void (* ConvHalfCpltCallbackCh1)(struct __DAC_HandleTypeDef *hdac);
84 void (* ErrorCallbackCh1)(struct __DAC_HandleTypeDef *hdac);
85 void (* DMAUnderrunCallbackCh1)(struct __DAC_HandleTypeDef *hdac);
86#if defined(DAC_CHANNEL2_SUPPORT)
87 void (* ConvCpltCallbackCh2)(struct __DAC_HandleTypeDef *hdac);
88 void (* ConvHalfCpltCallbackCh2)(struct __DAC_HandleTypeDef *hdac);
89 void (* ErrorCallbackCh2)(struct __DAC_HandleTypeDef *hdac);
90 void (* DMAUnderrunCallbackCh2)(struct __DAC_HandleTypeDef *hdac);
91#endif /* DAC_CHANNEL2_SUPPORT */
92
93 void (* MspInitCallback)(struct __DAC_HandleTypeDef *hdac);
94 void (* MspDeInitCallback)(struct __DAC_HandleTypeDef *hdac);
95#endif /* USE_HAL_DAC_REGISTER_CALLBACKS */
96
97} DAC_HandleTypeDef;
98
99/**
100 * @brief DAC Configuration regular Channel structure definition
101 */
102typedef struct
103{
104 uint32_t DAC_Trigger; /*!< Specifies the external trigger for the selected DAC channel.
105 This parameter can be a value of @ref DAC_trigger_selection */
106
107 uint32_t DAC_OutputBuffer; /*!< Specifies whether the DAC channel output buffer is enabled or disabled.
108 This parameter can be a value of @ref DAC_output_buffer */
109
110} DAC_ChannelConfTypeDef;
111
112#if (USE_HAL_DAC_REGISTER_CALLBACKS == 1)
113/**
114 * @brief HAL DAC Callback ID enumeration definition
115 */
116typedef enum
117{
118 HAL_DAC_CH1_COMPLETE_CB_ID = 0x00U, /*!< DAC CH1 Complete Callback ID */
119 HAL_DAC_CH1_HALF_COMPLETE_CB_ID = 0x01U, /*!< DAC CH1 half Complete Callback ID */
120 HAL_DAC_CH1_ERROR_ID = 0x02U, /*!< DAC CH1 error Callback ID */
121 HAL_DAC_CH1_UNDERRUN_CB_ID = 0x03U, /*!< DAC CH1 underrun Callback ID */
122#if defined(DAC_CHANNEL2_SUPPORT)
123 HAL_DAC_CH2_COMPLETE_CB_ID = 0x04U, /*!< DAC CH2 Complete Callback ID */
124 HAL_DAC_CH2_HALF_COMPLETE_CB_ID = 0x05U, /*!< DAC CH2 half Complete Callback ID */
125 HAL_DAC_CH2_ERROR_ID = 0x06U, /*!< DAC CH2 error Callback ID */
126 HAL_DAC_CH2_UNDERRUN_CB_ID = 0x07U, /*!< DAC CH2 underrun Callback ID */
127#endif /* DAC_CHANNEL2_SUPPORT */
128 HAL_DAC_MSPINIT_CB_ID = 0x08U, /*!< DAC MspInit Callback ID */
129 HAL_DAC_MSPDEINIT_CB_ID = 0x09U, /*!< DAC MspDeInit Callback ID */
130 HAL_DAC_ALL_CB_ID = 0x0AU /*!< DAC All ID */
131} HAL_DAC_CallbackIDTypeDef;
132
133/**
134 * @brief HAL DAC Callback pointer definition
135 */
136typedef void (*pDAC_CallbackTypeDef)(DAC_HandleTypeDef *hdac);
137#endif /* USE_HAL_DAC_REGISTER_CALLBACKS */
138
139/**
140 * @}
141 */
142
143/* Exported constants --------------------------------------------------------*/
144
145/** @defgroup DAC_Exported_Constants DAC Exported Constants
146 * @{
147 */
148
149/** @defgroup DAC_Error_Code DAC Error Code
150 * @{
151 */
152#define HAL_DAC_ERROR_NONE 0x00U /*!< No error */
153#define HAL_DAC_ERROR_DMAUNDERRUNCH1 0x01U /*!< DAC channel1 DMA underrun error */
154#if defined(DAC_CHANNEL2_SUPPORT)
155#define HAL_DAC_ERROR_DMAUNDERRUNCH2 0x02U /*!< DAC channel2 DMA underrun error */
156#endif /* DAC_CHANNEL2_SUPPORT */
157#define HAL_DAC_ERROR_DMA 0x04U /*!< DMA error */
158#define HAL_DAC_ERROR_TIMEOUT 0x08U /*!< Timeout error */
159#if (USE_HAL_DAC_REGISTER_CALLBACKS == 1)
160#define HAL_DAC_ERROR_INVALID_CALLBACK 0x10U /*!< Invalid callback error */
161#endif /* USE_HAL_DAC_REGISTER_CALLBACKS */
162
163/**
164 * @}
165 */
166
167/** @defgroup DAC_trigger_selection DAC trigger selection
168 * @{
169 */
170#define DAC_TRIGGER_NONE 0x00000000UL /*!< Conversion is automatic once the DAC1_DHRxxxx register has been loaded, and not by external trigger */
171#define DAC_TRIGGER_T2_TRGO (DAC_CR_TSEL1_2 | DAC_CR_TEN1) /*!< TIM2 TRGO selected as external conversion trigger for DAC channel */
172#define DAC_TRIGGER_T4_TRGO (DAC_CR_TSEL1_2 | DAC_CR_TSEL1_0 | DAC_CR_TEN1) /*!< TIM4 TRGO selected as external conversion trigger for DAC channel */
173#define DAC_TRIGGER_T5_TRGO ( DAC_CR_TSEL1_1 | DAC_CR_TSEL1_0 | DAC_CR_TEN1) /*!< TIM3 TRGO selected as external conversion trigger for DAC channel */
174#define DAC_TRIGGER_T6_TRGO ( DAC_CR_TEN1) /*!< Conversion started by software trigger for DAC channel */
175#define DAC_TRIGGER_T7_TRGO ( DAC_CR_TSEL1_1 | DAC_CR_TEN1) /*!< TIM7 TRGO selected as external conversion trigger for DAC channel */
176#define DAC_TRIGGER_T8_TRGO ( DAC_CR_TSEL1_0 | DAC_CR_TEN1) /*!< TIM8 TRGO selected as external conversion trigger for DAC channel */
177#define DAC_TRIGGER_EXT_IT9 (DAC_CR_TSEL1_2 | DAC_CR_TSEL1_1 | DAC_CR_TEN1) /*!< EXTI Line9 event selected as external conversion trigger for DAC channel */
178#define DAC_TRIGGER_SOFTWARE (DAC_CR_TSEL1 | DAC_CR_TEN1) /*!< Conversion started by software trigger for DAC channel */
179
180/**
181 * @}
182 */
183
184/** @defgroup DAC_output_buffer DAC output buffer
185 * @{
186 */
187#define DAC_OUTPUTBUFFER_ENABLE 0x00000000U
188#define DAC_OUTPUTBUFFER_DISABLE (DAC_CR_BOFF1)
189
190/**
191 * @}
192 */
193
194/** @defgroup DAC_Channel_selection DAC Channel selection
195 * @{
196 */
197#define DAC_CHANNEL_1 0x00000000U
198#if defined(DAC_CHANNEL2_SUPPORT)
199#define DAC_CHANNEL_2 0x00000010U
200#endif /* DAC_CHANNEL2_SUPPORT */
201/**
202 * @}
203 */
204
205/** @defgroup DAC_data_alignment DAC data alignment
206 * @{
207 */
208#define DAC_ALIGN_12B_R 0x00000000U
209#define DAC_ALIGN_12B_L 0x00000004U
210#define DAC_ALIGN_8B_R 0x00000008U
211
212/**
213 * @}
214 */
215
216/** @defgroup DAC_flags_definition DAC flags definition
217 * @{
218 */
219#define DAC_FLAG_DMAUDR1 (DAC_SR_DMAUDR1)
220#if defined(DAC_CHANNEL2_SUPPORT)
221#define DAC_FLAG_DMAUDR2 (DAC_SR_DMAUDR2)
222#endif /* DAC_CHANNEL2_SUPPORT */
223
224/**
225 * @}
226 */
227
228/** @defgroup DAC_IT_definition DAC IT definition
229 * @{
230 */
231#define DAC_IT_DMAUDR1 (DAC_SR_DMAUDR1)
232#if defined(DAC_CHANNEL2_SUPPORT)
233#define DAC_IT_DMAUDR2 (DAC_SR_DMAUDR2)
234#endif /* DAC_CHANNEL2_SUPPORT */
235
236/**
237 * @}
238 */
239
240/**
241 * @}
242 */
243
244/* Exported macro ------------------------------------------------------------*/
245
246/** @defgroup DAC_Exported_Macros DAC Exported Macros
247 * @{
248 */
249
250/** @brief Reset DAC handle state.
251 * @param __HANDLE__ specifies the DAC handle.
252 * @retval None
253 */
254#if (USE_HAL_DAC_REGISTER_CALLBACKS == 1)
255#define __HAL_DAC_RESET_HANDLE_STATE(__HANDLE__) do { \
256 (__HANDLE__)->State = HAL_DAC_STATE_RESET; \
257 (__HANDLE__)->MspInitCallback = NULL; \
258 (__HANDLE__)->MspDeInitCallback = NULL; \
259 } while(0)
260#else
261#define __HAL_DAC_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_DAC_STATE_RESET)
262#endif /* USE_HAL_DAC_REGISTER_CALLBACKS */
263
264/** @brief Enable the DAC channel.
265 * @param __HANDLE__ specifies the DAC handle.
266 * @param __DAC_Channel__ specifies the DAC channel
267 * @retval None
268 */
269#define __HAL_DAC_ENABLE(__HANDLE__, __DAC_Channel__) \
270 ((__HANDLE__)->Instance->CR |= (DAC_CR_EN1 << ((__DAC_Channel__) & 0x10UL)))
271
272/** @brief Disable the DAC channel.
273 * @param __HANDLE__ specifies the DAC handle
274 * @param __DAC_Channel__ specifies the DAC channel.
275 * @retval None
276 */
277#define __HAL_DAC_DISABLE(__HANDLE__, __DAC_Channel__) \
278 ((__HANDLE__)->Instance->CR &= ~(DAC_CR_EN1 << ((__DAC_Channel__) & 0x10UL)))
279
280/** @brief Set DHR12R1 alignment.
281 * @param __ALIGNMENT__ specifies the DAC alignment
282 * @retval None
283 */
284#define DAC_DHR12R1_ALIGNMENT(__ALIGNMENT__) (0x00000008UL + (__ALIGNMENT__))
285
286#if defined(DAC_CHANNEL2_SUPPORT)
287/** @brief Set DHR12R2 alignment.
288 * @param __ALIGNMENT__ specifies the DAC alignment
289 * @retval None
290 */
291#define DAC_DHR12R2_ALIGNMENT(__ALIGNMENT__) (0x00000014UL + (__ALIGNMENT__))
292#endif /* DAC_CHANNEL2_SUPPORT */
293
294/** @brief Set DHR12RD alignment.
295 * @param __ALIGNMENT__ specifies the DAC alignment
296 * @retval None
297 */
298#define DAC_DHR12RD_ALIGNMENT(__ALIGNMENT__) (0x00000020UL + (__ALIGNMENT__))
299
300/** @brief Enable the DAC interrupt.
301 * @param __HANDLE__ specifies the DAC handle
302 * @param __INTERRUPT__ specifies the DAC interrupt.
303 * This parameter can be any combination of the following values:
304 * @arg DAC_IT_DMAUDR1 DAC channel 1 DMA underrun interrupt
305 * @arg DAC_IT_DMAUDR2 DAC channel 2 DMA underrun interrupt
306 * @retval None
307 */
308#define __HAL_DAC_ENABLE_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->CR) |= (__INTERRUPT__))
309
310/** @brief Disable the DAC interrupt.
311 * @param __HANDLE__ specifies the DAC handle
312 * @param __INTERRUPT__ specifies the DAC interrupt.
313 * This parameter can be any combination of the following values:
314 * @arg DAC_IT_DMAUDR1 DAC channel 1 DMA underrun interrupt
315 * @arg DAC_IT_DMAUDR2 DAC channel 2 DMA underrun interrupt
316 * @retval None
317 */
318#define __HAL_DAC_DISABLE_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->CR) &= ~(__INTERRUPT__))
319
320/** @brief Check whether the specified DAC interrupt source is enabled or not.
321 * @param __HANDLE__ DAC handle
322 * @param __INTERRUPT__ DAC interrupt source to check
323 * This parameter can be any combination of the following values:
324 * @arg DAC_IT_DMAUDR1 DAC channel 1 DMA underrun interrupt
325 * @arg DAC_IT_DMAUDR2 DAC channel 2 DMA underrun interrupt
326 * @retval State of interruption (SET or RESET)
327 */
328#define __HAL_DAC_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->CR\
329 & (__INTERRUPT__)) == (__INTERRUPT__))
330
331/** @brief Get the selected DAC's flag status.
332 * @param __HANDLE__ specifies the DAC handle.
333 * @param __FLAG__ specifies the DAC flag to get.
334 * This parameter can be any combination of the following values:
335 * @arg DAC_FLAG_DMAUDR1 DAC channel 1 DMA underrun flag
336 * @arg DAC_FLAG_DMAUDR2 DAC channel 2 DMA underrun flag
337 * @retval None
338 */
339#define __HAL_DAC_GET_FLAG(__HANDLE__, __FLAG__) ((((__HANDLE__)->Instance->SR) & (__FLAG__)) == (__FLAG__))
340
341/** @brief Clear the DAC's flag.
342 * @param __HANDLE__ specifies the DAC handle.
343 * @param __FLAG__ specifies the DAC flag to clear.
344 * This parameter can be any combination of the following values:
345 * @arg DAC_FLAG_DMAUDR1 DAC channel 1 DMA underrun flag
346 * @arg DAC_FLAG_DMAUDR2 DAC channel 2 DMA underrun flag
347 * @retval None
348 */
349#define __HAL_DAC_CLEAR_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->SR) = (__FLAG__))
350
351/**
352 * @}
353 */
354
355/* Private macro -------------------------------------------------------------*/
356
357/** @defgroup DAC_Private_Macros DAC Private Macros
358 * @{
359 */
360#define IS_DAC_OUTPUT_BUFFER_STATE(STATE) (((STATE) == DAC_OUTPUTBUFFER_ENABLE) || \
361 ((STATE) == DAC_OUTPUTBUFFER_DISABLE))
362
363#if defined(DAC_CHANNEL2_SUPPORT)
364#define IS_DAC_CHANNEL(CHANNEL) (((CHANNEL) == DAC_CHANNEL_1) || \
365 ((CHANNEL) == DAC_CHANNEL_2))
366#else
367#define IS_DAC_CHANNEL(CHANNEL) ((CHANNEL) == DAC_CHANNEL_1)
368#endif /* DAC_CHANNEL2_SUPPORT */
369
370#define IS_DAC_ALIGN(ALIGN) (((ALIGN) == DAC_ALIGN_12B_R) || \
371 ((ALIGN) == DAC_ALIGN_12B_L) || \
372 ((ALIGN) == DAC_ALIGN_8B_R))
373
374#define IS_DAC_DATA(DATA) ((DATA) <= 0xFFF0UL)
375
376/**
377 * @}
378 */
379
380/* Include DAC HAL Extended module */
381#include "stm32f4xx_hal_dac_ex.h"
382
383/* Exported functions --------------------------------------------------------*/
384
385/** @addtogroup DAC_Exported_Functions
386 * @{
387 */
388
389/** @addtogroup DAC_Exported_Functions_Group1
390 * @{
391 */
392/* Initialization and de-initialization functions *****************************/
393HAL_StatusTypeDef HAL_DAC_Init(DAC_HandleTypeDef *hdac);
394HAL_StatusTypeDef HAL_DAC_DeInit(DAC_HandleTypeDef *hdac);
395void HAL_DAC_MspInit(DAC_HandleTypeDef *hdac);
396void HAL_DAC_MspDeInit(DAC_HandleTypeDef *hdac);
397
398/**
399 * @}
400 */
401
402/** @addtogroup DAC_Exported_Functions_Group2
403 * @{
404 */
405/* IO operation functions *****************************************************/
406HAL_StatusTypeDef HAL_DAC_Start(DAC_HandleTypeDef *hdac, uint32_t Channel);
407HAL_StatusTypeDef HAL_DAC_Stop(DAC_HandleTypeDef *hdac, uint32_t Channel);
408HAL_StatusTypeDef HAL_DAC_Start_DMA(DAC_HandleTypeDef *hdac, uint32_t Channel, uint32_t *pData, uint32_t Length,
409 uint32_t Alignment);
410HAL_StatusTypeDef HAL_DAC_Stop_DMA(DAC_HandleTypeDef *hdac, uint32_t Channel);
411void HAL_DAC_IRQHandler(DAC_HandleTypeDef *hdac);
412HAL_StatusTypeDef HAL_DAC_SetValue(DAC_HandleTypeDef *hdac, uint32_t Channel, uint32_t Alignment, uint32_t Data);
413
414void HAL_DAC_ConvCpltCallbackCh1(DAC_HandleTypeDef *hdac);
415void HAL_DAC_ConvHalfCpltCallbackCh1(DAC_HandleTypeDef *hdac);
416void HAL_DAC_ErrorCallbackCh1(DAC_HandleTypeDef *hdac);
417void HAL_DAC_DMAUnderrunCallbackCh1(DAC_HandleTypeDef *hdac);
418
419#if (USE_HAL_DAC_REGISTER_CALLBACKS == 1)
420/* DAC callback registering/unregistering */
421HAL_StatusTypeDef HAL_DAC_RegisterCallback(DAC_HandleTypeDef *hdac, HAL_DAC_CallbackIDTypeDef CallbackID,
422 pDAC_CallbackTypeDef pCallback);
423HAL_StatusTypeDef HAL_DAC_UnRegisterCallback(DAC_HandleTypeDef *hdac, HAL_DAC_CallbackIDTypeDef CallbackID);
424#endif /* USE_HAL_DAC_REGISTER_CALLBACKS */
425
426/**
427 * @}
428 */
429
430/** @addtogroup DAC_Exported_Functions_Group3
431 * @{
432 */
433/* Peripheral Control functions ***********************************************/
434uint32_t HAL_DAC_GetValue(DAC_HandleTypeDef *hdac, uint32_t Channel);
435HAL_StatusTypeDef HAL_DAC_ConfigChannel(DAC_HandleTypeDef *hdac, DAC_ChannelConfTypeDef *sConfig, uint32_t Channel);
436/**
437 * @}
438 */
439
440/** @addtogroup DAC_Exported_Functions_Group4
441 * @{
442 */
443/* Peripheral State and Error functions ***************************************/
444HAL_DAC_StateTypeDef HAL_DAC_GetState(DAC_HandleTypeDef *hdac);
445uint32_t HAL_DAC_GetError(DAC_HandleTypeDef *hdac);
446
447/**
448 * @}
449 */
450
451/**
452 * @}
453 */
454
455/** @defgroup DAC_Private_Functions DAC Private Functions
456 * @{
457 */
458void DAC_DMAConvCpltCh1(DMA_HandleTypeDef *hdma);
459void DAC_DMAErrorCh1(DMA_HandleTypeDef *hdma);
460void DAC_DMAHalfConvCpltCh1(DMA_HandleTypeDef *hdma);
461/**
462 * @}
463 */
464
465/**
466 * @}
467 */
468
469#endif /* DAC */
470
471/**
472 * @}
473 */
474
475#ifdef __cplusplus
476}
477#endif
478
479
480#endif /* STM32F4xx_HAL_DAC_H */
481
482/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
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