source: S-port/trunk/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2c.h

Last change on this file was 1, checked in by AlexLir, 4 years ago
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1/**
2 ******************************************************************************
3 * @file stm32f4xx_hal_i2c.h
4 * @author MCD Application Team
5 * @brief Header file of I2C HAL module.
6 ******************************************************************************
7 * @attention
8 *
9 * <h2><center>&copy; Copyright (c) 2016 STMicroelectronics.
10 * All rights reserved.</center></h2>
11 *
12 * This software component is licensed by ST under BSD 3-Clause license,
13 * the "License"; You may not use this file except in compliance with the
14 * License. You may obtain a copy of the License at:
15 * opensource.org/licenses/BSD-3-Clause
16 *
17 ******************************************************************************
18 */
19
20/* Define to prevent recursive inclusion -------------------------------------*/
21#ifndef __STM32F4xx_HAL_I2C_H
22#define __STM32F4xx_HAL_I2C_H
23
24#ifdef __cplusplus
25extern "C" {
26#endif
27
28/* Includes ------------------------------------------------------------------*/
29#include "stm32f4xx_hal_def.h"
30
31/** @addtogroup STM32F4xx_HAL_Driver
32 * @{
33 */
34
35/** @addtogroup I2C
36 * @{
37 */
38
39/* Exported types ------------------------------------------------------------*/
40/** @defgroup I2C_Exported_Types I2C Exported Types
41 * @{
42 */
43
44/** @defgroup I2C_Configuration_Structure_definition I2C Configuration Structure definition
45 * @brief I2C Configuration Structure definition
46 * @{
47 */
48typedef struct
49{
50 uint32_t ClockSpeed; /*!< Specifies the clock frequency.
51 This parameter must be set to a value lower than 400kHz */
52
53 uint32_t DutyCycle; /*!< Specifies the I2C fast mode duty cycle.
54 This parameter can be a value of @ref I2C_duty_cycle_in_fast_mode */
55
56 uint32_t OwnAddress1; /*!< Specifies the first device own address.
57 This parameter can be a 7-bit or 10-bit address. */
58
59 uint32_t AddressingMode; /*!< Specifies if 7-bit or 10-bit addressing mode is selected.
60 This parameter can be a value of @ref I2C_addressing_mode */
61
62 uint32_t DualAddressMode; /*!< Specifies if dual addressing mode is selected.
63 This parameter can be a value of @ref I2C_dual_addressing_mode */
64
65 uint32_t OwnAddress2; /*!< Specifies the second device own address if dual addressing mode is selected
66 This parameter can be a 7-bit address. */
67
68 uint32_t GeneralCallMode; /*!< Specifies if general call mode is selected.
69 This parameter can be a value of @ref I2C_general_call_addressing_mode */
70
71 uint32_t NoStretchMode; /*!< Specifies if nostretch mode is selected.
72 This parameter can be a value of @ref I2C_nostretch_mode */
73
74} I2C_InitTypeDef;
75
76/**
77 * @}
78 */
79
80/** @defgroup HAL_state_structure_definition HAL state structure definition
81 * @brief HAL State structure definition
82 * @note HAL I2C State value coding follow below described bitmap :
83 * b7-b6 Error information
84 * 00 : No Error
85 * 01 : Abort (Abort user request on going)
86 * 10 : Timeout
87 * 11 : Error
88 * b5 Peripheral initialization status
89 * 0 : Reset (Peripheral not initialized)
90 * 1 : Init done (Peripheral initialized and ready to use. HAL I2C Init function called)
91 * b4 (not used)
92 * x : Should be set to 0
93 * b3
94 * 0 : Ready or Busy (No Listen mode ongoing)
95 * 1 : Listen (Peripheral in Address Listen Mode)
96 * b2 Intrinsic process state
97 * 0 : Ready
98 * 1 : Busy (Peripheral busy with some configuration or internal operations)
99 * b1 Rx state
100 * 0 : Ready (no Rx operation ongoing)
101 * 1 : Busy (Rx operation ongoing)
102 * b0 Tx state
103 * 0 : Ready (no Tx operation ongoing)
104 * 1 : Busy (Tx operation ongoing)
105 * @{
106 */
107typedef enum
108{
109 HAL_I2C_STATE_RESET = 0x00U, /*!< Peripheral is not yet Initialized */
110 HAL_I2C_STATE_READY = 0x20U, /*!< Peripheral Initialized and ready for use */
111 HAL_I2C_STATE_BUSY = 0x24U, /*!< An internal process is ongoing */
112 HAL_I2C_STATE_BUSY_TX = 0x21U, /*!< Data Transmission process is ongoing */
113 HAL_I2C_STATE_BUSY_RX = 0x22U, /*!< Data Reception process is ongoing */
114 HAL_I2C_STATE_LISTEN = 0x28U, /*!< Address Listen Mode is ongoing */
115 HAL_I2C_STATE_BUSY_TX_LISTEN = 0x29U, /*!< Address Listen Mode and Data Transmission
116 process is ongoing */
117 HAL_I2C_STATE_BUSY_RX_LISTEN = 0x2AU, /*!< Address Listen Mode and Data Reception
118 process is ongoing */
119 HAL_I2C_STATE_ABORT = 0x60U, /*!< Abort user request ongoing */
120 HAL_I2C_STATE_TIMEOUT = 0xA0U, /*!< Timeout state */
121 HAL_I2C_STATE_ERROR = 0xE0U /*!< Error */
122
123} HAL_I2C_StateTypeDef;
124
125/**
126 * @}
127 */
128
129/** @defgroup HAL_mode_structure_definition HAL mode structure definition
130 * @brief HAL Mode structure definition
131 * @note HAL I2C Mode value coding follow below described bitmap :\n
132 * b7 (not used)\n
133 * x : Should be set to 0\n
134 * b6\n
135 * 0 : None\n
136 * 1 : Memory (HAL I2C communication is in Memory Mode)\n
137 * b5\n
138 * 0 : None\n
139 * 1 : Slave (HAL I2C communication is in Slave Mode)\n
140 * b4\n
141 * 0 : None\n
142 * 1 : Master (HAL I2C communication is in Master Mode)\n
143 * b3-b2-b1-b0 (not used)\n
144 * xxxx : Should be set to 0000
145 * @{
146 */
147typedef enum
148{
149 HAL_I2C_MODE_NONE = 0x00U, /*!< No I2C communication on going */
150 HAL_I2C_MODE_MASTER = 0x10U, /*!< I2C communication is in Master Mode */
151 HAL_I2C_MODE_SLAVE = 0x20U, /*!< I2C communication is in Slave Mode */
152 HAL_I2C_MODE_MEM = 0x40U /*!< I2C communication is in Memory Mode */
153
154} HAL_I2C_ModeTypeDef;
155
156/**
157 * @}
158 */
159
160/** @defgroup I2C_Error_Code_definition I2C Error Code definition
161 * @brief I2C Error Code definition
162 * @{
163 */
164#define HAL_I2C_ERROR_NONE 0x00000000U /*!< No error */
165#define HAL_I2C_ERROR_BERR 0x00000001U /*!< BERR error */
166#define HAL_I2C_ERROR_ARLO 0x00000002U /*!< ARLO error */
167#define HAL_I2C_ERROR_AF 0x00000004U /*!< AF error */
168#define HAL_I2C_ERROR_OVR 0x00000008U /*!< OVR error */
169#define HAL_I2C_ERROR_DMA 0x00000010U /*!< DMA transfer error */
170#define HAL_I2C_ERROR_TIMEOUT 0x00000020U /*!< Timeout Error */
171#define HAL_I2C_ERROR_SIZE 0x00000040U /*!< Size Management error */
172#define HAL_I2C_ERROR_DMA_PARAM 0x00000080U /*!< DMA Parameter Error */
173#define HAL_I2C_WRONG_START 0x00000200U /*!< Wrong start Error */
174#if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
175#define HAL_I2C_ERROR_INVALID_CALLBACK 0x00000100U /*!< Invalid Callback error */
176#endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
177/**
178 * @}
179 */
180
181/** @defgroup I2C_handle_Structure_definition I2C handle Structure definition
182 * @brief I2C handle Structure definition
183 * @{
184 */
185#if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
186typedef struct __I2C_HandleTypeDef
187#else
188typedef struct
189#endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
190{
191 I2C_TypeDef *Instance; /*!< I2C registers base address */
192
193 I2C_InitTypeDef Init; /*!< I2C communication parameters */
194
195 uint8_t *pBuffPtr; /*!< Pointer to I2C transfer buffer */
196
197 uint16_t XferSize; /*!< I2C transfer size */
198
199 __IO uint16_t XferCount; /*!< I2C transfer counter */
200
201 __IO uint32_t XferOptions; /*!< I2C transfer options */
202
203 __IO uint32_t PreviousState; /*!< I2C communication Previous state and mode
204 context for internal usage */
205
206 DMA_HandleTypeDef *hdmatx; /*!< I2C Tx DMA handle parameters */
207
208 DMA_HandleTypeDef *hdmarx; /*!< I2C Rx DMA handle parameters */
209
210 HAL_LockTypeDef Lock; /*!< I2C locking object */
211
212 __IO HAL_I2C_StateTypeDef State; /*!< I2C communication state */
213
214 __IO HAL_I2C_ModeTypeDef Mode; /*!< I2C communication mode */
215
216 __IO uint32_t ErrorCode; /*!< I2C Error code */
217
218 __IO uint32_t Devaddress; /*!< I2C Target device address */
219
220 __IO uint32_t Memaddress; /*!< I2C Target memory address */
221
222 __IO uint32_t MemaddSize; /*!< I2C Target memory address size */
223
224 __IO uint32_t EventCount; /*!< I2C Event counter */
225
226
227#if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
228 void (* MasterTxCpltCallback)(struct __I2C_HandleTypeDef *hi2c); /*!< I2C Master Tx Transfer completed callback */
229 void (* MasterRxCpltCallback)(struct __I2C_HandleTypeDef *hi2c); /*!< I2C Master Rx Transfer completed callback */
230 void (* SlaveTxCpltCallback)(struct __I2C_HandleTypeDef *hi2c); /*!< I2C Slave Tx Transfer completed callback */
231 void (* SlaveRxCpltCallback)(struct __I2C_HandleTypeDef *hi2c); /*!< I2C Slave Rx Transfer completed callback */
232 void (* ListenCpltCallback)(struct __I2C_HandleTypeDef *hi2c); /*!< I2C Listen Complete callback */
233 void (* MemTxCpltCallback)(struct __I2C_HandleTypeDef *hi2c); /*!< I2C Memory Tx Transfer completed callback */
234 void (* MemRxCpltCallback)(struct __I2C_HandleTypeDef *hi2c); /*!< I2C Memory Rx Transfer completed callback */
235 void (* ErrorCallback)(struct __I2C_HandleTypeDef *hi2c); /*!< I2C Error callback */
236 void (* AbortCpltCallback)(struct __I2C_HandleTypeDef *hi2c); /*!< I2C Abort callback */
237
238 void (* AddrCallback)(struct __I2C_HandleTypeDef *hi2c, uint8_t TransferDirection, uint16_t AddrMatchCode); /*!< I2C Slave Address Match callback */
239
240 void (* MspInitCallback)(struct __I2C_HandleTypeDef *hi2c); /*!< I2C Msp Init callback */
241 void (* MspDeInitCallback)(struct __I2C_HandleTypeDef *hi2c); /*!< I2C Msp DeInit callback */
242
243#endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
244} I2C_HandleTypeDef;
245
246#if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
247/**
248 * @brief HAL I2C Callback ID enumeration definition
249 */
250typedef enum
251{
252 HAL_I2C_MASTER_TX_COMPLETE_CB_ID = 0x00U, /*!< I2C Master Tx Transfer completed callback ID */
253 HAL_I2C_MASTER_RX_COMPLETE_CB_ID = 0x01U, /*!< I2C Master Rx Transfer completed callback ID */
254 HAL_I2C_SLAVE_TX_COMPLETE_CB_ID = 0x02U, /*!< I2C Slave Tx Transfer completed callback ID */
255 HAL_I2C_SLAVE_RX_COMPLETE_CB_ID = 0x03U, /*!< I2C Slave Rx Transfer completed callback ID */
256 HAL_I2C_LISTEN_COMPLETE_CB_ID = 0x04U, /*!< I2C Listen Complete callback ID */
257 HAL_I2C_MEM_TX_COMPLETE_CB_ID = 0x05U, /*!< I2C Memory Tx Transfer callback ID */
258 HAL_I2C_MEM_RX_COMPLETE_CB_ID = 0x06U, /*!< I2C Memory Rx Transfer completed callback ID */
259 HAL_I2C_ERROR_CB_ID = 0x07U, /*!< I2C Error callback ID */
260 HAL_I2C_ABORT_CB_ID = 0x08U, /*!< I2C Abort callback ID */
261
262 HAL_I2C_MSPINIT_CB_ID = 0x09U, /*!< I2C Msp Init callback ID */
263 HAL_I2C_MSPDEINIT_CB_ID = 0x0AU /*!< I2C Msp DeInit callback ID */
264
265} HAL_I2C_CallbackIDTypeDef;
266
267/**
268 * @brief HAL I2C Callback pointer definition
269 */
270typedef void (*pI2C_CallbackTypeDef)(I2C_HandleTypeDef *hi2c); /*!< pointer to an I2C callback function */
271typedef void (*pI2C_AddrCallbackTypeDef)(I2C_HandleTypeDef *hi2c, uint8_t TransferDirection, uint16_t AddrMatchCode); /*!< pointer to an I2C Address Match callback function */
272
273#endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
274/**
275 * @}
276 */
277
278/**
279 * @}
280 */
281/* Exported constants --------------------------------------------------------*/
282
283/** @defgroup I2C_Exported_Constants I2C Exported Constants
284 * @{
285 */
286
287/** @defgroup I2C_duty_cycle_in_fast_mode I2C duty cycle in fast mode
288 * @{
289 */
290#define I2C_DUTYCYCLE_2 0x00000000U
291#define I2C_DUTYCYCLE_16_9 I2C_CCR_DUTY
292/**
293 * @}
294 */
295
296/** @defgroup I2C_addressing_mode I2C addressing mode
297 * @{
298 */
299#define I2C_ADDRESSINGMODE_7BIT 0x00004000U
300#define I2C_ADDRESSINGMODE_10BIT (I2C_OAR1_ADDMODE | 0x00004000U)
301/**
302 * @}
303 */
304
305/** @defgroup I2C_dual_addressing_mode I2C dual addressing mode
306 * @{
307 */
308#define I2C_DUALADDRESS_DISABLE 0x00000000U
309#define I2C_DUALADDRESS_ENABLE I2C_OAR2_ENDUAL
310/**
311 * @}
312 */
313
314/** @defgroup I2C_general_call_addressing_mode I2C general call addressing mode
315 * @{
316 */
317#define I2C_GENERALCALL_DISABLE 0x00000000U
318#define I2C_GENERALCALL_ENABLE I2C_CR1_ENGC
319/**
320 * @}
321 */
322
323/** @defgroup I2C_nostretch_mode I2C nostretch mode
324 * @{
325 */
326#define I2C_NOSTRETCH_DISABLE 0x00000000U
327#define I2C_NOSTRETCH_ENABLE I2C_CR1_NOSTRETCH
328/**
329 * @}
330 */
331
332/** @defgroup I2C_Memory_Address_Size I2C Memory Address Size
333 * @{
334 */
335#define I2C_MEMADD_SIZE_8BIT 0x00000001U
336#define I2C_MEMADD_SIZE_16BIT 0x00000010U
337/**
338 * @}
339 */
340
341/** @defgroup I2C_XferDirection_definition I2C XferDirection definition
342 * @{
343 */
344#define I2C_DIRECTION_RECEIVE 0x00000000U
345#define I2C_DIRECTION_TRANSMIT 0x00000001U
346/**
347 * @}
348 */
349
350/** @defgroup I2C_XferOptions_definition I2C XferOptions definition
351 * @{
352 */
353#define I2C_FIRST_FRAME 0x00000001U
354#define I2C_FIRST_AND_NEXT_FRAME 0x00000002U
355#define I2C_NEXT_FRAME 0x00000004U
356#define I2C_FIRST_AND_LAST_FRAME 0x00000008U
357#define I2C_LAST_FRAME_NO_STOP 0x00000010U
358#define I2C_LAST_FRAME 0x00000020U
359
360/* List of XferOptions in usage of :
361 * 1- Restart condition in all use cases (direction change or not)
362 */
363#define I2C_OTHER_FRAME (0x00AA0000U)
364#define I2C_OTHER_AND_LAST_FRAME (0xAA000000U)
365/**
366 * @}
367 */
368
369/** @defgroup I2C_Interrupt_configuration_definition I2C Interrupt configuration definition
370 * @brief I2C Interrupt definition
371 * Elements values convention: 0xXXXXXXXX
372 * - XXXXXXXX : Interrupt control mask
373 * @{
374 */
375#define I2C_IT_BUF I2C_CR2_ITBUFEN
376#define I2C_IT_EVT I2C_CR2_ITEVTEN
377#define I2C_IT_ERR I2C_CR2_ITERREN
378/**
379 * @}
380 */
381
382/** @defgroup I2C_Flag_definition I2C Flag definition
383 * @{
384 */
385
386#define I2C_FLAG_OVR 0x00010800U
387#define I2C_FLAG_AF 0x00010400U
388#define I2C_FLAG_ARLO 0x00010200U
389#define I2C_FLAG_BERR 0x00010100U
390#define I2C_FLAG_TXE 0x00010080U
391#define I2C_FLAG_RXNE 0x00010040U
392#define I2C_FLAG_STOPF 0x00010010U
393#define I2C_FLAG_ADD10 0x00010008U
394#define I2C_FLAG_BTF 0x00010004U
395#define I2C_FLAG_ADDR 0x00010002U
396#define I2C_FLAG_SB 0x00010001U
397#define I2C_FLAG_DUALF 0x00100080U
398#define I2C_FLAG_GENCALL 0x00100010U
399#define I2C_FLAG_TRA 0x00100004U
400#define I2C_FLAG_BUSY 0x00100002U
401#define I2C_FLAG_MSL 0x00100001U
402/**
403 * @}
404 */
405
406/**
407 * @}
408 */
409
410/* Exported macros -----------------------------------------------------------*/
411
412/** @defgroup I2C_Exported_Macros I2C Exported Macros
413 * @{
414 */
415
416/** @brief Reset I2C handle state.
417 * @param __HANDLE__ specifies the I2C Handle.
418 * @retval None
419 */
420#if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
421#define __HAL_I2C_RESET_HANDLE_STATE(__HANDLE__) do{ \
422 (__HANDLE__)->State = HAL_I2C_STATE_RESET; \
423 (__HANDLE__)->MspInitCallback = NULL; \
424 (__HANDLE__)->MspDeInitCallback = NULL; \
425 } while(0)
426#else
427#define __HAL_I2C_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_I2C_STATE_RESET)
428#endif
429
430/** @brief Enable or disable the specified I2C interrupts.
431 * @param __HANDLE__ specifies the I2C Handle.
432 * @param __INTERRUPT__ specifies the interrupt source to enable or disable.
433 * This parameter can be one of the following values:
434 * @arg I2C_IT_BUF: Buffer interrupt enable
435 * @arg I2C_IT_EVT: Event interrupt enable
436 * @arg I2C_IT_ERR: Error interrupt enable
437 * @retval None
438 */
439#define __HAL_I2C_ENABLE_IT(__HANDLE__, __INTERRUPT__) SET_BIT((__HANDLE__)->Instance->CR2,(__INTERRUPT__))
440#define __HAL_I2C_DISABLE_IT(__HANDLE__, __INTERRUPT__) CLEAR_BIT((__HANDLE__)->Instance->CR2, (__INTERRUPT__))
441
442/** @brief Checks if the specified I2C interrupt source is enabled or disabled.
443 * @param __HANDLE__ specifies the I2C Handle.
444 * @param __INTERRUPT__ specifies the I2C interrupt source to check.
445 * This parameter can be one of the following values:
446 * @arg I2C_IT_BUF: Buffer interrupt enable
447 * @arg I2C_IT_EVT: Event interrupt enable
448 * @arg I2C_IT_ERR: Error interrupt enable
449 * @retval The new state of __INTERRUPT__ (TRUE or FALSE).
450 */
451#define __HAL_I2C_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->CR2 & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
452
453/** @brief Checks whether the specified I2C flag is set or not.
454 * @param __HANDLE__ specifies the I2C Handle.
455 * @param __FLAG__ specifies the flag to check.
456 * This parameter can be one of the following values:
457 * @arg I2C_FLAG_OVR: Overrun/Underrun flag
458 * @arg I2C_FLAG_AF: Acknowledge failure flag
459 * @arg I2C_FLAG_ARLO: Arbitration lost flag
460 * @arg I2C_FLAG_BERR: Bus error flag
461 * @arg I2C_FLAG_TXE: Data register empty flag
462 * @arg I2C_FLAG_RXNE: Data register not empty flag
463 * @arg I2C_FLAG_STOPF: Stop detection flag
464 * @arg I2C_FLAG_ADD10: 10-bit header sent flag
465 * @arg I2C_FLAG_BTF: Byte transfer finished flag
466 * @arg I2C_FLAG_ADDR: Address sent flag
467 * Address matched flag
468 * @arg I2C_FLAG_SB: Start bit flag
469 * @arg I2C_FLAG_DUALF: Dual flag
470 * @arg I2C_FLAG_GENCALL: General call header flag
471 * @arg I2C_FLAG_TRA: Transmitter/Receiver flag
472 * @arg I2C_FLAG_BUSY: Bus busy flag
473 * @arg I2C_FLAG_MSL: Master/Slave flag
474 * @retval The new state of __FLAG__ (TRUE or FALSE).
475 */
476#define __HAL_I2C_GET_FLAG(__HANDLE__, __FLAG__) ((((uint8_t)((__FLAG__) >> 16U)) == 0x01U) ? \
477 (((((__HANDLE__)->Instance->SR1) & ((__FLAG__) & I2C_FLAG_MASK)) == ((__FLAG__) & I2C_FLAG_MASK)) ? SET : RESET) : \
478 (((((__HANDLE__)->Instance->SR2) & ((__FLAG__) & I2C_FLAG_MASK)) == ((__FLAG__) & I2C_FLAG_MASK)) ? SET : RESET))
479
480/** @brief Clears the I2C pending flags which are cleared by writing 0 in a specific bit.
481 * @param __HANDLE__ specifies the I2C Handle.
482 * @param __FLAG__ specifies the flag to clear.
483 * This parameter can be any combination of the following values:
484 * @arg I2C_FLAG_OVR: Overrun/Underrun flag (Slave mode)
485 * @arg I2C_FLAG_AF: Acknowledge failure flag
486 * @arg I2C_FLAG_ARLO: Arbitration lost flag (Master mode)
487 * @arg I2C_FLAG_BERR: Bus error flag
488 * @retval None
489 */
490#define __HAL_I2C_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->SR1 = ~((__FLAG__) & I2C_FLAG_MASK))
491
492/** @brief Clears the I2C ADDR pending flag.
493 * @param __HANDLE__ specifies the I2C Handle.
494 * This parameter can be I2C where x: 1, 2, or 3 to select the I2C peripheral.
495 * @retval None
496 */
497#define __HAL_I2C_CLEAR_ADDRFLAG(__HANDLE__) \
498 do{ \
499 __IO uint32_t tmpreg = 0x00U; \
500 tmpreg = (__HANDLE__)->Instance->SR1; \
501 tmpreg = (__HANDLE__)->Instance->SR2; \
502 UNUSED(tmpreg); \
503 } while(0)
504
505/** @brief Clears the I2C STOPF pending flag.
506 * @param __HANDLE__ specifies the I2C Handle.
507 * @retval None
508 */
509#define __HAL_I2C_CLEAR_STOPFLAG(__HANDLE__) \
510 do{ \
511 __IO uint32_t tmpreg = 0x00U; \
512 tmpreg = (__HANDLE__)->Instance->SR1; \
513 SET_BIT((__HANDLE__)->Instance->CR1, I2C_CR1_PE); \
514 UNUSED(tmpreg); \
515 } while(0)
516
517/** @brief Enable the specified I2C peripheral.
518 * @param __HANDLE__ specifies the I2C Handle.
519 * @retval None
520 */
521#define __HAL_I2C_ENABLE(__HANDLE__) SET_BIT((__HANDLE__)->Instance->CR1, I2C_CR1_PE)
522
523/** @brief Disable the specified I2C peripheral.
524 * @param __HANDLE__ specifies the I2C Handle.
525 * @retval None
526 */
527#define __HAL_I2C_DISABLE(__HANDLE__) CLEAR_BIT((__HANDLE__)->Instance->CR1, I2C_CR1_PE)
528
529/**
530 * @}
531 */
532
533/* Include I2C HAL Extension module */
534#include "stm32f4xx_hal_i2c_ex.h"
535
536/* Exported functions --------------------------------------------------------*/
537/** @addtogroup I2C_Exported_Functions
538 * @{
539 */
540
541/** @addtogroup I2C_Exported_Functions_Group1 Initialization and de-initialization functions
542 * @{
543 */
544/* Initialization and de-initialization functions******************************/
545HAL_StatusTypeDef HAL_I2C_Init(I2C_HandleTypeDef *hi2c);
546HAL_StatusTypeDef HAL_I2C_DeInit(I2C_HandleTypeDef *hi2c);
547void HAL_I2C_MspInit(I2C_HandleTypeDef *hi2c);
548void HAL_I2C_MspDeInit(I2C_HandleTypeDef *hi2c);
549
550/* Callbacks Register/UnRegister functions ***********************************/
551#if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
552HAL_StatusTypeDef HAL_I2C_RegisterCallback(I2C_HandleTypeDef *hi2c, HAL_I2C_CallbackIDTypeDef CallbackID, pI2C_CallbackTypeDef pCallback);
553HAL_StatusTypeDef HAL_I2C_UnRegisterCallback(I2C_HandleTypeDef *hi2c, HAL_I2C_CallbackIDTypeDef CallbackID);
554
555HAL_StatusTypeDef HAL_I2C_RegisterAddrCallback(I2C_HandleTypeDef *hi2c, pI2C_AddrCallbackTypeDef pCallback);
556HAL_StatusTypeDef HAL_I2C_UnRegisterAddrCallback(I2C_HandleTypeDef *hi2c);
557#endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
558/**
559 * @}
560 */
561
562/** @addtogroup I2C_Exported_Functions_Group2 Input and Output operation functions
563 * @{
564 */
565/* IO operation functions ****************************************************/
566/******* Blocking mode: Polling */
567HAL_StatusTypeDef HAL_I2C_Master_Transmit(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout);
568HAL_StatusTypeDef HAL_I2C_Master_Receive(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout);
569HAL_StatusTypeDef HAL_I2C_Slave_Transmit(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t Timeout);
570HAL_StatusTypeDef HAL_I2C_Slave_Receive(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t Timeout);
571HAL_StatusTypeDef HAL_I2C_Mem_Write(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout);
572HAL_StatusTypeDef HAL_I2C_Mem_Read(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout);
573HAL_StatusTypeDef HAL_I2C_IsDeviceReady(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Trials, uint32_t Timeout);
574
575/******* Non-Blocking mode: Interrupt */
576HAL_StatusTypeDef HAL_I2C_Master_Transmit_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size);
577HAL_StatusTypeDef HAL_I2C_Master_Receive_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size);
578HAL_StatusTypeDef HAL_I2C_Slave_Transmit_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size);
579HAL_StatusTypeDef HAL_I2C_Slave_Receive_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size);
580HAL_StatusTypeDef HAL_I2C_Mem_Write_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size);
581HAL_StatusTypeDef HAL_I2C_Mem_Read_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size);
582
583HAL_StatusTypeDef HAL_I2C_Master_Seq_Transmit_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions);
584HAL_StatusTypeDef HAL_I2C_Master_Seq_Receive_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions);
585HAL_StatusTypeDef HAL_I2C_Slave_Seq_Transmit_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t XferOptions);
586HAL_StatusTypeDef HAL_I2C_Slave_Seq_Receive_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t XferOptions);
587HAL_StatusTypeDef HAL_I2C_EnableListen_IT(I2C_HandleTypeDef *hi2c);
588HAL_StatusTypeDef HAL_I2C_DisableListen_IT(I2C_HandleTypeDef *hi2c);
589HAL_StatusTypeDef HAL_I2C_Master_Abort_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress);
590
591/******* Non-Blocking mode: DMA */
592HAL_StatusTypeDef HAL_I2C_Master_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size);
593HAL_StatusTypeDef HAL_I2C_Master_Receive_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size);
594HAL_StatusTypeDef HAL_I2C_Slave_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size);
595HAL_StatusTypeDef HAL_I2C_Slave_Receive_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size);
596HAL_StatusTypeDef HAL_I2C_Mem_Write_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size);
597HAL_StatusTypeDef HAL_I2C_Mem_Read_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size);
598
599HAL_StatusTypeDef HAL_I2C_Master_Seq_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions);
600HAL_StatusTypeDef HAL_I2C_Master_Seq_Receive_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions);
601HAL_StatusTypeDef HAL_I2C_Slave_Seq_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t XferOptions);
602HAL_StatusTypeDef HAL_I2C_Slave_Seq_Receive_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t XferOptions);
603/**
604 * @}
605 */
606
607/** @addtogroup I2C_IRQ_Handler_and_Callbacks IRQ Handler and Callbacks
608 * @{
609 */
610/******* I2C IRQHandler and Callbacks used in non blocking modes (Interrupt and DMA) */
611void HAL_I2C_EV_IRQHandler(I2C_HandleTypeDef *hi2c);
612void HAL_I2C_ER_IRQHandler(I2C_HandleTypeDef *hi2c);
613void HAL_I2C_MasterTxCpltCallback(I2C_HandleTypeDef *hi2c);
614void HAL_I2C_MasterRxCpltCallback(I2C_HandleTypeDef *hi2c);
615void HAL_I2C_SlaveTxCpltCallback(I2C_HandleTypeDef *hi2c);
616void HAL_I2C_SlaveRxCpltCallback(I2C_HandleTypeDef *hi2c);
617void HAL_I2C_AddrCallback(I2C_HandleTypeDef *hi2c, uint8_t TransferDirection, uint16_t AddrMatchCode);
618void HAL_I2C_ListenCpltCallback(I2C_HandleTypeDef *hi2c);
619void HAL_I2C_MemTxCpltCallback(I2C_HandleTypeDef *hi2c);
620void HAL_I2C_MemRxCpltCallback(I2C_HandleTypeDef *hi2c);
621void HAL_I2C_ErrorCallback(I2C_HandleTypeDef *hi2c);
622void HAL_I2C_AbortCpltCallback(I2C_HandleTypeDef *hi2c);
623/**
624 * @}
625 */
626
627/** @addtogroup I2C_Exported_Functions_Group3 Peripheral State, Mode and Error functions
628 * @{
629 */
630/* Peripheral State, Mode and Error functions *********************************/
631HAL_I2C_StateTypeDef HAL_I2C_GetState(I2C_HandleTypeDef *hi2c);
632HAL_I2C_ModeTypeDef HAL_I2C_GetMode(I2C_HandleTypeDef *hi2c);
633uint32_t HAL_I2C_GetError(I2C_HandleTypeDef *hi2c);
634
635/**
636 * @}
637 */
638
639/**
640 * @}
641 */
642/* Private types -------------------------------------------------------------*/
643/* Private variables ---------------------------------------------------------*/
644/* Private constants ---------------------------------------------------------*/
645/** @defgroup I2C_Private_Constants I2C Private Constants
646 * @{
647 */
648#define I2C_FLAG_MASK 0x0000FFFFU
649#define I2C_MIN_PCLK_FREQ_STANDARD 2000000U /*!< 2 MHz */
650#define I2C_MIN_PCLK_FREQ_FAST 4000000U /*!< 4 MHz */
651/**
652 * @}
653 */
654
655/* Private macros ------------------------------------------------------------*/
656/** @defgroup I2C_Private_Macros I2C Private Macros
657 * @{
658 */
659
660#define I2C_MIN_PCLK_FREQ(__PCLK__, __SPEED__) (((__SPEED__) <= 100000U) ? ((__PCLK__) < I2C_MIN_PCLK_FREQ_STANDARD) : ((__PCLK__) < I2C_MIN_PCLK_FREQ_FAST))
661#define I2C_CCR_CALCULATION(__PCLK__, __SPEED__, __COEFF__) (((((__PCLK__) - 1U)/((__SPEED__) * (__COEFF__))) + 1U) & I2C_CCR_CCR)
662#define I2C_FREQRANGE(__PCLK__) ((__PCLK__)/1000000U)
663#define I2C_RISE_TIME(__FREQRANGE__, __SPEED__) (((__SPEED__) <= 100000U) ? ((__FREQRANGE__) + 1U) : ((((__FREQRANGE__) * 300U) / 1000U) + 1U))
664#define I2C_SPEED_STANDARD(__PCLK__, __SPEED__) ((I2C_CCR_CALCULATION((__PCLK__), (__SPEED__), 2U) < 4U)? 4U:I2C_CCR_CALCULATION((__PCLK__), (__SPEED__), 2U))
665#define I2C_SPEED_FAST(__PCLK__, __SPEED__, __DUTYCYCLE__) (((__DUTYCYCLE__) == I2C_DUTYCYCLE_2)? I2C_CCR_CALCULATION((__PCLK__), (__SPEED__), 3U) : (I2C_CCR_CALCULATION((__PCLK__), (__SPEED__), 25U) | I2C_DUTYCYCLE_16_9))
666#define I2C_SPEED(__PCLK__, __SPEED__, __DUTYCYCLE__) (((__SPEED__) <= 100000U)? (I2C_SPEED_STANDARD((__PCLK__), (__SPEED__))) : \
667 ((I2C_SPEED_FAST((__PCLK__), (__SPEED__), (__DUTYCYCLE__)) & I2C_CCR_CCR) == 0U)? 1U : \
668 ((I2C_SPEED_FAST((__PCLK__), (__SPEED__), (__DUTYCYCLE__))) | I2C_CCR_FS))
669
670#define I2C_7BIT_ADD_WRITE(__ADDRESS__) ((uint8_t)((__ADDRESS__) & (uint8_t)(~I2C_OAR1_ADD0)))
671#define I2C_7BIT_ADD_READ(__ADDRESS__) ((uint8_t)((__ADDRESS__) | I2C_OAR1_ADD0))
672
673#define I2C_10BIT_ADDRESS(__ADDRESS__) ((uint8_t)((uint16_t)((__ADDRESS__) & (uint16_t)0x00FF)))
674#define I2C_10BIT_HEADER_WRITE(__ADDRESS__) ((uint8_t)((uint16_t)((uint16_t)(((uint16_t)((__ADDRESS__) & (uint16_t)0x0300)) >> 7) | (uint16_t)0x00F0)))
675#define I2C_10BIT_HEADER_READ(__ADDRESS__) ((uint8_t)((uint16_t)((uint16_t)(((uint16_t)((__ADDRESS__) & (uint16_t)0x0300)) >> 7) | (uint16_t)(0x00F1))))
676
677#define I2C_MEM_ADD_MSB(__ADDRESS__) ((uint8_t)((uint16_t)(((uint16_t)((__ADDRESS__) & (uint16_t)0xFF00)) >> 8)))
678#define I2C_MEM_ADD_LSB(__ADDRESS__) ((uint8_t)((uint16_t)((__ADDRESS__) & (uint16_t)0x00FF)))
679
680/** @defgroup I2C_IS_RTC_Definitions I2C Private macros to check input parameters
681 * @{
682 */
683#define IS_I2C_DUTY_CYCLE(CYCLE) (((CYCLE) == I2C_DUTYCYCLE_2) || \
684 ((CYCLE) == I2C_DUTYCYCLE_16_9))
685#define IS_I2C_ADDRESSING_MODE(ADDRESS) (((ADDRESS) == I2C_ADDRESSINGMODE_7BIT) || \
686 ((ADDRESS) == I2C_ADDRESSINGMODE_10BIT))
687#define IS_I2C_DUAL_ADDRESS(ADDRESS) (((ADDRESS) == I2C_DUALADDRESS_DISABLE) || \
688 ((ADDRESS) == I2C_DUALADDRESS_ENABLE))
689#define IS_I2C_GENERAL_CALL(CALL) (((CALL) == I2C_GENERALCALL_DISABLE) || \
690 ((CALL) == I2C_GENERALCALL_ENABLE))
691#define IS_I2C_NO_STRETCH(STRETCH) (((STRETCH) == I2C_NOSTRETCH_DISABLE) || \
692 ((STRETCH) == I2C_NOSTRETCH_ENABLE))
693#define IS_I2C_MEMADD_SIZE(SIZE) (((SIZE) == I2C_MEMADD_SIZE_8BIT) || \
694 ((SIZE) == I2C_MEMADD_SIZE_16BIT))
695#define IS_I2C_CLOCK_SPEED(SPEED) (((SPEED) > 0U) && ((SPEED) <= 400000U))
696#define IS_I2C_OWN_ADDRESS1(ADDRESS1) (((ADDRESS1) & 0xFFFFFC00U) == 0U)
697#define IS_I2C_OWN_ADDRESS2(ADDRESS2) (((ADDRESS2) & 0xFFFFFF01U) == 0U)
698#define IS_I2C_TRANSFER_OPTIONS_REQUEST(REQUEST) (((REQUEST) == I2C_FIRST_FRAME) || \
699 ((REQUEST) == I2C_FIRST_AND_NEXT_FRAME) || \
700 ((REQUEST) == I2C_NEXT_FRAME) || \
701 ((REQUEST) == I2C_FIRST_AND_LAST_FRAME) || \
702 ((REQUEST) == I2C_LAST_FRAME) || \
703 ((REQUEST) == I2C_LAST_FRAME_NO_STOP) || \
704 IS_I2C_TRANSFER_OTHER_OPTIONS_REQUEST(REQUEST))
705
706#define IS_I2C_TRANSFER_OTHER_OPTIONS_REQUEST(REQUEST) (((REQUEST) == I2C_OTHER_FRAME) || \
707 ((REQUEST) == I2C_OTHER_AND_LAST_FRAME))
708
709#define I2C_CHECK_FLAG(__ISR__, __FLAG__) ((((__ISR__) & ((__FLAG__) & I2C_FLAG_MASK)) == ((__FLAG__) & I2C_FLAG_MASK)) ? SET : RESET)
710#define I2C_CHECK_IT_SOURCE(__CR1__, __IT__) ((((__CR1__) & (__IT__)) == (__IT__)) ? SET : RESET)
711/**
712 * @}
713 */
714
715/**
716 * @}
717 */
718
719/* Private functions ---------------------------------------------------------*/
720/** @defgroup I2C_Private_Functions I2C Private Functions
721 * @{
722 */
723
724/**
725 * @}
726 */
727
728/**
729 * @}
730 */
731
732/**
733 * @}
734 */
735
736#ifdef __cplusplus
737}
738#endif
739
740
741#endif /* __STM32F4xx_HAL_I2C_H */
742
743/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
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