| 1 | /**
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| 2 | ******************************************************************************
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| 3 | * @file stm32f4xx_hal_pwr.h
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| 4 | * @author MCD Application Team
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| 5 | * @brief Header file of PWR HAL module.
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| 6 | ******************************************************************************
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| 7 | * @attention
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| 8 | *
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| 9 | * <h2><center>© Copyright (c) 2017 STMicroelectronics.
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| 10 | * All rights reserved.</center></h2>
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| 11 | *
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| 12 | * This software component is licensed by ST under BSD 3-Clause license,
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| 13 | * the "License"; You may not use this file except in compliance with the
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| 14 | * License. You may obtain a copy of the License at:
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| 15 | * opensource.org/licenses/BSD-3-Clause
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| 16 | *
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| 17 | ******************************************************************************
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| 18 | */
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| 19 |
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| 20 | /* Define to prevent recursive inclusion -------------------------------------*/
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| 21 | #ifndef __STM32F4xx_HAL_PWR_H
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| 22 | #define __STM32F4xx_HAL_PWR_H
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| 23 |
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| 24 | #ifdef __cplusplus
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| 25 | extern "C" {
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| 26 | #endif
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| 27 |
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| 28 | /* Includes ------------------------------------------------------------------*/
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| 29 | #include "stm32f4xx_hal_def.h"
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| 30 |
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| 31 | /** @addtogroup STM32F4xx_HAL_Driver
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| 32 | * @{
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| 33 | */
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| 34 |
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| 35 | /** @addtogroup PWR
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| 36 | * @{
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| 37 | */
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| 38 |
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| 39 | /* Exported types ------------------------------------------------------------*/
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| 40 |
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| 41 | /** @defgroup PWR_Exported_Types PWR Exported Types
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| 42 | * @{
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| 43 | */
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| 44 |
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| 45 | /**
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| 46 | * @brief PWR PVD configuration structure definition
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| 47 | */
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| 48 | typedef struct
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| 49 | {
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| 50 | uint32_t PVDLevel; /*!< PVDLevel: Specifies the PVD detection level.
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| 51 | This parameter can be a value of @ref PWR_PVD_detection_level */
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| 52 |
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| 53 | uint32_t Mode; /*!< Mode: Specifies the operating mode for the selected pins.
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| 54 | This parameter can be a value of @ref PWR_PVD_Mode */
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| 55 | }PWR_PVDTypeDef;
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| 56 |
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| 57 | /**
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| 58 | * @}
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| 59 | */
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| 60 |
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| 61 | /* Exported constants --------------------------------------------------------*/
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| 62 | /** @defgroup PWR_Exported_Constants PWR Exported Constants
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| 63 | * @{
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| 64 | */
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| 65 |
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| 66 | /** @defgroup PWR_WakeUp_Pins PWR WakeUp Pins
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| 67 | * @{
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| 68 | */
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| 69 | #define PWR_WAKEUP_PIN1 0x00000100U
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| 70 | /**
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| 71 | * @}
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| 72 | */
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| 73 |
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| 74 | /** @defgroup PWR_PVD_detection_level PWR PVD detection level
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| 75 | * @{
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| 76 | */
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| 77 | #define PWR_PVDLEVEL_0 PWR_CR_PLS_LEV0
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| 78 | #define PWR_PVDLEVEL_1 PWR_CR_PLS_LEV1
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| 79 | #define PWR_PVDLEVEL_2 PWR_CR_PLS_LEV2
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| 80 | #define PWR_PVDLEVEL_3 PWR_CR_PLS_LEV3
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| 81 | #define PWR_PVDLEVEL_4 PWR_CR_PLS_LEV4
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| 82 | #define PWR_PVDLEVEL_5 PWR_CR_PLS_LEV5
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| 83 | #define PWR_PVDLEVEL_6 PWR_CR_PLS_LEV6
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| 84 | #define PWR_PVDLEVEL_7 PWR_CR_PLS_LEV7/* External input analog voltage
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| 85 | (Compare internally to VREFINT) */
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| 86 | /**
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| 87 | * @}
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| 88 | */
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| 89 |
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| 90 | /** @defgroup PWR_PVD_Mode PWR PVD Mode
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| 91 | * @{
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| 92 | */
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| 93 | #define PWR_PVD_MODE_NORMAL 0x00000000U /*!< basic mode is used */
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| 94 | #define PWR_PVD_MODE_IT_RISING 0x00010001U /*!< External Interrupt Mode with Rising edge trigger detection */
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| 95 | #define PWR_PVD_MODE_IT_FALLING 0x00010002U /*!< External Interrupt Mode with Falling edge trigger detection */
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| 96 | #define PWR_PVD_MODE_IT_RISING_FALLING 0x00010003U /*!< External Interrupt Mode with Rising/Falling edge trigger detection */
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| 97 | #define PWR_PVD_MODE_EVENT_RISING 0x00020001U /*!< Event Mode with Rising edge trigger detection */
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| 98 | #define PWR_PVD_MODE_EVENT_FALLING 0x00020002U /*!< Event Mode with Falling edge trigger detection */
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| 99 | #define PWR_PVD_MODE_EVENT_RISING_FALLING 0x00020003U /*!< Event Mode with Rising/Falling edge trigger detection */
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| 100 | /**
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| 101 | * @}
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| 102 | */
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| 103 |
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| 104 |
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| 105 | /** @defgroup PWR_Regulator_state_in_STOP_mode PWR Regulator state in SLEEP/STOP mode
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| 106 | * @{
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| 107 | */
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| 108 | #define PWR_MAINREGULATOR_ON 0x00000000U
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| 109 | #define PWR_LOWPOWERREGULATOR_ON PWR_CR_LPDS
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| 110 | /**
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| 111 | * @}
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| 112 | */
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| 113 |
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| 114 | /** @defgroup PWR_SLEEP_mode_entry PWR SLEEP mode entry
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| 115 | * @{
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| 116 | */
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| 117 | #define PWR_SLEEPENTRY_WFI ((uint8_t)0x01)
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| 118 | #define PWR_SLEEPENTRY_WFE ((uint8_t)0x02)
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| 119 | /**
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| 120 | * @}
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| 121 | */
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| 122 |
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| 123 | /** @defgroup PWR_STOP_mode_entry PWR STOP mode entry
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| 124 | * @{
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| 125 | */
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| 126 | #define PWR_STOPENTRY_WFI ((uint8_t)0x01)
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| 127 | #define PWR_STOPENTRY_WFE ((uint8_t)0x02)
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| 128 | /**
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| 129 | * @}
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| 130 | */
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| 131 |
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| 132 | /** @defgroup PWR_Flag PWR Flag
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| 133 | * @{
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| 134 | */
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| 135 | #define PWR_FLAG_WU PWR_CSR_WUF
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| 136 | #define PWR_FLAG_SB PWR_CSR_SBF
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| 137 | #define PWR_FLAG_PVDO PWR_CSR_PVDO
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| 138 | #define PWR_FLAG_BRR PWR_CSR_BRR
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| 139 | #define PWR_FLAG_VOSRDY PWR_CSR_VOSRDY
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| 140 | /**
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| 141 | * @}
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| 142 | */
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| 143 |
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| 144 | /**
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| 145 | * @}
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| 146 | */
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| 147 |
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| 148 | /* Exported macro ------------------------------------------------------------*/
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| 149 | /** @defgroup PWR_Exported_Macro PWR Exported Macro
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| 150 | * @{
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| 151 | */
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| 152 |
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| 153 | /** @brief Check PWR flag is set or not.
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| 154 | * @param __FLAG__ specifies the flag to check.
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| 155 | * This parameter can be one of the following values:
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| 156 | * @arg PWR_FLAG_WU: Wake Up flag. This flag indicates that a wakeup event
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| 157 | * was received from the WKUP pin or from the RTC alarm (Alarm A
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| 158 | * or Alarm B), RTC Tamper event, RTC TimeStamp event or RTC Wakeup.
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| 159 | * An additional wakeup event is detected if the WKUP pin is enabled
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| 160 | * (by setting the EWUP bit) when the WKUP pin level is already high.
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| 161 | * @arg PWR_FLAG_SB: StandBy flag. This flag indicates that the system was
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| 162 | * resumed from StandBy mode.
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| 163 | * @arg PWR_FLAG_PVDO: PVD Output. This flag is valid only if PVD is enabled
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| 164 | * by the HAL_PWR_EnablePVD() function. The PVD is stopped by Standby mode
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| 165 | * For this reason, this bit is equal to 0 after Standby or reset
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| 166 | * until the PVDE bit is set.
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| 167 | * @arg PWR_FLAG_BRR: Backup regulator ready flag. This bit is not reset
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| 168 | * when the device wakes up from Standby mode or by a system reset
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| 169 | * or power reset.
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| 170 | * @arg PWR_FLAG_VOSRDY: This flag indicates that the Regulator voltage
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| 171 | * scaling output selection is ready.
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| 172 | * @retval The new state of __FLAG__ (TRUE or FALSE).
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| 173 | */
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| 174 | #define __HAL_PWR_GET_FLAG(__FLAG__) ((PWR->CSR & (__FLAG__)) == (__FLAG__))
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| 175 |
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| 176 | /** @brief Clear the PWR's pending flags.
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| 177 | * @param __FLAG__ specifies the flag to clear.
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| 178 | * This parameter can be one of the following values:
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| 179 | * @arg PWR_FLAG_WU: Wake Up flag
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| 180 | * @arg PWR_FLAG_SB: StandBy flag
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| 181 | */
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| 182 | #define __HAL_PWR_CLEAR_FLAG(__FLAG__) (PWR->CR |= (__FLAG__) << 2U)
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| 183 |
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| 184 | /**
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| 185 | * @brief Enable the PVD Exti Line 16.
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| 186 | * @retval None.
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| 187 | */
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| 188 | #define __HAL_PWR_PVD_EXTI_ENABLE_IT() (EXTI->IMR |= (PWR_EXTI_LINE_PVD))
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| 189 |
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| 190 | /**
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| 191 | * @brief Disable the PVD EXTI Line 16.
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| 192 | * @retval None.
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| 193 | */
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| 194 | #define __HAL_PWR_PVD_EXTI_DISABLE_IT() (EXTI->IMR &= ~(PWR_EXTI_LINE_PVD))
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| 195 |
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| 196 | /**
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| 197 | * @brief Enable event on PVD Exti Line 16.
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| 198 | * @retval None.
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| 199 | */
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| 200 | #define __HAL_PWR_PVD_EXTI_ENABLE_EVENT() (EXTI->EMR |= (PWR_EXTI_LINE_PVD))
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| 201 |
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| 202 | /**
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| 203 | * @brief Disable event on PVD Exti Line 16.
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| 204 | * @retval None.
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| 205 | */
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| 206 | #define __HAL_PWR_PVD_EXTI_DISABLE_EVENT() (EXTI->EMR &= ~(PWR_EXTI_LINE_PVD))
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| 207 |
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| 208 | /**
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| 209 | * @brief Enable the PVD Extended Interrupt Rising Trigger.
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| 210 | * @retval None.
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| 211 | */
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| 212 | #define __HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE() SET_BIT(EXTI->RTSR, PWR_EXTI_LINE_PVD)
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| 213 |
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| 214 | /**
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| 215 | * @brief Disable the PVD Extended Interrupt Rising Trigger.
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| 216 | * @retval None.
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| 217 | */
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| 218 | #define __HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE() CLEAR_BIT(EXTI->RTSR, PWR_EXTI_LINE_PVD)
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| 219 |
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| 220 | /**
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| 221 | * @brief Enable the PVD Extended Interrupt Falling Trigger.
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| 222 | * @retval None.
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| 223 | */
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| 224 | #define __HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE() SET_BIT(EXTI->FTSR, PWR_EXTI_LINE_PVD)
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| 225 |
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| 226 |
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| 227 | /**
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| 228 | * @brief Disable the PVD Extended Interrupt Falling Trigger.
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| 229 | * @retval None.
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| 230 | */
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| 231 | #define __HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE() CLEAR_BIT(EXTI->FTSR, PWR_EXTI_LINE_PVD)
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| 232 |
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| 233 |
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| 234 | /**
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| 235 | * @brief PVD EXTI line configuration: set rising & falling edge trigger.
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| 236 | * @retval None.
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| 237 | */
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| 238 | #define __HAL_PWR_PVD_EXTI_ENABLE_RISING_FALLING_EDGE() do{__HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE();\
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| 239 | __HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE();\
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| 240 | }while(0U)
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| 241 |
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| 242 | /**
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| 243 | * @brief Disable the PVD Extended Interrupt Rising & Falling Trigger.
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| 244 | * This parameter can be:
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| 245 | * @retval None.
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| 246 | */
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| 247 | #define __HAL_PWR_PVD_EXTI_DISABLE_RISING_FALLING_EDGE() do{__HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE();\
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| 248 | __HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE();\
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| 249 | }while(0U)
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| 250 |
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| 251 | /**
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| 252 | * @brief checks whether the specified PVD Exti interrupt flag is set or not.
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| 253 | * @retval EXTI PVD Line Status.
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| 254 | */
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| 255 | #define __HAL_PWR_PVD_EXTI_GET_FLAG() (EXTI->PR & (PWR_EXTI_LINE_PVD))
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| 256 |
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| 257 | /**
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| 258 | * @brief Clear the PVD Exti flag.
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| 259 | * @retval None.
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| 260 | */
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| 261 | #define __HAL_PWR_PVD_EXTI_CLEAR_FLAG() (EXTI->PR = (PWR_EXTI_LINE_PVD))
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| 262 |
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| 263 | /**
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| 264 | * @brief Generates a Software interrupt on PVD EXTI line.
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| 265 | * @retval None
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| 266 | */
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| 267 | #define __HAL_PWR_PVD_EXTI_GENERATE_SWIT() (EXTI->SWIER |= (PWR_EXTI_LINE_PVD))
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| 268 |
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| 269 | /**
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| 270 | * @}
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| 271 | */
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| 272 |
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| 273 | /* Include PWR HAL Extension module */
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| 274 | #include "stm32f4xx_hal_pwr_ex.h"
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| 275 |
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| 276 | /* Exported functions --------------------------------------------------------*/
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| 277 | /** @addtogroup PWR_Exported_Functions PWR Exported Functions
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| 278 | * @{
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| 279 | */
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| 280 |
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| 281 | /** @addtogroup PWR_Exported_Functions_Group1 Initialization and de-initialization functions
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| 282 | * @{
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| 283 | */
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| 284 | /* Initialization and de-initialization functions *****************************/
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| 285 | void HAL_PWR_DeInit(void);
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| 286 | void HAL_PWR_EnableBkUpAccess(void);
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| 287 | void HAL_PWR_DisableBkUpAccess(void);
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| 288 | /**
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| 289 | * @}
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| 290 | */
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| 291 |
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| 292 | /** @addtogroup PWR_Exported_Functions_Group2 Peripheral Control functions
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| 293 | * @{
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| 294 | */
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| 295 | /* Peripheral Control functions **********************************************/
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| 296 | /* PVD configuration */
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| 297 | void HAL_PWR_ConfigPVD(PWR_PVDTypeDef *sConfigPVD);
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| 298 | void HAL_PWR_EnablePVD(void);
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| 299 | void HAL_PWR_DisablePVD(void);
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| 300 |
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| 301 | /* WakeUp pins configuration */
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| 302 | void HAL_PWR_EnableWakeUpPin(uint32_t WakeUpPinx);
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| 303 | void HAL_PWR_DisableWakeUpPin(uint32_t WakeUpPinx);
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| 304 |
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| 305 | /* Low Power modes entry */
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| 306 | void HAL_PWR_EnterSTOPMode(uint32_t Regulator, uint8_t STOPEntry);
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| 307 | void HAL_PWR_EnterSLEEPMode(uint32_t Regulator, uint8_t SLEEPEntry);
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| 308 | void HAL_PWR_EnterSTANDBYMode(void);
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| 309 |
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| 310 | /* Power PVD IRQ Handler */
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| 311 | void HAL_PWR_PVD_IRQHandler(void);
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| 312 | void HAL_PWR_PVDCallback(void);
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| 313 |
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| 314 | /* Cortex System Control functions *******************************************/
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| 315 | void HAL_PWR_EnableSleepOnExit(void);
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| 316 | void HAL_PWR_DisableSleepOnExit(void);
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| 317 | void HAL_PWR_EnableSEVOnPend(void);
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| 318 | void HAL_PWR_DisableSEVOnPend(void);
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| 319 | /**
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| 320 | * @}
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| 321 | */
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| 322 |
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| 323 | /**
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| 324 | * @}
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| 325 | */
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| 326 |
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| 327 | /* Private types -------------------------------------------------------------*/
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| 328 | /* Private variables ---------------------------------------------------------*/
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| 329 | /* Private constants ---------------------------------------------------------*/
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| 330 | /** @defgroup PWR_Private_Constants PWR Private Constants
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| 331 | * @{
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| 332 | */
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| 333 |
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| 334 | /** @defgroup PWR_PVD_EXTI_Line PWR PVD EXTI Line
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| 335 | * @{
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| 336 | */
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| 337 | #define PWR_EXTI_LINE_PVD ((uint32_t)EXTI_IMR_MR16) /*!< External interrupt line 16 Connected to the PVD EXTI Line */
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| 338 | /**
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| 339 | * @}
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| 340 | */
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| 341 |
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| 342 | /** @defgroup PWR_register_alias_address PWR Register alias address
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| 343 | * @{
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| 344 | */
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| 345 | /* ------------- PWR registers bit address in the alias region ---------------*/
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| 346 | #define PWR_OFFSET (PWR_BASE - PERIPH_BASE)
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| 347 | #define PWR_CR_OFFSET 0x00U
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| 348 | #define PWR_CSR_OFFSET 0x04U
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| 349 | #define PWR_CR_OFFSET_BB (PWR_OFFSET + PWR_CR_OFFSET)
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| 350 | #define PWR_CSR_OFFSET_BB (PWR_OFFSET + PWR_CSR_OFFSET)
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| 351 | /**
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| 352 | * @}
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| 353 | */
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| 354 |
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| 355 | /** @defgroup PWR_CR_register_alias PWR CR Register alias address
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| 356 | * @{
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| 357 | */
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| 358 | /* --- CR Register ---*/
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| 359 | /* Alias word address of DBP bit */
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| 360 | #define DBP_BIT_NUMBER PWR_CR_DBP_Pos
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| 361 | #define CR_DBP_BB (uint32_t)(PERIPH_BB_BASE + (PWR_CR_OFFSET_BB * 32U) + (DBP_BIT_NUMBER * 4U))
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| 362 |
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| 363 | /* Alias word address of PVDE bit */
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| 364 | #define PVDE_BIT_NUMBER PWR_CR_PVDE_Pos
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| 365 | #define CR_PVDE_BB (uint32_t)(PERIPH_BB_BASE + (PWR_CR_OFFSET_BB * 32U) + (PVDE_BIT_NUMBER * 4U))
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| 366 |
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| 367 | /* Alias word address of VOS bit */
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| 368 | #define VOS_BIT_NUMBER PWR_CR_VOS_Pos
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| 369 | #define CR_VOS_BB (uint32_t)(PERIPH_BB_BASE + (PWR_CR_OFFSET_BB * 32U) + (VOS_BIT_NUMBER * 4U))
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| 370 | /**
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| 371 | * @}
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| 372 | */
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| 373 |
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| 374 | /** @defgroup PWR_CSR_register_alias PWR CSR Register alias address
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| 375 | * @{
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| 376 | */
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| 377 | /* --- CSR Register ---*/
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| 378 | /* Alias word address of EWUP bit */
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| 379 | #define EWUP_BIT_NUMBER PWR_CSR_EWUP_Pos
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| 380 | #define CSR_EWUP_BB (PERIPH_BB_BASE + (PWR_CSR_OFFSET_BB * 32U) + (EWUP_BIT_NUMBER * 4U))
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| 381 | /**
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| 382 | * @}
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| 383 | */
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| 384 |
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| 385 | /**
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| 386 | * @}
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| 387 | */
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| 388 | /* Private macros ------------------------------------------------------------*/
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| 389 | /** @defgroup PWR_Private_Macros PWR Private Macros
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| 390 | * @{
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| 391 | */
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| 392 |
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| 393 | /** @defgroup PWR_IS_PWR_Definitions PWR Private macros to check input parameters
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| 394 | * @{
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| 395 | */
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| 396 | #define IS_PWR_PVD_LEVEL(LEVEL) (((LEVEL) == PWR_PVDLEVEL_0) || ((LEVEL) == PWR_PVDLEVEL_1)|| \
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| 397 | ((LEVEL) == PWR_PVDLEVEL_2) || ((LEVEL) == PWR_PVDLEVEL_3)|| \
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| 398 | ((LEVEL) == PWR_PVDLEVEL_4) || ((LEVEL) == PWR_PVDLEVEL_5)|| \
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| 399 | ((LEVEL) == PWR_PVDLEVEL_6) || ((LEVEL) == PWR_PVDLEVEL_7))
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| 400 | #define IS_PWR_PVD_MODE(MODE) (((MODE) == PWR_PVD_MODE_IT_RISING)|| ((MODE) == PWR_PVD_MODE_IT_FALLING) || \
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| 401 | ((MODE) == PWR_PVD_MODE_IT_RISING_FALLING) || ((MODE) == PWR_PVD_MODE_EVENT_RISING) || \
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| 402 | ((MODE) == PWR_PVD_MODE_EVENT_FALLING) || ((MODE) == PWR_PVD_MODE_EVENT_RISING_FALLING) || \
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| 403 | ((MODE) == PWR_PVD_MODE_NORMAL))
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| 404 | #define IS_PWR_REGULATOR(REGULATOR) (((REGULATOR) == PWR_MAINREGULATOR_ON) || \
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| 405 | ((REGULATOR) == PWR_LOWPOWERREGULATOR_ON))
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| 406 | #define IS_PWR_SLEEP_ENTRY(ENTRY) (((ENTRY) == PWR_SLEEPENTRY_WFI) || ((ENTRY) == PWR_SLEEPENTRY_WFE))
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| 407 | #define IS_PWR_STOP_ENTRY(ENTRY) (((ENTRY) == PWR_STOPENTRY_WFI) || ((ENTRY) == PWR_STOPENTRY_WFE))
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| 408 | /**
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| 409 | * @}
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| 410 | */
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| 411 |
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| 412 | /**
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| 413 | * @}
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| 414 | */
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| 415 |
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| 416 | /**
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| 417 | * @}
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| 418 | */
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| 419 |
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| 420 | /**
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| 421 | * @}
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| 422 | */
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| 423 |
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| 424 | #ifdef __cplusplus
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| 425 | }
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| 426 | #endif
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| 427 |
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| 428 |
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| 429 | #endif /* __STM32F4xx_HAL_PWR_H */
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| 430 |
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| 431 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
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