source: S-port/trunk/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_sai.h

Last change on this file was 1, checked in by AlexLir, 3 years ago
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1/**
2 ******************************************************************************
3 * @file stm32f4xx_hal_sai.h
4 * @author MCD Application Team
5 * @brief Header file of SAI HAL module.
6 ******************************************************************************
7 * @attention
8 *
9 * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
10 * All rights reserved.</center></h2>
11 *
12 * This software component is licensed by ST under BSD 3-Clause license,
13 * the "License"; You may not use this file except in compliance with the
14 * License. You may obtain a copy of the License at:
15 * opensource.org/licenses/BSD-3-Clause
16 *
17 ******************************************************************************
18 */
19
20/* Define to prevent recursive inclusion -------------------------------------*/
21#ifndef __STM32F4xx_HAL_SAI_H
22#define __STM32F4xx_HAL_SAI_H
23
24#ifdef __cplusplus
25extern "C" {
26#endif
27
28/* Includes ------------------------------------------------------------------*/
29#include "stm32f4xx_hal_def.h"
30
31/** @addtogroup STM32F4xx_HAL_Driver
32 * @{
33 */
34#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) || \
35 defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx) || defined(STM32F413xx) || \
36 defined(STM32F423xx)
37
38/** @addtogroup SAI
39 * @{
40 */
41
42/* Exported types ------------------------------------------------------------*/
43/** @defgroup SAI_Exported_Types SAI Exported Types
44 * @{
45 */
46
47/**
48 * @brief HAL State structures definition
49 */
50typedef enum
51{
52 HAL_SAI_STATE_RESET = 0x00U, /*!< SAI not yet initialized or disabled */
53 HAL_SAI_STATE_READY = 0x01U, /*!< SAI initialized and ready for use */
54 HAL_SAI_STATE_BUSY = 0x02U, /*!< SAI internal process is ongoing */
55 HAL_SAI_STATE_BUSY_TX = 0x12U, /*!< Data transmission process is ongoing */
56 HAL_SAI_STATE_BUSY_RX = 0x22U, /*!< Data reception process is ongoing */
57 HAL_SAI_STATE_TIMEOUT = 0x03U, /*!< SAI timeout state */
58 HAL_SAI_STATE_ERROR = 0x04U /*!< SAI error state */
59} HAL_SAI_StateTypeDef;
60
61/**
62 * @brief SAI Callback prototype
63 */
64typedef void (*SAIcallback)(void);
65
66/** @defgroup SAI_Init_Structure_definition SAI Init Structure definition
67 * @brief SAI Init Structure definition
68 * @{
69 */
70typedef struct
71{
72 uint32_t AudioMode; /*!< Specifies the SAI Block audio Mode.
73 This parameter can be a value of @ref SAI_Block_Mode */
74
75 uint32_t Synchro; /*!< Specifies SAI Block synchronization
76 This parameter can be a value of @ref SAI_Block_Synchronization */
77
78 uint32_t SynchroExt; /*!< Specifies SAI external output synchronization, this setup is common
79 for BlockA and BlockB
80 This parameter can be a value of @ref SAI_Block_SyncExt
81 @note: If both audio blocks of same SAI are used, this parameter has
82 to be set to the same value for each audio block */
83
84 uint32_t OutputDrive; /*!< Specifies when SAI Block outputs are driven.
85 This parameter can be a value of @ref SAI_Block_Output_Drive
86 @note this value has to be set before enabling the audio block
87 but after the audio block configuration. */
88
89 uint32_t NoDivider; /*!< Specifies whether master clock will be divided or not.
90 This parameter can be a value of @ref SAI_Block_NoDivider
91 @note If bit NODIV in the SAI_xCR1 register is cleared, the frame length
92 should be aligned to a number equal to a power of 2, from 8 to 256.
93 If bit NODIV in the SAI_xCR1 register is set, the frame length can
94 take any of the values without constraint since the input clock of
95 the audio block should be equal to the bit clock.
96 There is no MCLK_x clock which can be output. */
97
98 uint32_t FIFOThreshold; /*!< Specifies SAI Block FIFO threshold.
99 This parameter can be a value of @ref SAI_Block_Fifo_Threshold */
100
101 uint32_t ClockSource; /*!< Specifies the SAI Block x Clock source.
102 This parameter is not used for STM32F446xx devices. */
103
104 uint32_t AudioFrequency; /*!< Specifies the audio frequency sampling.
105 This parameter can be a value of @ref SAI_Audio_Frequency */
106
107 uint32_t Mckdiv; /*!< Specifies the master clock divider.
108 This parameter must be a number between Min_Data = 0 and Max_Data = 15.
109 @note This parameter is used only if AudioFrequency is set to
110 SAI_AUDIO_FREQUENCY_MCKDIV otherwise it is internally computed. */
111
112 uint32_t MonoStereoMode; /*!< Specifies if the mono or stereo mode is selected.
113 This parameter can be a value of @ref SAI_Mono_Stereo_Mode */
114
115 uint32_t CompandingMode; /*!< Specifies the companding mode type.
116 This parameter can be a value of @ref SAI_Block_Companding_Mode */
117
118 uint32_t TriState; /*!< Specifies the companding mode type.
119 This parameter can be a value of @ref SAI_TRIState_Management */
120
121 /* This part of the structure is automatically filled if your are using the high level intialisation
122 function HAL_SAI_InitProtocol */
123
124 uint32_t Protocol; /*!< Specifies the SAI Block protocol.
125 This parameter can be a value of @ref SAI_Block_Protocol */
126
127 uint32_t DataSize; /*!< Specifies the SAI Block data size.
128 This parameter can be a value of @ref SAI_Block_Data_Size */
129
130 uint32_t FirstBit; /*!< Specifies whether data transfers start from MSB or LSB bit.
131 This parameter can be a value of @ref SAI_Block_MSB_LSB_transmission */
132
133 uint32_t ClockStrobing; /*!< Specifies the SAI Block clock strobing edge sensitivity.
134 This parameter can be a value of @ref SAI_Block_Clock_Strobing */
135} SAI_InitTypeDef;
136/**
137 * @}
138 */
139
140/** @defgroup SAI_Frame_Structure_definition SAI Frame Structure definition
141 * @brief SAI Frame Init structure definition
142 * @note For SPDIF and AC97 protocol, these parameters are not used (set by hardware).
143 * @{
144 */
145typedef struct
146{
147 uint32_t FrameLength; /*!< Specifies the Frame length, the number of SCK clocks for each audio frame.
148 This parameter must be a number between Min_Data = 8 and Max_Data = 256.
149 @note If master clock MCLK_x pin is declared as an output, the frame length
150 should be aligned to a number equal to power of 2 in order to keep
151 in an audio frame, an integer number of MCLK pulses by bit Clock. */
152
153 uint32_t ActiveFrameLength; /*!< Specifies the Frame synchronization active level length.
154 This Parameter specifies the length in number of bit clock (SCK + 1)
155 of the active level of FS signal in audio frame.
156 This parameter must be a number between Min_Data = 1 and Max_Data = 128 */
157
158 uint32_t FSDefinition; /*!< Specifies the Frame synchronization definition.
159 This parameter can be a value of @ref SAI_Block_FS_Definition */
160
161 uint32_t FSPolarity; /*!< Specifies the Frame synchronization Polarity.
162 This parameter can be a value of @ref SAI_Block_FS_Polarity */
163
164 uint32_t FSOffset; /*!< Specifies the Frame synchronization Offset.
165 This parameter can be a value of @ref SAI_Block_FS_Offset */
166} SAI_FrameInitTypeDef;
167/**
168 * @}
169 */
170
171/** @defgroup SAI_Slot_Structure_definition SAI Slot Structure definition
172 * @brief SAI Block Slot Init Structure definition
173 * @note For SPDIF protocol, these parameters are not used (set by hardware).
174 * @note For AC97 protocol, only SlotActive parameter is used (the others are set by hardware).
175 * @{
176 */
177typedef struct
178{
179 uint32_t FirstBitOffset; /*!< Specifies the position of first data transfer bit in the slot.
180 This parameter must be a number between Min_Data = 0 and Max_Data = 24 */
181
182 uint32_t SlotSize; /*!< Specifies the Slot Size.
183 This parameter can be a value of @ref SAI_Block_Slot_Size */
184
185 uint32_t SlotNumber; /*!< Specifies the number of slot in the audio frame.
186 This parameter must be a number between Min_Data = 1 and Max_Data = 16 */
187
188 uint32_t SlotActive; /*!< Specifies the slots in audio frame that will be activated.
189 This parameter can be a value of @ref SAI_Block_Slot_Active */
190} SAI_SlotInitTypeDef;
191/**
192 * @}
193 */
194
195/** @defgroup SAI_Handle_Structure_definition SAI Handle Structure definition
196 * @brief SAI handle Structure definition
197 * @{
198 */
199typedef struct __SAI_HandleTypeDef
200{
201 SAI_Block_TypeDef *Instance; /*!< SAI Blockx registers base address */
202
203 SAI_InitTypeDef Init; /*!< SAI communication parameters */
204
205 SAI_FrameInitTypeDef FrameInit; /*!< SAI Frame configuration parameters */
206
207 SAI_SlotInitTypeDef SlotInit; /*!< SAI Slot configuration parameters */
208
209 uint8_t *pBuffPtr; /*!< Pointer to SAI transfer Buffer */
210
211 uint16_t XferSize; /*!< SAI transfer size */
212
213 uint16_t XferCount; /*!< SAI transfer counter */
214
215 DMA_HandleTypeDef *hdmatx; /*!< SAI Tx DMA handle parameters */
216
217 DMA_HandleTypeDef *hdmarx; /*!< SAI Rx DMA handle parameters */
218
219 SAIcallback mutecallback;/*!< SAI mute callback */
220
221 void (*InterruptServiceRoutine)(struct __SAI_HandleTypeDef *hsai); /* function pointer for IRQ handler */
222
223 HAL_LockTypeDef Lock; /*!< SAI locking object */
224
225 __IO HAL_SAI_StateTypeDef State; /*!< SAI communication state */
226
227 __IO uint32_t ErrorCode; /*!< SAI Error code */
228
229#if (USE_HAL_SAI_REGISTER_CALLBACKS == 1)
230 void (*RxCpltCallback)(struct __SAI_HandleTypeDef *hsai); /*!< SAI receive complete callback */
231 void (*RxHalfCpltCallback)(struct __SAI_HandleTypeDef *hsai); /*!< SAI receive half complete callback */
232 void (*TxCpltCallback)(struct __SAI_HandleTypeDef *hsai); /*!< SAI transmit complete callback */
233 void (*TxHalfCpltCallback)(struct __SAI_HandleTypeDef *hsai); /*!< SAI transmit half complete callback */
234 void (*ErrorCallback)(struct __SAI_HandleTypeDef *hsai); /*!< SAI error callback */
235 void (*MspInitCallback)(struct __SAI_HandleTypeDef *hsai); /*!< SAI MSP init callback */
236 void (*MspDeInitCallback)(struct __SAI_HandleTypeDef *hsai); /*!< SAI MSP de-init callback */
237#endif /* USE_HAL_SAI_REGISTER_CALLBACKS */
238} SAI_HandleTypeDef;
239/**
240 * @}
241 */
242
243#if (USE_HAL_SAI_REGISTER_CALLBACKS == 1)
244/**
245 * @brief SAI callback ID enumeration definition
246 */
247typedef enum
248{
249 HAL_SAI_RX_COMPLETE_CB_ID = 0x00U, /*!< SAI receive complete callback ID */
250 HAL_SAI_RX_HALFCOMPLETE_CB_ID = 0x01U, /*!< SAI receive half complete callback ID */
251 HAL_SAI_TX_COMPLETE_CB_ID = 0x02U, /*!< SAI transmit complete callback ID */
252 HAL_SAI_TX_HALFCOMPLETE_CB_ID = 0x03U, /*!< SAI transmit half complete callback ID */
253 HAL_SAI_ERROR_CB_ID = 0x04U, /*!< SAI error callback ID */
254 HAL_SAI_MSPINIT_CB_ID = 0x05U, /*!< SAI MSP init callback ID */
255 HAL_SAI_MSPDEINIT_CB_ID = 0x06U /*!< SAI MSP de-init callback ID */
256} HAL_SAI_CallbackIDTypeDef;
257
258/**
259 * @brief SAI callback pointer definition
260 */
261typedef void (*pSAI_CallbackTypeDef)(SAI_HandleTypeDef *hsai);
262#endif /* USE_HAL_SAI_REGISTER_CALLBACKS */
263
264/**
265 * @}
266 */
267
268/* Exported constants --------------------------------------------------------*/
269/** @defgroup SAI_Exported_Constants SAI Exported Constants
270 * @{
271 */
272
273/** @defgroup SAI_Error_Code SAI Error Code
274 * @{
275 */
276#define HAL_SAI_ERROR_NONE 0x00000000U /*!< No error */
277#define HAL_SAI_ERROR_OVR 0x00000001U /*!< Overrun Error */
278#define HAL_SAI_ERROR_UDR 0x00000002U /*!< Underrun error */
279#define HAL_SAI_ERROR_AFSDET 0x00000004U /*!< Anticipated Frame synchronisation detection */
280#define HAL_SAI_ERROR_LFSDET 0x00000008U /*!< Late Frame synchronisation detection */
281#define HAL_SAI_ERROR_CNREADY 0x00000010U /*!< codec not ready */
282#define HAL_SAI_ERROR_WCKCFG 0x00000020U /*!< Wrong clock configuration */
283#define HAL_SAI_ERROR_TIMEOUT 0x00000040U /*!< Timeout error */
284#define HAL_SAI_ERROR_DMA 0x00000080U /*!< DMA error */
285#if (USE_HAL_SAI_REGISTER_CALLBACKS == 1)
286#define HAL_SAI_ERROR_INVALID_CALLBACK 0x00000100U /*!< Invalid callback error */
287#endif /* USE_HAL_SAI_REGISTER_CALLBACKS */
288/**
289 * @}
290 */
291
292/** @defgroup SAI_Block_SyncExt SAI External synchronisation
293 * @{
294 */
295#define SAI_SYNCEXT_DISABLE 0U
296#define SAI_SYNCEXT_OUTBLOCKA_ENABLE 1U
297#define SAI_SYNCEXT_OUTBLOCKB_ENABLE 2U
298/**
299 * @}
300 */
301
302/** @defgroup SAI_Protocol SAI Supported protocol
303 * @{
304 */
305#define SAI_I2S_STANDARD 0U
306#define SAI_I2S_MSBJUSTIFIED 1U
307#define SAI_I2S_LSBJUSTIFIED 2U
308#define SAI_PCM_LONG 3U
309#define SAI_PCM_SHORT 4U
310/**
311 * @}
312 */
313
314/** @defgroup SAI_Protocol_DataSize SAI protocol data size
315 * @{
316 */
317#define SAI_PROTOCOL_DATASIZE_16BIT 0U
318#define SAI_PROTOCOL_DATASIZE_16BITEXTENDED 1U
319#define SAI_PROTOCOL_DATASIZE_24BIT 2U
320#define SAI_PROTOCOL_DATASIZE_32BIT 3U
321/**
322 * @}
323 */
324
325/** @defgroup SAI_Audio_Frequency SAI Audio Frequency
326 * @{
327 */
328#define SAI_AUDIO_FREQUENCY_192K 192000U
329#define SAI_AUDIO_FREQUENCY_96K 96000U
330#define SAI_AUDIO_FREQUENCY_48K 48000U
331#define SAI_AUDIO_FREQUENCY_44K 44100U
332#define SAI_AUDIO_FREQUENCY_32K 32000U
333#define SAI_AUDIO_FREQUENCY_22K 22050U
334#define SAI_AUDIO_FREQUENCY_16K 16000U
335#define SAI_AUDIO_FREQUENCY_11K 11025U
336#define SAI_AUDIO_FREQUENCY_8K 8000U
337#define SAI_AUDIO_FREQUENCY_MCKDIV 0U
338/**
339 * @}
340 */
341
342/** @defgroup SAI_Block_Mode SAI Block Mode
343 * @{
344 */
345#define SAI_MODEMASTER_TX 0x00000000U
346#define SAI_MODEMASTER_RX ((uint32_t)SAI_xCR1_MODE_0)
347#define SAI_MODESLAVE_TX ((uint32_t)SAI_xCR1_MODE_1)
348#define SAI_MODESLAVE_RX ((uint32_t)(SAI_xCR1_MODE_1 | SAI_xCR1_MODE_0))
349/**
350 * @}
351 */
352
353/** @defgroup SAI_Block_Protocol SAI Block Protocol
354 * @{
355 */
356#define SAI_FREE_PROTOCOL 0x00000000U
357#define SAI_SPDIF_PROTOCOL ((uint32_t)SAI_xCR1_PRTCFG_0)
358#define SAI_AC97_PROTOCOL ((uint32_t)SAI_xCR1_PRTCFG_1)
359/**
360 * @}
361 */
362
363/** @defgroup SAI_Block_Data_Size SAI Block Data Size
364 * @{
365 */
366#define SAI_DATASIZE_8 ((uint32_t)SAI_xCR1_DS_1)
367#define SAI_DATASIZE_10 ((uint32_t)(SAI_xCR1_DS_1 | SAI_xCR1_DS_0))
368#define SAI_DATASIZE_16 ((uint32_t)SAI_xCR1_DS_2)
369#define SAI_DATASIZE_20 ((uint32_t)(SAI_xCR1_DS_2 | SAI_xCR1_DS_0))
370#define SAI_DATASIZE_24 ((uint32_t)(SAI_xCR1_DS_2 | SAI_xCR1_DS_1))
371#define SAI_DATASIZE_32 ((uint32_t)(SAI_xCR1_DS_2 | SAI_xCR1_DS_1 | SAI_xCR1_DS_0))
372/**
373 * @}
374 */
375
376/** @defgroup SAI_Block_MSB_LSB_transmission SAI Block MSB LSB transmission
377 * @{
378 */
379#define SAI_FIRSTBIT_MSB 0x00000000U
380#define SAI_FIRSTBIT_LSB ((uint32_t)SAI_xCR1_LSBFIRST)
381/**
382 * @}
383 */
384
385/** @defgroup SAI_Block_Clock_Strobing SAI Block Clock Strobing
386 * @{
387 */
388#define SAI_CLOCKSTROBING_FALLINGEDGE 0U
389#define SAI_CLOCKSTROBING_RISINGEDGE 1U
390/**
391 * @}
392 */
393
394/** @defgroup SAI_Block_Synchronization SAI Block Synchronization
395 * @{
396 */
397#define SAI_ASYNCHRONOUS 0U /*!< Asynchronous */
398#define SAI_SYNCHRONOUS 1U /*!< Synchronous with other block of same SAI */
399#define SAI_SYNCHRONOUS_EXT_SAI1 2U /*!< Synchronous with other SAI, SAI1 */
400#define SAI_SYNCHRONOUS_EXT_SAI2 3U /*!< Synchronous with other SAI, SAI2 */
401/**
402 * @}
403 */
404
405/** @defgroup SAI_Block_Output_Drive SAI Block Output Drive
406 * @{
407 */
408#define SAI_OUTPUTDRIVE_DISABLE 0x00000000U
409#define SAI_OUTPUTDRIVE_ENABLE ((uint32_t)SAI_xCR1_OUTDRIV)
410/**
411 * @}
412 */
413
414/** @defgroup SAI_Block_NoDivider SAI Block NoDivider
415 * @{
416 */
417#define SAI_MASTERDIVIDER_ENABLE 0x00000000U
418#define SAI_MASTERDIVIDER_DISABLE ((uint32_t)SAI_xCR1_NODIV)
419/**
420 * @}
421 */
422
423/** @defgroup SAI_Block_FS_Definition SAI Block FS Definition
424 * @{
425 */
426#define SAI_FS_STARTFRAME 0x00000000U
427#define SAI_FS_CHANNEL_IDENTIFICATION ((uint32_t)SAI_xFRCR_FSDEF)
428/**
429 * @}
430 */
431
432/** @defgroup SAI_Block_FS_Polarity SAI Block FS Polarity
433 * @{
434 */
435#define SAI_FS_ACTIVE_LOW 0x00000000U
436#define SAI_FS_ACTIVE_HIGH ((uint32_t)SAI_xFRCR_FSPOL)
437/**
438 * @}
439 */
440
441/** @defgroup SAI_Block_FS_Offset SAI Block FS Offset
442 * @{
443 */
444#define SAI_FS_FIRSTBIT 0x00000000U
445#define SAI_FS_BEFOREFIRSTBIT ((uint32_t)SAI_xFRCR_FSOFF)
446/**
447 * @}
448 */
449
450/** @defgroup SAI_Block_Slot_Size SAI Block Slot Size
451 * @{
452 */
453#define SAI_SLOTSIZE_DATASIZE 0x00000000U
454#define SAI_SLOTSIZE_16B ((uint32_t)SAI_xSLOTR_SLOTSZ_0)
455#define SAI_SLOTSIZE_32B ((uint32_t)SAI_xSLOTR_SLOTSZ_1)
456/**
457 * @}
458 */
459
460/** @defgroup SAI_Block_Slot_Active SAI Block Slot Active
461 * @{
462 */
463#define SAI_SLOT_NOTACTIVE 0x00000000U
464#define SAI_SLOTACTIVE_0 0x00000001U
465#define SAI_SLOTACTIVE_1 0x00000002U
466#define SAI_SLOTACTIVE_2 0x00000004U
467#define SAI_SLOTACTIVE_3 0x00000008U
468#define SAI_SLOTACTIVE_4 0x00000010U
469#define SAI_SLOTACTIVE_5 0x00000020U
470#define SAI_SLOTACTIVE_6 0x00000040U
471#define SAI_SLOTACTIVE_7 0x00000080U
472#define SAI_SLOTACTIVE_8 0x00000100U
473#define SAI_SLOTACTIVE_9 0x00000200U
474#define SAI_SLOTACTIVE_10 0x00000400U
475#define SAI_SLOTACTIVE_11 0x00000800U
476#define SAI_SLOTACTIVE_12 0x00001000U
477#define SAI_SLOTACTIVE_13 0x00002000U
478#define SAI_SLOTACTIVE_14 0x00004000U
479#define SAI_SLOTACTIVE_15 0x00008000U
480#define SAI_SLOTACTIVE_ALL 0x0000FFFFU
481/**
482 * @}
483 */
484
485/** @defgroup SAI_Mono_Stereo_Mode SAI Mono Stereo Mode
486 * @{
487 */
488#define SAI_STEREOMODE 0x00000000U
489#define SAI_MONOMODE ((uint32_t)SAI_xCR1_MONO)
490/**
491 * @}
492 */
493
494/** @defgroup SAI_TRIState_Management SAI TRIState Management
495 * @{
496 */
497#define SAI_OUTPUT_NOTRELEASED 0x00000000U
498#define SAI_OUTPUT_RELEASED ((uint32_t)SAI_xCR2_TRIS)
499/**
500 * @}
501 */
502
503/** @defgroup SAI_Block_Fifo_Threshold SAI Block Fifo Threshold
504 * @{
505 */
506#define SAI_FIFOTHRESHOLD_EMPTY 0x00000000U
507#define SAI_FIFOTHRESHOLD_1QF ((uint32_t)(SAI_xCR2_FTH_0))
508#define SAI_FIFOTHRESHOLD_HF ((uint32_t)(SAI_xCR2_FTH_1))
509#define SAI_FIFOTHRESHOLD_3QF ((uint32_t)(SAI_xCR2_FTH_1 | SAI_xCR2_FTH_0))
510#define SAI_FIFOTHRESHOLD_FULL ((uint32_t)(SAI_xCR2_FTH_2))
511/**
512 * @}
513 */
514
515/** @defgroup SAI_Block_Companding_Mode SAI Block Companding Mode
516 * @{
517 */
518#define SAI_NOCOMPANDING 0x00000000U
519#define SAI_ULAW_1CPL_COMPANDING ((uint32_t)(SAI_xCR2_COMP_1))
520#define SAI_ALAW_1CPL_COMPANDING ((uint32_t)(SAI_xCR2_COMP_1 | SAI_xCR2_COMP_0))
521#define SAI_ULAW_2CPL_COMPANDING ((uint32_t)(SAI_xCR2_COMP_1 | SAI_xCR2_CPL))
522#define SAI_ALAW_2CPL_COMPANDING ((uint32_t)(SAI_xCR2_COMP_1 | SAI_xCR2_COMP_0 | SAI_xCR2_CPL))
523/**
524 * @}
525 */
526
527/** @defgroup SAI_Block_Mute_Value SAI Block Mute Value
528 * @{
529 */
530#define SAI_ZERO_VALUE 0x00000000U
531#define SAI_LAST_SENT_VALUE ((uint32_t)SAI_xCR2_MUTEVAL)
532/**
533 * @}
534 */
535
536/** @defgroup SAI_Block_Interrupts_Definition SAI Block Interrupts Definition
537 * @{
538 */
539#define SAI_IT_OVRUDR ((uint32_t)SAI_xIMR_OVRUDRIE)
540#define SAI_IT_MUTEDET ((uint32_t)SAI_xIMR_MUTEDETIE)
541#define SAI_IT_WCKCFG ((uint32_t)SAI_xIMR_WCKCFGIE)
542#define SAI_IT_FREQ ((uint32_t)SAI_xIMR_FREQIE)
543#define SAI_IT_CNRDY ((uint32_t)SAI_xIMR_CNRDYIE)
544#define SAI_IT_AFSDET ((uint32_t)SAI_xIMR_AFSDETIE)
545#define SAI_IT_LFSDET ((uint32_t)SAI_xIMR_LFSDETIE)
546/**
547 * @}
548 */
549
550/** @defgroup SAI_Block_Flags_Definition SAI Block Flags Definition
551 * @{
552 */
553#define SAI_FLAG_OVRUDR ((uint32_t)SAI_xSR_OVRUDR)
554#define SAI_FLAG_MUTEDET ((uint32_t)SAI_xSR_MUTEDET)
555#define SAI_FLAG_WCKCFG ((uint32_t)SAI_xSR_WCKCFG)
556#define SAI_FLAG_FREQ ((uint32_t)SAI_xSR_FREQ)
557#define SAI_FLAG_CNRDY ((uint32_t)SAI_xSR_CNRDY)
558#define SAI_FLAG_AFSDET ((uint32_t)SAI_xSR_AFSDET)
559#define SAI_FLAG_LFSDET ((uint32_t)SAI_xSR_LFSDET)
560/**
561 * @}
562 */
563
564/** @defgroup SAI_Block_Fifo_Status_Level SAI Block Fifo Status Level
565 * @{
566 */
567#define SAI_FIFOSTATUS_EMPTY 0x00000000U
568#define SAI_FIFOSTATUS_LESS1QUARTERFULL 0x00010000U
569#define SAI_FIFOSTATUS_1QUARTERFULL 0x00020000U
570#define SAI_FIFOSTATUS_HALFFULL 0x00030000U
571#define SAI_FIFOSTATUS_3QUARTERFULL 0x00040000U
572#define SAI_FIFOSTATUS_FULL 0x00050000U
573/**
574 * @}
575 */
576
577/**
578 * @}
579 */
580
581/* Exported macro ------------------------------------------------------------*/
582/** @defgroup SAI_Exported_Macros SAI Exported Macros
583 * @brief macros to handle interrupts and specific configurations
584 * @{
585 */
586
587/** @brief Reset SAI handle state
588 * @param __HANDLE__ specifies the SAI Handle.
589 * @retval None
590 */
591#if (USE_HAL_SAI_REGISTER_CALLBACKS == 1)
592#define __HAL_SAI_RESET_HANDLE_STATE(__HANDLE__) do{ \
593 (__HANDLE__)->State = HAL_SAI_STATE_RESET; \
594 (__HANDLE__)->MspInitCallback = NULL; \
595 (__HANDLE__)->MspDeInitCallback = NULL; \
596 } while(0U)
597#else
598#define __HAL_SAI_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_SAI_STATE_RESET)
599#endif /* USE_HAL_SAI_REGISTER_CALLBACKS */
600
601/** @brief Enable or disable the specified SAI interrupts.
602 * @param __HANDLE__ specifies the SAI Handle.
603 * @param __INTERRUPT__ specifies the interrupt source to enable or disable.
604 * This parameter can be one of the following values:
605 * @arg SAI_IT_OVRUDR: Overrun underrun interrupt enable
606 * @arg SAI_IT_MUTEDET: Mute detection interrupt enable
607 * @arg SAI_IT_WCKCFG: Wrong Clock Configuration interrupt enable
608 * @arg SAI_IT_FREQ: FIFO request interrupt enable
609 * @arg SAI_IT_CNRDY: Codec not ready interrupt enable
610 * @arg SAI_IT_AFSDET: Anticipated frame synchronization detection interrupt enable
611 * @arg SAI_IT_LFSDET: Late frame synchronization detection interrupt enable
612 * @retval None
613 */
614#define __HAL_SAI_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->IMR |= (__INTERRUPT__))
615#define __HAL_SAI_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->IMR &= (~(__INTERRUPT__)))
616
617/** @brief Check if the specified SAI interrupt source is enabled or disabled.
618 * @param __HANDLE__ specifies the SAI Handle.
619 * This parameter can be SAI where x: 1, 2, or 3 to select the SAI peripheral.
620 * @param __INTERRUPT__ specifies the SAI interrupt source to check.
621 * This parameter can be one of the following values:
622 * @arg SAI_IT_OVRUDR: Overrun underrun interrupt enable
623 * @arg SAI_IT_MUTEDET: Mute detection interrupt enable
624 * @arg SAI_IT_WCKCFG: Wrong Clock Configuration interrupt enable
625 * @arg SAI_IT_FREQ: FIFO request interrupt enable
626 * @arg SAI_IT_CNRDY: Codec not ready interrupt enable
627 * @arg SAI_IT_AFSDET: Anticipated frame synchronization detection interrupt enable
628 * @arg SAI_IT_LFSDET: Late frame synchronization detection interrupt enable
629 * @retval The new state of __INTERRUPT__ (TRUE or FALSE).
630 */
631#define __HAL_SAI_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->IMR & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
632
633/** @brief Check whether the specified SAI flag is set or not.
634 * @param __HANDLE__ specifies the SAI Handle.
635 * @param __FLAG__ specifies the flag to check.
636 * This parameter can be one of the following values:
637 * @arg SAI_FLAG_OVRUDR: Overrun underrun flag.
638 * @arg SAI_FLAG_MUTEDET: Mute detection flag.
639 * @arg SAI_FLAG_WCKCFG: Wrong Clock Configuration flag.
640 * @arg SAI_FLAG_FREQ: FIFO request flag.
641 * @arg SAI_FLAG_CNRDY: Codec not ready flag.
642 * @arg SAI_FLAG_AFSDET: Anticipated frame synchronization detection flag.
643 * @arg SAI_FLAG_LFSDET: Late frame synchronization detection flag.
644 * @retval The new state of __FLAG__ (TRUE or FALSE).
645 */
646#define __HAL_SAI_GET_FLAG(__HANDLE__, __FLAG__) ((((__HANDLE__)->Instance->SR) & (__FLAG__)) == (__FLAG__))
647
648/** @brief Clear the specified SAI pending flag.
649 * @param __HANDLE__ specifies the SAI Handle.
650 * @param __FLAG__ specifies the flag to check.
651 * This parameter can be any combination of the following values:
652 * @arg SAI_FLAG_OVRUDR: Clear Overrun underrun
653 * @arg SAI_FLAG_MUTEDET: Clear Mute detection
654 * @arg SAI_FLAG_WCKCFG: Clear Wrong Clock Configuration
655 * @arg SAI_FLAG_FREQ: Clear FIFO request
656 * @arg SAI_FLAG_CNRDY: Clear Codec not ready
657 * @arg SAI_FLAG_AFSDET: Clear Anticipated frame synchronization detection
658 * @arg SAI_FLAG_LFSDET: Clear Late frame synchronization detection
659 * @retval None
660 */
661#define __HAL_SAI_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->CLRFR = (__FLAG__))
662
663/** @brief Enable SAI
664 * @param __HANDLE__ specifies the SAI Handle.
665 * @retval None
666 */
667#define __HAL_SAI_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 |= SAI_xCR1_SAIEN)
668
669/** @brief Disable SAI
670 * @param __HANDLE__ specifies the SAI Handle.
671 * @retval None
672 */
673#define __HAL_SAI_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 &= ~SAI_xCR1_SAIEN)
674
675/**
676 * @}
677 */
678
679/* Include HAL SAI Extension module */
680#include "stm32f4xx_hal_sai_ex.h"
681
682/* Exported functions --------------------------------------------------------*/
683/** @addtogroup SAI_Exported_Functions
684 * @{
685 */
686
687/* Initialization/de-initialization functions **********************************/
688/** @addtogroup SAI_Exported_Functions_Group1
689 * @{
690 */
691HAL_StatusTypeDef HAL_SAI_InitProtocol(SAI_HandleTypeDef *hsai, uint32_t protocol, uint32_t datasize, uint32_t nbslot);
692HAL_StatusTypeDef HAL_SAI_Init(SAI_HandleTypeDef *hsai);
693HAL_StatusTypeDef HAL_SAI_DeInit(SAI_HandleTypeDef *hsai);
694void HAL_SAI_MspInit(SAI_HandleTypeDef *hsai);
695void HAL_SAI_MspDeInit(SAI_HandleTypeDef *hsai);
696
697#if (USE_HAL_SAI_REGISTER_CALLBACKS == 1)
698/* SAI callbacks register/unregister functions ********************************/
699HAL_StatusTypeDef HAL_SAI_RegisterCallback(SAI_HandleTypeDef *hsai,
700 HAL_SAI_CallbackIDTypeDef CallbackID,
701 pSAI_CallbackTypeDef pCallback);
702HAL_StatusTypeDef HAL_SAI_UnRegisterCallback(SAI_HandleTypeDef *hsai,
703 HAL_SAI_CallbackIDTypeDef CallbackID);
704#endif /* USE_HAL_SAI_REGISTER_CALLBACKS */
705/**
706 * @}
707 */
708
709/* I/O operation functions *****************************************************/
710/** @addtogroup SAI_Exported_Functions_Group2
711 * @{
712 */
713/* Blocking mode: Polling */
714HAL_StatusTypeDef HAL_SAI_Transmit(SAI_HandleTypeDef *hsai, uint8_t *pData, uint16_t Size, uint32_t Timeout);
715HAL_StatusTypeDef HAL_SAI_Receive(SAI_HandleTypeDef *hsai, uint8_t *pData, uint16_t Size, uint32_t Timeout);
716
717/* Non-Blocking mode: Interrupt */
718HAL_StatusTypeDef HAL_SAI_Transmit_IT(SAI_HandleTypeDef *hsai, uint8_t *pData, uint16_t Size);
719HAL_StatusTypeDef HAL_SAI_Receive_IT(SAI_HandleTypeDef *hsai, uint8_t *pData, uint16_t Size);
720
721/* Non-Blocking mode: DMA */
722HAL_StatusTypeDef HAL_SAI_Transmit_DMA(SAI_HandleTypeDef *hsai, uint8_t *pData, uint16_t Size);
723HAL_StatusTypeDef HAL_SAI_Receive_DMA(SAI_HandleTypeDef *hsai, uint8_t *pData, uint16_t Size);
724HAL_StatusTypeDef HAL_SAI_DMAPause(SAI_HandleTypeDef *hsai);
725HAL_StatusTypeDef HAL_SAI_DMAResume(SAI_HandleTypeDef *hsai);
726HAL_StatusTypeDef HAL_SAI_DMAStop(SAI_HandleTypeDef *hsai);
727
728/* Abort function */
729HAL_StatusTypeDef HAL_SAI_Abort(SAI_HandleTypeDef *hsai);
730
731/* Mute management */
732HAL_StatusTypeDef HAL_SAI_EnableTxMuteMode(SAI_HandleTypeDef *hsai, uint16_t val);
733HAL_StatusTypeDef HAL_SAI_DisableTxMuteMode(SAI_HandleTypeDef *hsai);
734HAL_StatusTypeDef HAL_SAI_EnableRxMuteMode(SAI_HandleTypeDef *hsai, SAIcallback callback, uint16_t counter);
735HAL_StatusTypeDef HAL_SAI_DisableRxMuteMode(SAI_HandleTypeDef *hsai);
736
737/* SAI IRQHandler and Callbacks used in non blocking modes (Interrupt and DMA) */
738void HAL_SAI_IRQHandler(SAI_HandleTypeDef *hsai);
739void HAL_SAI_TxHalfCpltCallback(SAI_HandleTypeDef *hsai);
740void HAL_SAI_TxCpltCallback(SAI_HandleTypeDef *hsai);
741void HAL_SAI_RxHalfCpltCallback(SAI_HandleTypeDef *hsai);
742void HAL_SAI_RxCpltCallback(SAI_HandleTypeDef *hsai);
743void HAL_SAI_ErrorCallback(SAI_HandleTypeDef *hsai);
744/**
745 * @}
746 */
747
748/** @addtogroup SAI_Exported_Functions_Group3
749 * @{
750 */
751/* Peripheral State functions ************************************************/
752HAL_SAI_StateTypeDef HAL_SAI_GetState(SAI_HandleTypeDef *hsai);
753uint32_t HAL_SAI_GetError(SAI_HandleTypeDef *hsai);
754/**
755 * @}
756 */
757
758/**
759 * @}
760 */
761
762/* Private macros ------------------------------------------------------------*/
763/** @addtogroup SAI_Private_Macros
764 * @{
765 */
766#define IS_SAI_BLOCK_SYNCEXT(STATE) (((STATE) == SAI_SYNCEXT_DISABLE) ||\
767 ((STATE) == SAI_SYNCEXT_OUTBLOCKA_ENABLE) ||\
768 ((STATE) == SAI_SYNCEXT_OUTBLOCKB_ENABLE))
769
770#define IS_SAI_SUPPORTED_PROTOCOL(PROTOCOL) (((PROTOCOL) == SAI_I2S_STANDARD) ||\
771 ((PROTOCOL) == SAI_I2S_MSBJUSTIFIED) ||\
772 ((PROTOCOL) == SAI_I2S_LSBJUSTIFIED) ||\
773 ((PROTOCOL) == SAI_PCM_LONG) ||\
774 ((PROTOCOL) == SAI_PCM_SHORT))
775
776#define IS_SAI_PROTOCOL_DATASIZE(DATASIZE) (((DATASIZE) == SAI_PROTOCOL_DATASIZE_16BIT) ||\
777 ((DATASIZE) == SAI_PROTOCOL_DATASIZE_16BITEXTENDED) ||\
778 ((DATASIZE) == SAI_PROTOCOL_DATASIZE_24BIT) ||\
779 ((DATASIZE) == SAI_PROTOCOL_DATASIZE_32BIT))
780
781#define IS_SAI_AUDIO_FREQUENCY(AUDIO) (((AUDIO) == SAI_AUDIO_FREQUENCY_192K) || ((AUDIO) == SAI_AUDIO_FREQUENCY_96K) || \
782 ((AUDIO) == SAI_AUDIO_FREQUENCY_48K) || ((AUDIO) == SAI_AUDIO_FREQUENCY_44K) || \
783 ((AUDIO) == SAI_AUDIO_FREQUENCY_32K) || ((AUDIO) == SAI_AUDIO_FREQUENCY_22K) || \
784 ((AUDIO) == SAI_AUDIO_FREQUENCY_16K) || ((AUDIO) == SAI_AUDIO_FREQUENCY_11K) || \
785 ((AUDIO) == SAI_AUDIO_FREQUENCY_8K) || ((AUDIO) == SAI_AUDIO_FREQUENCY_MCKDIV))
786
787#define IS_SAI_BLOCK_MODE(MODE) (((MODE) == SAI_MODEMASTER_TX) || \
788 ((MODE) == SAI_MODEMASTER_RX) || \
789 ((MODE) == SAI_MODESLAVE_TX) || \
790 ((MODE) == SAI_MODESLAVE_RX))
791
792#define IS_SAI_BLOCK_PROTOCOL(PROTOCOL) (((PROTOCOL) == SAI_FREE_PROTOCOL) || \
793 ((PROTOCOL) == SAI_AC97_PROTOCOL) || \
794 ((PROTOCOL) == SAI_SPDIF_PROTOCOL))
795
796#define IS_SAI_BLOCK_DATASIZE(DATASIZE) (((DATASIZE) == SAI_DATASIZE_8) || \
797 ((DATASIZE) == SAI_DATASIZE_10) || \
798 ((DATASIZE) == SAI_DATASIZE_16) || \
799 ((DATASIZE) == SAI_DATASIZE_20) || \
800 ((DATASIZE) == SAI_DATASIZE_24) || \
801 ((DATASIZE) == SAI_DATASIZE_32))
802
803#define IS_SAI_BLOCK_FIRST_BIT(BIT) (((BIT) == SAI_FIRSTBIT_MSB) || \
804 ((BIT) == SAI_FIRSTBIT_LSB))
805
806#define IS_SAI_BLOCK_CLOCK_STROBING(CLOCK) (((CLOCK) == SAI_CLOCKSTROBING_FALLINGEDGE) || \
807 ((CLOCK) == SAI_CLOCKSTROBING_RISINGEDGE))
808
809#define IS_SAI_BLOCK_SYNCHRO(SYNCHRO) (((SYNCHRO) == SAI_ASYNCHRONOUS) || \
810 ((SYNCHRO) == SAI_SYNCHRONOUS) || \
811 ((SYNCHRO) == SAI_SYNCHRONOUS_EXT_SAI1) ||\
812 ((SYNCHRO) == SAI_SYNCHRONOUS_EXT_SAI2))
813
814#define IS_SAI_BLOCK_OUTPUT_DRIVE(DRIVE) (((DRIVE) == SAI_OUTPUTDRIVE_DISABLE) || \
815 ((DRIVE) == SAI_OUTPUTDRIVE_ENABLE))
816
817#define IS_SAI_BLOCK_NODIVIDER(NODIVIDER) (((NODIVIDER) == SAI_MASTERDIVIDER_ENABLE) || \
818 ((NODIVIDER) == SAI_MASTERDIVIDER_DISABLE))
819
820#define IS_SAI_BLOCK_MUTE_COUNTER(COUNTER) ((COUNTER) <= 63U)
821
822#define IS_SAI_BLOCK_MUTE_VALUE(VALUE) (((VALUE) == SAI_ZERO_VALUE) || \
823 ((VALUE) == SAI_LAST_SENT_VALUE))
824
825#define IS_SAI_BLOCK_COMPANDING_MODE(MODE) (((MODE) == SAI_NOCOMPANDING) || \
826 ((MODE) == SAI_ULAW_1CPL_COMPANDING) || \
827 ((MODE) == SAI_ALAW_1CPL_COMPANDING) || \
828 ((MODE) == SAI_ULAW_2CPL_COMPANDING) || \
829 ((MODE) == SAI_ALAW_2CPL_COMPANDING))
830
831#define IS_SAI_BLOCK_FIFO_THRESHOLD(THRESHOLD) (((THRESHOLD) == SAI_FIFOTHRESHOLD_EMPTY) || \
832 ((THRESHOLD) == SAI_FIFOTHRESHOLD_1QF) || \
833 ((THRESHOLD) == SAI_FIFOTHRESHOLD_HF) || \
834 ((THRESHOLD) == SAI_FIFOTHRESHOLD_3QF) || \
835 ((THRESHOLD) == SAI_FIFOTHRESHOLD_FULL))
836
837#define IS_SAI_BLOCK_TRISTATE_MANAGEMENT(STATE) (((STATE) == SAI_OUTPUT_NOTRELEASED) ||\
838 ((STATE) == SAI_OUTPUT_RELEASED))
839
840#define IS_SAI_MONO_STEREO_MODE(MODE) (((MODE) == SAI_MONOMODE) ||\
841 ((MODE) == SAI_STEREOMODE))
842
843#define IS_SAI_SLOT_ACTIVE(ACTIVE) ((ACTIVE) <= SAI_SLOTACTIVE_ALL)
844
845#define IS_SAI_BLOCK_SLOT_NUMBER(NUMBER) ((1U <= (NUMBER)) && ((NUMBER) <= 16U))
846
847#define IS_SAI_BLOCK_SLOT_SIZE(SIZE) (((SIZE) == SAI_SLOTSIZE_DATASIZE) || \
848 ((SIZE) == SAI_SLOTSIZE_16B) || \
849 ((SIZE) == SAI_SLOTSIZE_32B))
850
851#define IS_SAI_BLOCK_FIRSTBIT_OFFSET(OFFSET) ((OFFSET) <= 24U)
852
853#define IS_SAI_BLOCK_FS_OFFSET(OFFSET) (((OFFSET) == SAI_FS_FIRSTBIT) || \
854 ((OFFSET) == SAI_FS_BEFOREFIRSTBIT))
855
856#define IS_SAI_BLOCK_FS_POLARITY(POLARITY) (((POLARITY) == SAI_FS_ACTIVE_LOW) || \
857 ((POLARITY) == SAI_FS_ACTIVE_HIGH))
858
859#define IS_SAI_BLOCK_FS_DEFINITION(DEFINITION) (((DEFINITION) == SAI_FS_STARTFRAME) || \
860 ((DEFINITION) == SAI_FS_CHANNEL_IDENTIFICATION))
861
862#define IS_SAI_BLOCK_MASTER_DIVIDER(DIVIDER) ((DIVIDER) <= 15U)
863
864#define IS_SAI_BLOCK_FRAME_LENGTH(LENGTH) ((8U <= (LENGTH)) && ((LENGTH) <= 256U))
865
866#define IS_SAI_BLOCK_ACTIVE_FRAME(LENGTH) ((1U <= (LENGTH)) && ((LENGTH) <= 128U))
867
868/**
869 * @}
870 */
871
872/* Private functions ---------------------------------------------------------*/
873/** @defgroup SAI_Private_Functions SAI Private Functions
874 * @{
875 */
876
877/**
878 * @}
879 */
880
881/**
882 * @}
883 */
884
885#endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F446xx || STM32F469xx || STM32F479xx || STM32F413xx || STM32F423xx */
886
887/**
888 * @}
889 */
890
891#ifdef __cplusplus
892}
893#endif
894
895#endif /* __STM32F4xx_HAL_SAI_H */
896
897/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
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