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stm32f4xx_hal_smbus.h

Last change on this file was 1, checked in by AlexLir, 3 years ago

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1	/**
2	******************************************************************************
3	* @file stm32f4xx_hal_smbus.h
4	* @author MCD Application Team
5	* @brief Header file of SMBUS HAL module.
6	******************************************************************************
7	* @attention
8	*
9	* <h2><center>© Copyright (c) 2016 STMicroelectronics.
10	* All rights reserved.</center></h2>
11	*
12	* This software component is licensed by ST under BSD 3-Clause license,
13	* the "License"; You may not use this file except in compliance with the
14	* License. You may obtain a copy of the License at:
15	* opensource.org/licenses/BSD-3-Clause
16	*
17	******************************************************************************
18	*/
19
20	/* Define to prevent recursive inclusion -------------------------------------*/
21	#ifndef __STM32F4xx_HAL_SMBUS_H
22	#define __STM32F4xx_HAL_SMBUS_H
23
24	#ifdef __cplusplus
25	extern "C" {
26	#endif
27
28	/* Includes ------------------------------------------------------------------*/
29	#include "stm32f4xx_hal_def.h"
30
31	/** @addtogroup STM32F4xx_HAL_Driver
32	* @{
33	*/
34
35	/** @addtogroup SMBUS
36	* @{
37	*/
38
39	/* Exported types ------------------------------------------------------------*/
40	/** @defgroup SMBUS_Exported_Types SMBUS Exported Types
41	* @{
42	*/
43
44	/**
45	* @brief SMBUS Configuration Structure definition
46	*/
47	typedef struct
48	{
49	uint32_t ClockSpeed; /*!< Specifies the clock frequency.
50	This parameter must be set to a value lower than 100kHz */
51
52	uint32_t AnalogFilter; /*!< Specifies if Analog Filter is enable or not.
53	This parameter can be a value of @ref SMBUS_Analog_Filter */
54
55	uint32_t OwnAddress1; /*!< Specifies the first device own address.
56	This parameter can be a 7-bit or 10-bit address. */
57
58	uint32_t AddressingMode; /*!< Specifies if 7-bit or 10-bit addressing mode is selected.
59	This parameter can be a value of @ref SMBUS_addressing_mode */
60
61	uint32_t DualAddressMode; /*!< Specifies if dual addressing mode is selected.
62	This parameter can be a value of @ref SMBUS_dual_addressing_mode */
63
64	uint32_t OwnAddress2; /*!< Specifies the second device own address if dual addressing mode is
65	selected. This parameter can be a 7-bit address. */
66
67	uint32_t GeneralCallMode; /*!< Specifies if general call mode is selected.
68	This parameter can be a value of @ref SMBUS_general_call_addressing_mode */
69
70	uint32_t NoStretchMode; /*!< Specifies if nostretch mode is selected.
71	This parameter can be a value of @ref SMBUS_nostretch_mode */
72
73	uint32_t PacketErrorCheckMode; /*!< Specifies if Packet Error Check mode is selected.
74	This parameter can be a value of @ref SMBUS_packet_error_check_mode */
75
76	uint32_t PeripheralMode; /*!< Specifies which mode of Periphal is selected.
77	This parameter can be a value of @ref SMBUS_peripheral_mode */
78
79	} SMBUS_InitTypeDef;
80
81	/**
82	* @brief HAL State structure definition
83	* @note HAL SMBUS State value coding follow below described bitmap :
84	* b7-b6 Error information
85	* 00 : No Error
86	* 01 : Abort (Abort user request on going)
87	* 10 : Timeout
88	* 11 : Error
89	* b5 IP initialisation status
90	* 0 : Reset (IP not initialized)
91	* 1 : Init done (IP initialized and ready to use. HAL SMBUS Init function called)
92	* b4 (not used)
93	* x : Should be set to 0
94	* b3
95	* 0 : Ready or Busy (No Listen mode ongoing)
96	* 1 : Listen (IP in Address Listen Mode)
97	* b2 Intrinsic process state
98	* 0 : Ready
99	* 1 : Busy (IP busy with some configuration or internal operations)
100	* b1 Rx state
101	* 0 : Ready (no Rx operation ongoing)
102	* 1 : Busy (Rx operation ongoing)
103	* b0 Tx state
104	* 0 : Ready (no Tx operation ongoing)
105	* 1 : Busy (Tx operation ongoing)
106	*/
107	typedef enum
108	{
109
110	HAL_SMBUS_STATE_RESET = 0x00U, /!< Peripheral is not yet Initialized /
111	HAL_SMBUS_STATE_READY = 0x20U, /!< Peripheral Initialized and ready for use /
112	HAL_SMBUS_STATE_BUSY = 0x24U, /!< An internal process is ongoing /
113	HAL_SMBUS_STATE_BUSY_TX = 0x21U, /!< Data Transmission process is ongoing /
114	HAL_SMBUS_STATE_BUSY_RX = 0x22U, /!< Data Reception process is ongoing /
115	HAL_SMBUS_STATE_LISTEN = 0x28U, /!< Address Listen Mode is ongoing /
116	HAL_SMBUS_STATE_BUSY_TX_LISTEN = 0x29U, /*!< Address Listen Mode and Data Transmission
117	process is ongoing */
118	HAL_SMBUS_STATE_BUSY_RX_LISTEN = 0x2AU, /*!< Address Listen Mode and Data Reception
119	process is ongoing */
120	HAL_SMBUS_STATE_ABORT = 0x60U, /!< Abort user request ongoing /
121	HAL_SMBUS_STATE_TIMEOUT = 0xA0U, /!< Timeout state /
122	HAL_SMBUS_STATE_ERROR = 0xE0U /!< Error /
123	} HAL_SMBUS_StateTypeDef;
124
125	/**
126	* @brief HAL Mode structure definition
127	* @note HAL SMBUS Mode value coding follow below described bitmap :
128	* b7 (not used)
129	* x : Should be set to 0
130	* b6 (not used)
131	* x : Should be set to 0
132	* b5
133	* 0 : None
134	* 1 : Slave (HAL SMBUS communication is in Slave/Device Mode)
135	* b4
136	* 0 : None
137	* 1 : Master (HAL SMBUS communication is in Master/Host Mode)
138	* b3-b2-b1-b0 (not used)
139	* xxxx : Should be set to 0000
140	*/
141	typedef enum
142	{
143	HAL_SMBUS_MODE_NONE = 0x00U, /!< No SMBUS communication on going /
144	HAL_SMBUS_MODE_MASTER = 0x10U, /!< SMBUS communication is in Master Mode /
145	HAL_SMBUS_MODE_SLAVE = 0x20U, /!< SMBUS communication is in Slave Mode /
146
147	} HAL_SMBUS_ModeTypeDef;
148
149	/**
150	* @brief SMBUS handle Structure definition
151	*/
152	typedef struct __SMBUS_HandleTypeDef
153	{
154	I2C_TypeDef Instance; /!< SMBUS registers base address */
155
156	SMBUS_InitTypeDef Init; /!< SMBUS communication parameters /
157
158	uint8_t pBuffPtr; /!< Pointer to SMBUS transfer buffer */
159
160	uint16_t XferSize; /!< SMBUS transfer size /
161
162	__IO uint16_t XferCount; /!< SMBUS transfer counter /
163
164	__IO uint32_t XferOptions; /*!< SMBUS transfer options this parameter can
165	be a value of @ref SMBUS_OPTIONS */
166
167	__IO uint32_t PreviousState; /*!< SMBUS communication Previous state and mode
168	context for internal usage */
169
170	HAL_LockTypeDef Lock; /!< SMBUS locking object /
171
172	__IO HAL_SMBUS_StateTypeDef State; /!< SMBUS communication state /
173
174	__IO HAL_SMBUS_ModeTypeDef Mode; /!< SMBUS communication mode /
175
176	__IO uint32_t ErrorCode; /!< SMBUS Error code /
177
178	__IO uint32_t Devaddress; /!< SMBUS Target device address /
179
180	__IO uint32_t EventCount; /!< SMBUS Event counter /
181
182	uint8_t XferPEC; /!< SMBUS PEC data in reception mode /
183
184	#if (USE_HAL_SMBUS_REGISTER_CALLBACKS == 1)
185	void (* MasterTxCpltCallback)(struct __SMBUS_HandleTypeDef hsmbus); /!< SMBUS Master Tx Transfer completed callback */
186	void (* MasterRxCpltCallback)(struct __SMBUS_HandleTypeDef hsmbus); /!< SMBUS Master Rx Transfer completed callback */
187	void (* SlaveTxCpltCallback)(struct __SMBUS_HandleTypeDef hsmbus); /!< SMBUS Slave Tx Transfer completed callback */
188	void (* SlaveRxCpltCallback)(struct __SMBUS_HandleTypeDef hsmbus); /!< SMBUS Slave Rx Transfer completed callback */
189	void (* ListenCpltCallback)(struct __SMBUS_HandleTypeDef hsmbus); /!< SMBUS Listen Complete callback */
190	void (* MemTxCpltCallback)(struct __SMBUS_HandleTypeDef hsmbus); /!< SMBUS Memory Tx Transfer completed callback */
191	void (* MemRxCpltCallback)(struct __SMBUS_HandleTypeDef hsmbus); /!< SMBUS Memory Rx Transfer completed callback */
192	void (* ErrorCallback)(struct __SMBUS_HandleTypeDef hsmbus); /!< SMBUS Error callback */
193	void (* AbortCpltCallback)(struct __SMBUS_HandleTypeDef hsmbus); /!< SMBUS Abort callback */
194	void (* AddrCallback)(struct __SMBUS_HandleTypeDef hsmbus, uint8_t TransferDirection, uint16_t AddrMatchCode); /!< SMBUS Slave Address Match callback */
195	void (* MspInitCallback)(struct __SMBUS_HandleTypeDef hsmbus); /!< SMBUS Msp Init callback */
196	void (* MspDeInitCallback)(struct __SMBUS_HandleTypeDef hsmbus); /!< SMBUS Msp DeInit callback */
197
198	#endif /* USE_HAL_SMBUS_REGISTER_CALLBACKS */
199	} SMBUS_HandleTypeDef;
200
201	#if (USE_HAL_SMBUS_REGISTER_CALLBACKS == 1)
202	/**
203	* @brief HAL SMBUS Callback ID enumeration definition
204	*/
205	typedef enum
206	{
207	HAL_SMBUS_MASTER_TX_COMPLETE_CB_ID = 0x00U, /!< SMBUS Master Tx Transfer completed callback ID /
208	HAL_SMBUS_MASTER_RX_COMPLETE_CB_ID = 0x01U, /!< SMBUS Master Rx Transfer completed callback ID /
209	HAL_SMBUS_SLAVE_TX_COMPLETE_CB_ID = 0x02U, /!< SMBUS Slave Tx Transfer completed callback ID /
210	HAL_SMBUS_SLAVE_RX_COMPLETE_CB_ID = 0x03U, /!< SMBUS Slave Rx Transfer completed callback ID /
211	HAL_SMBUS_LISTEN_COMPLETE_CB_ID = 0x04U, /!< SMBUS Listen Complete callback ID /
212	HAL_SMBUS_ERROR_CB_ID = 0x07U, /!< SMBUS Error callback ID /
213	HAL_SMBUS_ABORT_CB_ID = 0x08U, /!< SMBUS Abort callback ID /
214	HAL_SMBUS_MSPINIT_CB_ID = 0x09U, /!< SMBUS Msp Init callback ID /
215	HAL_SMBUS_MSPDEINIT_CB_ID = 0x0AU /!< SMBUS Msp DeInit callback ID /
216
217	} HAL_SMBUS_CallbackIDTypeDef;
218
219	/**
220	* @brief HAL SMBUS Callback pointer definition
221	*/
222	typedef void (pSMBUS_CallbackTypeDef)(SMBUS_HandleTypeDef hsmbus); /!< pointer to an I2C callback function /
223	typedef void (pSMBUS_AddrCallbackTypeDef)(SMBUS_HandleTypeDef hsmbus, uint8_t TransferDirection, uint16_t AddrMatchCode); /!< pointer to an I2C Address Match callback function /
224
225	#endif /* USE_HAL_SMBUS_REGISTER_CALLBACKS */
226
227	/**
228	* @}
229	*/
230
231	/* Exported constants --------------------------------------------------------*/
232	/** @defgroup SMBUS_Exported_Constants SMBUS Exported Constants
233	* @{
234	*/
235
236	/** @defgroup SMBUS_Error_Code_definition SMBUS Error Code
237	* @brief SMBUS Error Code
238	* @{
239	*/
240	#define HAL_SMBUS_ERROR_NONE 0x00000000U /!< No error /
241	#define HAL_SMBUS_ERROR_BERR 0x00000001U /!< BERR error /
242	#define HAL_SMBUS_ERROR_ARLO 0x00000002U /!< ARLO error /
243	#define HAL_SMBUS_ERROR_AF 0x00000004U /!< AF error /
244	#define HAL_SMBUS_ERROR_OVR 0x00000008U /!< OVR error /
245	#define HAL_SMBUS_ERROR_TIMEOUT 0x00000010U /!< Timeout Error /
246	#define HAL_SMBUS_ERROR_ALERT 0x00000020U /!< Alert error /
247	#define HAL_SMBUS_ERROR_PECERR 0x00000040U /!< PEC error /
248	#if (USE_HAL_SMBUS_REGISTER_CALLBACKS == 1)
249	#define HAL_SMBUS_ERROR_INVALID_CALLBACK 0x00000080U /!< Invalid Callback error /
250	#endif /* USE_HAL_SMBUS_REGISTER_CALLBACKS */
251
252	/**
253	* @}
254	*/
255
256	/** @defgroup SMBUS_Analog_Filter SMBUS Analog Filter
257	* @{
258	*/
259	#define SMBUS_ANALOGFILTER_ENABLE 0x00000000U
260	#define SMBUS_ANALOGFILTER_DISABLE I2C_FLTR_ANOFF
261	/**
262	* @}
263	*/
264
265	/** @defgroup SMBUS_addressing_mode SMBUS addressing mode
266	* @{
267	*/
268	#define SMBUS_ADDRESSINGMODE_7BIT 0x00004000U
269	#define SMBUS_ADDRESSINGMODE_10BIT (I2C_OAR1_ADDMODE \| 0x00004000U)
270	/**
271	* @}
272	*/
273
274	/** @defgroup SMBUS_dual_addressing_mode SMBUS dual addressing mode
275	* @{
276	*/
277	#define SMBUS_DUALADDRESS_DISABLE 0x00000000U
278	#define SMBUS_DUALADDRESS_ENABLE I2C_OAR2_ENDUAL
279	/**
280	* @}
281	*/
282
283	/** @defgroup SMBUS_general_call_addressing_mode SMBUS general call addressing mode
284	* @{
285	*/
286	#define SMBUS_GENERALCALL_DISABLE 0x00000000U
287	#define SMBUS_GENERALCALL_ENABLE I2C_CR1_ENGC
288	/**
289	* @}
290	*/
291
292	/** @defgroup SMBUS_nostretch_mode SMBUS nostretch mode
293	* @{
294	*/
295	#define SMBUS_NOSTRETCH_DISABLE 0x00000000U
296	#define SMBUS_NOSTRETCH_ENABLE I2C_CR1_NOSTRETCH
297	/**
298	* @}
299	*/
300
301	/** @defgroup SMBUS_packet_error_check_mode SMBUS packet error check mode
302	* @{
303	*/
304	#define SMBUS_PEC_DISABLE 0x00000000U
305	#define SMBUS_PEC_ENABLE I2C_CR1_ENPEC
306	/**
307	* @}
308	*/
309
310	/** @defgroup SMBUS_peripheral_mode SMBUS peripheral mode
311	* @{
312	*/
313	#define SMBUS_PERIPHERAL_MODE_SMBUS_HOST (uint32_t)(I2C_CR1_SMBUS \| I2C_CR1_SMBTYPE \| I2C_CR1_ENARP)
314	#define SMBUS_PERIPHERAL_MODE_SMBUS_SLAVE I2C_CR1_SMBUS
315	#define SMBUS_PERIPHERAL_MODE_SMBUS_SLAVE_ARP (uint32_t)(I2C_CR1_SMBUS \| I2C_CR1_ENARP)
316	/**
317	* @}
318	*/
319
320	/** @defgroup SMBUS_XferDirection_definition SMBUS XferDirection definition
321	* @{
322	*/
323	#define SMBUS_DIRECTION_RECEIVE 0x00000000U
324	#define SMBUS_DIRECTION_TRANSMIT 0x00000001U
325	/**
326	* @}
327	*/
328
329	/** @defgroup SMBUS_XferOptions_definition SMBUS XferOptions definition
330	* @{
331	*/
332	#define SMBUS_FIRST_FRAME 0x00000001U
333	#define SMBUS_NEXT_FRAME 0x00000002U
334	#define SMBUS_FIRST_AND_LAST_FRAME_NO_PEC 0x00000003U
335	#define SMBUS_LAST_FRAME_NO_PEC 0x00000004U
336	#define SMBUS_FIRST_AND_LAST_FRAME_WITH_PEC 0x00000005U
337	#define SMBUS_LAST_FRAME_WITH_PEC 0x00000006U
338	/**
339	* @}
340	*/
341
342	/** @defgroup SMBUS_Interrupt_configuration_definition SMBUS Interrupt configuration definition
343	* @{
344	*/
345	#define SMBUS_IT_BUF I2C_CR2_ITBUFEN
346	#define SMBUS_IT_EVT I2C_CR2_ITEVTEN
347	#define SMBUS_IT_ERR I2C_CR2_ITERREN
348	/**
349	* @}
350	*/
351
352	/** @defgroup SMBUS_Flag_definition SMBUS Flag definition
353	* @{
354	*/
355	#define SMBUS_FLAG_SMBALERT 0x00018000U
356	#define SMBUS_FLAG_TIMEOUT 0x00014000U
357	#define SMBUS_FLAG_PECERR 0x00011000U
358	#define SMBUS_FLAG_OVR 0x00010800U
359	#define SMBUS_FLAG_AF 0x00010400U
360	#define SMBUS_FLAG_ARLO 0x00010200U
361	#define SMBUS_FLAG_BERR 0x00010100U
362	#define SMBUS_FLAG_TXE 0x00010080U
363	#define SMBUS_FLAG_RXNE 0x00010040U
364	#define SMBUS_FLAG_STOPF 0x00010010U
365	#define SMBUS_FLAG_ADD10 0x00010008U
366	#define SMBUS_FLAG_BTF 0x00010004U
367	#define SMBUS_FLAG_ADDR 0x00010002U
368	#define SMBUS_FLAG_SB 0x00010001U
369	#define SMBUS_FLAG_DUALF 0x00100080U
370	#define SMBUS_FLAG_SMBHOST 0x00100040U
371	#define SMBUS_FLAG_SMBDEFAULT 0x00100020U
372	#define SMBUS_FLAG_GENCALL 0x00100010U
373	#define SMBUS_FLAG_TRA 0x00100004U
374	#define SMBUS_FLAG_BUSY 0x00100002U
375	#define SMBUS_FLAG_MSL 0x00100001U
376	/**
377	* @}
378	*/
379
380	/**
381	* @}
382	*/
383
384	/* Exported macro ------------------------------------------------------------*/
385	/** @defgroup SMBUS_Exported_Macros SMBUS Exported Macros
386	* @{
387	*/
388
389	/** @brief Reset SMBUS handle state
390	* @param __HANDLE__ specifies the SMBUS Handle.
391	* This parameter can be SMBUS where x: 1, 2, or 3 to select the SMBUS peripheral.
392	* @retval None
393	*/
394	#if (USE_HAL_SMBUS_REGISTER_CALLBACKS == 1)
395	#define __HAL_SMBUS_RESET_HANDLE_STATE(__HANDLE__) do{ \
396	(__HANDLE__)->State = HAL_SMBUS_STATE_RESET; \
397	(__HANDLE__)->MspInitCallback = NULL; \
398	(__HANDLE__)->MspDeInitCallback = NULL; \
399	} while(0)
400	#else
401	#define __HAL_SMBUS_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_SMBUS_STATE_RESET)
402	#endif
403
404	/** @brief Enable or disable the specified SMBUS interrupts.
405	* @param __HANDLE__ specifies the SMBUS Handle.
406	* This parameter can be SMBUS where x: 1, 2, or 3 to select the SMBUS peripheral.
407	* @param __INTERRUPT__ specifies the interrupt source to enable or disable.
408	* This parameter can be one of the following values:
409	* @arg SMBUS_IT_BUF: Buffer interrupt enable
410	* @arg SMBUS_IT_EVT: Event interrupt enable
411	* @arg SMBUS_IT_ERR: Error interrupt enable
412	* @retval None
413	*/
414	#define __HAL_SMBUS_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR2 \|= (__INTERRUPT__))
415	#define __HAL_SMBUS_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR2 &= (~(__INTERRUPT__)))
416
417	/** @brief Checks if the specified SMBUS interrupt source is enabled or disabled.
418	* @param __HANDLE__ specifies the SMBUS Handle.
419	* This parameter can be SMBUS where x: 1, 2, or 3 to select the SMBUS peripheral.
420	* @param __INTERRUPT__ specifies the SMBUS interrupt source to check.
421	* This parameter can be one of the following values:
422	* @arg SMBUS_IT_BUF: Buffer interrupt enable
423	* @arg SMBUS_IT_EVT: Event interrupt enable
424	* @arg SMBUS_IT_ERR: Error interrupt enable
425	* @retval The new state of __INTERRUPT__ (TRUE or FALSE).
426	*/
427	#define __HAL_SMBUS_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->CR2 & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
428
429	/** @brief Checks whether the specified SMBUS flag is set or not.
430	* @param __HANDLE__ specifies the SMBUS Handle.
431	* This parameter can be SMBUS where x: 1, 2, or 3 to select the SMBUS peripheral.
432	* @param __FLAG__ specifies the flag to check.
433	* This parameter can be one of the following values:
434	* @arg SMBUS_FLAG_SMBALERT: SMBus Alert flag
435	* @arg SMBUS_FLAG_TIMEOUT: Timeout or Tlow error flag
436	* @arg SMBUS_FLAG_PECERR: PEC error in reception flag
437	* @arg SMBUS_FLAG_OVR: Overrun/Underrun flag
438	* @arg SMBUS_FLAG_AF: Acknowledge failure flag
439	* @arg SMBUS_FLAG_ARLO: Arbitration lost flag
440	* @arg SMBUS_FLAG_BERR: Bus error flag
441	* @arg SMBUS_FLAG_TXE: Data register empty flag
442	* @arg SMBUS_FLAG_RXNE: Data register not empty flag
443	* @arg SMBUS_FLAG_STOPF: Stop detection flag
444	* @arg SMBUS_FLAG_ADD10: 10-bit header sent flag
445	* @arg SMBUS_FLAG_BTF: Byte transfer finished flag
446	* @arg SMBUS_FLAG_ADDR: Address sent flag
447	* Address matched flag
448	* @arg SMBUS_FLAG_SB: Start bit flag
449	* @arg SMBUS_FLAG_DUALF: Dual flag
450	* @arg SMBUS_FLAG_SMBHOST: SMBus host header
451	* @arg SMBUS_FLAG_SMBDEFAULT: SMBus default header
452	* @arg SMBUS_FLAG_GENCALL: General call header flag
453	* @arg SMBUS_FLAG_TRA: Transmitter/Receiver flag
454	* @arg SMBUS_FLAG_BUSY: Bus busy flag
455	* @arg SMBUS_FLAG_MSL: Master/Slave flag
456	* @retval The new state of __FLAG__ (TRUE or FALSE).
457	*/
458	#define __HAL_SMBUS_GET_FLAG(__HANDLE__, __FLAG__) ((((uint8_t)((__FLAG__) >> 16U)) == 0x01U)?((((__HANDLE__)->Instance->SR1) & ((__FLAG__) & SMBUS_FLAG_MASK)) == ((__FLAG__) & SMBUS_FLAG_MASK)): \
459	((((__HANDLE__)->Instance->SR2) & ((__FLAG__) & SMBUS_FLAG_MASK)) == ((__FLAG__) & SMBUS_FLAG_MASK)))
460
461	/** @brief Clears the SMBUS pending flags which are cleared by writing 0 in a specific bit.
462	* @param __HANDLE__ specifies the SMBUS Handle.
463	* This parameter can be SMBUS where x: 1, 2, or 3 to select the SMBUS peripheral.
464	* @param __FLAG__ specifies the flag to clear.
465	* This parameter can be any combination of the following values:
466	* @arg SMBUS_FLAG_SMBALERT: SMBus Alert flag
467	* @arg SMBUS_FLAG_TIMEOUT: Timeout or Tlow error flag
468	* @arg SMBUS_FLAG_PECERR: PEC error in reception flag
469	* @arg SMBUS_FLAG_OVR: Overrun/Underrun flag (Slave mode)
470	* @arg SMBUS_FLAG_AF: Acknowledge failure flag
471	* @arg SMBUS_FLAG_ARLO: Arbitration lost flag (Master mode)
472	* @arg SMBUS_FLAG_BERR: Bus error flag
473	* @retval None
474	*/
475	#define __HAL_SMBUS_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->SR1 = ~((__FLAG__) & SMBUS_FLAG_MASK))
476
477	/** @brief Clears the SMBUS ADDR pending flag.
478	* @param __HANDLE__ specifies the SMBUS Handle.
479	* This parameter can be SMBUS where x: 1, 2, or 3 to select the SMBUS peripheral.
480	* @retval None
481	*/
482	#define __HAL_SMBUS_CLEAR_ADDRFLAG(__HANDLE__) \
483	do{ \
484	__IO uint32_t tmpreg = 0x00U; \
485	tmpreg = (__HANDLE__)->Instance->SR1; \
486	tmpreg = (__HANDLE__)->Instance->SR2; \
487	UNUSED(tmpreg); \
488	} while(0)
489
490	/** @brief Clears the SMBUS STOPF pending flag.
491	* @param __HANDLE__ specifies the SMBUS Handle.
492	* This parameter can be SMBUS where x: 1, 2, or 3 to select the SMBUS peripheral.
493	* @retval None
494	*/
495	#define __HAL_SMBUS_CLEAR_STOPFLAG(__HANDLE__) \
496	do{ \
497	__IO uint32_t tmpreg = 0x00U; \
498	tmpreg = (__HANDLE__)->Instance->SR1; \
499	(__HANDLE__)->Instance->CR1 \|= I2C_CR1_PE; \
500	UNUSED(tmpreg); \
501	} while(0)
502
503	/** @brief Enable the SMBUS peripheral.
504	* @param __HANDLE__ specifies the SMBUS Handle.
505	* This parameter can be SMBUSx where x: 1 or 2 to select the SMBUS peripheral.
506	* @retval None
507	*/
508	#define __HAL_SMBUS_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 \|= I2C_CR1_PE)
509
510	/** @brief Disable the SMBUS peripheral.
511	* @param __HANDLE__ specifies the SMBUS Handle.
512	* This parameter can be SMBUSx where x: 1 or 2 to select the SMBUS peripheral.
513	* @retval None
514	*/
515	#define __HAL_SMBUS_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 &= ~I2C_CR1_PE)
516
517	/** @brief Generate a Non-Acknowledge SMBUS peripheral in Slave mode.
518	* @param __HANDLE__ specifies the SMBUS Handle.
519	* @retval None
520	*/
521	#define __HAL_SMBUS_GENERATE_NACK(__HANDLE__) (CLEAR_BIT((__HANDLE__)->Instance->CR1, I2C_CR1_ACK))
522
523	/**
524	* @}
525	*/
526
527	/* Exported functions --------------------------------------------------------*/
528	/** @addtogroup SMBUS_Exported_Functions
529	* @{
530	*/
531
532	/** @addtogroup SMBUS_Exported_Functions_Group1 Initialization and de-initialization functions
533	* @{
534	*/
535
536	/* Initialization/de-initialization functions **********************************/
537	HAL_StatusTypeDef HAL_SMBUS_Init(SMBUS_HandleTypeDef *hsmbus);
538	HAL_StatusTypeDef HAL_SMBUS_DeInit(SMBUS_HandleTypeDef *hsmbus);
539	void HAL_SMBUS_MspInit(SMBUS_HandleTypeDef *hsmbus);
540	void HAL_SMBUS_MspDeInit(SMBUS_HandleTypeDef *hsmbus);
541
542	/* Callbacks Register/UnRegister functions ************************************/
543	#if (USE_HAL_SMBUS_REGISTER_CALLBACKS == 1)
544	HAL_StatusTypeDef HAL_SMBUS_RegisterCallback(SMBUS_HandleTypeDef *hsmbus, HAL_SMBUS_CallbackIDTypeDef CallbackID, pSMBUS_CallbackTypeDef pCallback);
545	HAL_StatusTypeDef HAL_SMBUS_UnRegisterCallback(SMBUS_HandleTypeDef *hsmbus, HAL_SMBUS_CallbackIDTypeDef CallbackID);
546
547	HAL_StatusTypeDef HAL_SMBUS_RegisterAddrCallback(SMBUS_HandleTypeDef *hsmbus, pSMBUS_AddrCallbackTypeDef pCallback);
548	HAL_StatusTypeDef HAL_SMBUS_UnRegisterAddrCallback(SMBUS_HandleTypeDef *hsmbus);
549	#endif /* USE_HAL_SMBUS_REGISTER_CALLBACKS */
550
551	/**
552	* @}
553	*/
554
555	/** @addtogroup SMBUS_Exported_Functions_Group2 Input and Output operation functions
556	* @{
557	*/
558
559	/* IO operation functions *****************************************************/
560	/** @addtogroup Blocking_mode_Polling Blocking mode Polling
561	* @{
562	*/
563	/******* Blocking mode: Polling */
564	HAL_StatusTypeDef HAL_SMBUS_IsDeviceReady(SMBUS_HandleTypeDef *hsmbus, uint16_t DevAddress, uint32_t Trials, uint32_t Timeout);
565	/**
566	* @}
567	*/
568
569	/** @addtogroup Non-Blocking_mode_Interrupt Non-Blocking mode Interrupt
570	* @{
571	*/
572	/******* Non-Blocking mode: Interrupt */
573	HAL_StatusTypeDef HAL_SMBUS_Master_Transmit_IT(SMBUS_HandleTypeDef hsmbus, uint16_t DevAddress, uint8_t pData, uint16_t Size, uint32_t XferOptions);
574	HAL_StatusTypeDef HAL_SMBUS_Master_Receive_IT(SMBUS_HandleTypeDef hsmbus, uint16_t DevAddress, uint8_t pData, uint16_t Size, uint32_t XferOptions);
575	HAL_StatusTypeDef HAL_SMBUS_Master_Abort_IT(SMBUS_HandleTypeDef *hsmbus, uint16_t DevAddress);
576	HAL_StatusTypeDef HAL_SMBUS_Slave_Transmit_IT(SMBUS_HandleTypeDef hsmbus, uint8_t pData, uint16_t Size, uint32_t XferOptions);
577	HAL_StatusTypeDef HAL_SMBUS_Slave_Receive_IT(SMBUS_HandleTypeDef hsmbus, uint8_t pData, uint16_t Size, uint32_t XferOptions);
578
579	HAL_StatusTypeDef HAL_SMBUS_EnableAlert_IT(SMBUS_HandleTypeDef *hsmbus);
580	HAL_StatusTypeDef HAL_SMBUS_DisableAlert_IT(SMBUS_HandleTypeDef *hsmbus);
581	HAL_StatusTypeDef HAL_SMBUS_EnableListen_IT(SMBUS_HandleTypeDef *hsmbus);
582	HAL_StatusTypeDef HAL_SMBUS_DisableListen_IT(SMBUS_HandleTypeDef *hsmbus);
583
584	/****** Filter Configuration functions */
585	#if defined(I2C_FLTR_ANOFF)&&defined(I2C_FLTR_DNF)
586	HAL_StatusTypeDef HAL_SMBUS_ConfigAnalogFilter(SMBUS_HandleTypeDef *hsmbus, uint32_t AnalogFilter);
587	HAL_StatusTypeDef HAL_SMBUS_ConfigDigitalFilter(SMBUS_HandleTypeDef *hsmbus, uint32_t DigitalFilter);
588	#endif
589	/**
590	* @}
591	*/
592
593	/** @addtogroup SMBUS_IRQ_Handler_and_Callbacks IRQ Handler and Callbacks
594	* @{
595	*/
596	/******* SMBUS IRQHandler and Callbacks used in non blocking modes (Interrupt) */
597	void HAL_SMBUS_EV_IRQHandler(SMBUS_HandleTypeDef *hsmbus);
598	void HAL_SMBUS_ER_IRQHandler(SMBUS_HandleTypeDef *hsmbus);
599	void HAL_SMBUS_MasterTxCpltCallback(SMBUS_HandleTypeDef *hsmbus);
600	void HAL_SMBUS_MasterRxCpltCallback(SMBUS_HandleTypeDef *hsmbus);
601	void HAL_SMBUS_SlaveTxCpltCallback(SMBUS_HandleTypeDef *hsmbus);
602	void HAL_SMBUS_SlaveRxCpltCallback(SMBUS_HandleTypeDef *hsmbus);
603	void HAL_SMBUS_AddrCallback(SMBUS_HandleTypeDef *hsmbus, uint8_t TransferDirection, uint16_t AddrMatchCode);
604	void HAL_SMBUS_ListenCpltCallback(SMBUS_HandleTypeDef *hsmbus);
605	void HAL_SMBUS_ErrorCallback(SMBUS_HandleTypeDef *hsmbus);
606	void HAL_SMBUS_AbortCpltCallback(SMBUS_HandleTypeDef *hsmbus);
607
608	/**
609	* @}
610	*/
611
612	/** @addtogroup SMBUS_Exported_Functions_Group3 Peripheral State, Mode and Error functions
613	* @{
614	*/
615
616	/* Peripheral State, mode and Errors functions **************************************************/
617	HAL_SMBUS_StateTypeDef HAL_SMBUS_GetState(SMBUS_HandleTypeDef *hsmbus);
618	HAL_SMBUS_ModeTypeDef HAL_SMBUS_GetMode(SMBUS_HandleTypeDef *hsmbus);
619	uint32_t HAL_SMBUS_GetError(SMBUS_HandleTypeDef *hsmbus);
620
621	/**
622	* @}
623	*/
624
625	/**
626	* @}
627	*/
628	/* Private types -------------------------------------------------------------*/
629	/* Private variables ---------------------------------------------------------*/
630	/* Private constants ---------------------------------------------------------*/
631	/** @defgroup SMBUS_Private_Constants SMBUS Private Constants
632	* @{
633	*/
634	#define SMBUS_FLAG_MASK 0x0000FFFFU
635	/**
636	* @}
637	*/
638
639	/* Private macros ------------------------------------------------------------*/
640	/** @defgroup SMBUS_Private_Macros SMBUS Private Macros
641	* @{
642	*/
643
644	#define SMBUS_FREQRANGE(__PCLK__) ((__PCLK__)/1000000U)
645
646	#define SMBUS_RISE_TIME(__FREQRANGE__) ( ((__FREQRANGE__) + 1U))
647
648	#define SMBUS_SPEED_STANDARD(__PCLK__, __SPEED__) (((((__PCLK__)/((__SPEED__) << 1U)) & I2C_CCR_CCR) < 4U)? 4U:((__PCLK__) / ((__SPEED__) << 1U)))
649
650	#define SMBUS_7BIT_ADD_WRITE(__ADDRESS__) ((uint8_t)((__ADDRESS__) & (~I2C_OAR1_ADD0)))
651
652	#define SMBUS_7BIT_ADD_READ(__ADDRESS__) ((uint8_t)((__ADDRESS__) \| I2C_OAR1_ADD0))
653
654	#define SMBUS_10BIT_ADDRESS(__ADDRESS__) ((uint8_t)((uint16_t)((__ADDRESS__) & (uint16_t)0x00FF)))
655
656	#define SMBUS_10BIT_HEADER_WRITE(__ADDRESS__) ((uint8_t)((uint16_t)((uint16_t)(((uint16_t)((__ADDRESS__) & (uint16_t)0x0300)) >> 7) \| (uint16_t)0x00F0)))
657
658	#define SMBUS_10BIT_HEADER_READ(__ADDRESS__) ((uint8_t)((uint16_t)((uint16_t)(((uint16_t)((__ADDRESS__) & (uint16_t)0x0300)) >> 7) \| (uint16_t)(0x00F1))))
659
660	#define SMBUS_GET_PEC_MODE(__HANDLE__) ((__HANDLE__)->Instance->CR1 & I2C_CR1_ENPEC)
661
662	#define SMBUS_GET_PEC_VALUE(__HANDLE__) ((__HANDLE__)->XferPEC)
663
664	#if defined(I2C_FLTR_ANOFF)&&defined(I2C_FLTR_DNF)
665	#define IS_SMBUS_ANALOG_FILTER(FILTER) (((FILTER) == SMBUS_ANALOGFILTER_ENABLE) \|\| \
666	((FILTER) == SMBUS_ANALOGFILTER_DISABLE))
667	#define IS_SMBUS_DIGITAL_FILTER(FILTER) ((FILTER) <= 0x0000000FU)
668	#endif
669	#define IS_SMBUS_ADDRESSING_MODE(ADDRESS) (((ADDRESS) == SMBUS_ADDRESSINGMODE_7BIT) \|\| \
670	((ADDRESS) == SMBUS_ADDRESSINGMODE_10BIT))
671
672	#define IS_SMBUS_DUAL_ADDRESS(ADDRESS) (((ADDRESS) == SMBUS_DUALADDRESS_DISABLE) \|\| \
673	((ADDRESS) == SMBUS_DUALADDRESS_ENABLE))
674
675	#define IS_SMBUS_GENERAL_CALL(CALL) (((CALL) == SMBUS_GENERALCALL_DISABLE) \|\| \
676	((CALL) == SMBUS_GENERALCALL_ENABLE))
677
678	#define IS_SMBUS_NO_STRETCH(STRETCH) (((STRETCH) == SMBUS_NOSTRETCH_DISABLE) \|\| \
679	((STRETCH) == SMBUS_NOSTRETCH_ENABLE))
680
681	#define IS_SMBUS_PEC(PEC) (((PEC) == SMBUS_PEC_DISABLE) \|\| \
682	((PEC) == SMBUS_PEC_ENABLE))
683
684	#define IS_SMBUS_PERIPHERAL_MODE(MODE) (((MODE) == SMBUS_PERIPHERAL_MODE_SMBUS_HOST) \|\| \
685	((MODE) == SMBUS_PERIPHERAL_MODE_SMBUS_SLAVE) \|\| \
686	((MODE) == SMBUS_PERIPHERAL_MODE_SMBUS_SLAVE_ARP))
687
688	#define IS_SMBUS_CLOCK_SPEED(SPEED) (((SPEED) > 0U) && ((SPEED) <= 100000U))
689
690	#define IS_SMBUS_OWN_ADDRESS1(ADDRESS1) (((ADDRESS1) & 0xFFFFFC00U) == 0U)
691
692	#define IS_SMBUS_OWN_ADDRESS2(ADDRESS2) (((ADDRESS2) & 0xFFFFFF01U) == 0U)
693
694	#define IS_SMBUS_TRANSFER_OPTIONS_REQUEST(REQUEST) (((REQUEST) == SMBUS_FIRST_FRAME) \|\| \
695	((REQUEST) == SMBUS_NEXT_FRAME) \|\| \
696	((REQUEST) == SMBUS_FIRST_AND_LAST_FRAME_NO_PEC) \|\| \
697	((REQUEST) == SMBUS_LAST_FRAME_NO_PEC) \|\| \
698	((REQUEST) == SMBUS_FIRST_AND_LAST_FRAME_WITH_PEC) \|\| \
699	((REQUEST) == SMBUS_LAST_FRAME_WITH_PEC))
700
701	/**
702	* @}
703	*/
704
705	/* Private Functions ---------------------------------------------------------*/
706	/** @defgroup SMBUS_Private_Functions SMBUS Private Functions
707	* @{
708	*/
709
710	/**
711	* @}
712	*/
713
714	/**
715	* @}
716	*/
717
718	/**
719	* @}
720	*/
721
722	/**
723	* @}
724	*/
725
726	#ifdef __cplusplus
727	}
728	#endif
729
730
731	#endif /* __STM32F4xx_HAL_SMBUS_H */
732
733	/********************** (C) COPYRIGHT STMicroelectronics *END OF FILE**/

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source: S-port/trunk/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_smbus.h

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