source: S-port/trunk/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_lptim.h

Last change on this file was 1, checked in by AlexLir, 4 years ago
File size: 51.3 KB
Line 
1/**
2 ******************************************************************************
3 * @file stm32f4xx_ll_lptim.h
4 * @author MCD Application Team
5 * @brief Header file of LPTIM LL module.
6 ******************************************************************************
7 * @attention
8 *
9 * <h2><center>&copy; Copyright (c) 2016 STMicroelectronics.
10 * All rights reserved.</center></h2>
11 *
12 * This software component is licensed by ST under BSD 3-Clause license,
13 * the "License"; You may not use this file except in compliance with the
14 * License. You may obtain a copy of the License at:
15 * opensource.org/licenses/BSD-3-Clause
16 *
17 ******************************************************************************
18 */
19
20/* Define to prevent recursive inclusion -------------------------------------*/
21#ifndef STM32F4xx_LL_LPTIM_H
22#define STM32F4xx_LL_LPTIM_H
23
24#ifdef __cplusplus
25extern "C" {
26#endif
27
28/* Includes ------------------------------------------------------------------*/
29#include "stm32f4xx.h"
30
31/** @addtogroup STM32F4xx_LL_Driver
32 * @{
33 */
34
35#if defined (LPTIM1)
36
37/** @defgroup LPTIM_LL LPTIM
38 * @{
39 */
40
41/* Private types -------------------------------------------------------------*/
42/* Private variables ---------------------------------------------------------*/
43
44/* Private constants ---------------------------------------------------------*/
45
46/* Private macros ------------------------------------------------------------*/
47#if defined(USE_FULL_LL_DRIVER)
48/** @defgroup LPTIM_LL_Private_Macros LPTIM Private Macros
49 * @{
50 */
51/**
52 * @}
53 */
54#endif /*USE_FULL_LL_DRIVER*/
55
56/* Exported types ------------------------------------------------------------*/
57#if defined(USE_FULL_LL_DRIVER)
58/** @defgroup LPTIM_LL_ES_INIT LPTIM Exported Init structure
59 * @{
60 */
61
62/**
63 * @brief LPTIM Init structure definition
64 */
65typedef struct
66{
67 uint32_t ClockSource; /*!< Specifies the source of the clock used by the LPTIM instance.
68 This parameter can be a value of @ref LPTIM_LL_EC_CLK_SOURCE.
69
70 This feature can be modified afterwards using unitary function @ref LL_LPTIM_SetClockSource().*/
71
72 uint32_t Prescaler; /*!< Specifies the prescaler division ratio.
73 This parameter can be a value of @ref LPTIM_LL_EC_PRESCALER.
74
75 This feature can be modified afterwards using using unitary function @ref LL_LPTIM_SetPrescaler().*/
76
77 uint32_t Waveform; /*!< Specifies the waveform shape.
78 This parameter can be a value of @ref LPTIM_LL_EC_OUTPUT_WAVEFORM.
79
80 This feature can be modified afterwards using unitary function @ref LL_LPTIM_ConfigOutput().*/
81
82 uint32_t Polarity; /*!< Specifies waveform polarity.
83 This parameter can be a value of @ref LPTIM_LL_EC_OUTPUT_POLARITY.
84
85 This feature can be modified afterwards using unitary function @ref LL_LPTIM_ConfigOutput().*/
86} LL_LPTIM_InitTypeDef;
87
88/**
89 * @}
90 */
91#endif /* USE_FULL_LL_DRIVER */
92
93/* Exported constants --------------------------------------------------------*/
94/** @defgroup LPTIM_LL_Exported_Constants LPTIM Exported Constants
95 * @{
96 */
97
98/** @defgroup LPTIM_LL_EC_GET_FLAG Get Flags Defines
99 * @brief Flags defines which can be used with LL_LPTIM_ReadReg function
100 * @{
101 */
102#define LL_LPTIM_ISR_CMPM LPTIM_ISR_CMPM /*!< Compare match */
103#define LL_LPTIM_ISR_ARRM LPTIM_ISR_ARRM /*!< Autoreload match */
104#define LL_LPTIM_ISR_EXTTRIG LPTIM_ISR_EXTTRIG /*!< External trigger edge event */
105#define LL_LPTIM_ISR_CMPOK LPTIM_ISR_CMPOK /*!< Compare register update OK */
106#define LL_LPTIM_ISR_ARROK LPTIM_ISR_ARROK /*!< Autoreload register update OK */
107#define LL_LPTIM_ISR_UP LPTIM_ISR_UP /*!< Counter direction change down to up */
108#define LL_LPTIM_ISR_DOWN LPTIM_ISR_DOWN /*!< Counter direction change up to down */
109/**
110 * @}
111 */
112
113/** @defgroup LPTIM_LL_EC_IT IT Defines
114 * @brief IT defines which can be used with LL_LPTIM_ReadReg and LL_LPTIM_WriteReg functions
115 * @{
116 */
117#define LL_LPTIM_IER_CMPMIE LPTIM_IER_CMPMIE /*!< Compare match Interrupt Enable */
118#define LL_LPTIM_IER_ARRMIE LPTIM_IER_ARRMIE /*!< Autoreload match Interrupt Enable */
119#define LL_LPTIM_IER_EXTTRIGIE LPTIM_IER_EXTTRIGIE /*!< External trigger valid edge Interrupt Enable */
120#define LL_LPTIM_IER_CMPOKIE LPTIM_IER_CMPOKIE /*!< Compare register update OK Interrupt Enable */
121#define LL_LPTIM_IER_ARROKIE LPTIM_IER_ARROKIE /*!< Autoreload register update OK Interrupt Enable */
122#define LL_LPTIM_IER_UPIE LPTIM_IER_UPIE /*!< Direction change to UP Interrupt Enable */
123#define LL_LPTIM_IER_DOWNIE LPTIM_IER_DOWNIE /*!< Direction change to down Interrupt Enable */
124/**
125 * @}
126 */
127
128/** @defgroup LPTIM_LL_EC_OPERATING_MODE Operating Mode
129 * @{
130 */
131#define LL_LPTIM_OPERATING_MODE_CONTINUOUS LPTIM_CR_CNTSTRT /*!<LP Timer starts in continuous mode*/
132#define LL_LPTIM_OPERATING_MODE_ONESHOT LPTIM_CR_SNGSTRT /*!<LP Tilmer starts in single mode*/
133/**
134 * @}
135 */
136
137/** @defgroup LPTIM_LL_EC_UPDATE_MODE Update Mode
138 * @{
139 */
140#define LL_LPTIM_UPDATE_MODE_IMMEDIATE 0x00000000U /*!<Preload is disabled: registers are updated after each APB bus write access*/
141#define LL_LPTIM_UPDATE_MODE_ENDOFPERIOD LPTIM_CFGR_PRELOAD /*!<preload is enabled: registers are updated at the end of the current LPTIM period*/
142/**
143 * @}
144 */
145
146/** @defgroup LPTIM_LL_EC_COUNTER_MODE Counter Mode
147 * @{
148 */
149#define LL_LPTIM_COUNTER_MODE_INTERNAL 0x00000000U /*!<The counter is incremented following each internal clock pulse*/
150#define LL_LPTIM_COUNTER_MODE_EXTERNAL LPTIM_CFGR_COUNTMODE /*!<The counter is incremented following each valid clock pulse on the LPTIM external Input1*/
151/**
152 * @}
153 */
154
155/** @defgroup LPTIM_LL_EC_OUTPUT_WAVEFORM Output Waveform Type
156 * @{
157 */
158#define LL_LPTIM_OUTPUT_WAVEFORM_PWM 0x00000000U /*!<LPTIM generates either a PWM waveform or a One pulse waveform depending on chosen operating mode CONTINUOUS or SINGLE*/
159#define LL_LPTIM_OUTPUT_WAVEFORM_SETONCE LPTIM_CFGR_WAVE /*!<LPTIM generates a Set Once waveform*/
160/**
161 * @}
162 */
163
164/** @defgroup LPTIM_LL_EC_OUTPUT_POLARITY Output Polarity
165 * @{
166 */
167#define LL_LPTIM_OUTPUT_POLARITY_REGULAR 0x00000000U /*!<The LPTIM output reflects the compare results between LPTIMx_ARR and LPTIMx_CMP registers*/
168#define LL_LPTIM_OUTPUT_POLARITY_INVERSE LPTIM_CFGR_WAVPOL /*!<The LPTIM output reflects the inverse of the compare results between LPTIMx_ARR and LPTIMx_CMP registers*/
169/**
170 * @}
171 */
172
173/** @defgroup LPTIM_LL_EC_PRESCALER Prescaler Value
174 * @{
175 */
176#define LL_LPTIM_PRESCALER_DIV1 0x00000000U /*!<Prescaler division factor is set to 1*/
177#define LL_LPTIM_PRESCALER_DIV2 LPTIM_CFGR_PRESC_0 /*!<Prescaler division factor is set to 2*/
178#define LL_LPTIM_PRESCALER_DIV4 LPTIM_CFGR_PRESC_1 /*!<Prescaler division factor is set to 4*/
179#define LL_LPTIM_PRESCALER_DIV8 (LPTIM_CFGR_PRESC_1 | LPTIM_CFGR_PRESC_0) /*!<Prescaler division factor is set to 8*/
180#define LL_LPTIM_PRESCALER_DIV16 LPTIM_CFGR_PRESC_2 /*!<Prescaler division factor is set to 16*/
181#define LL_LPTIM_PRESCALER_DIV32 (LPTIM_CFGR_PRESC_2 | LPTIM_CFGR_PRESC_0) /*!<Prescaler division factor is set to 32*/
182#define LL_LPTIM_PRESCALER_DIV64 (LPTIM_CFGR_PRESC_2 | LPTIM_CFGR_PRESC_1) /*!<Prescaler division factor is set to 64*/
183#define LL_LPTIM_PRESCALER_DIV128 LPTIM_CFGR_PRESC /*!<Prescaler division factor is set to 128*/
184/**
185 * @}
186 */
187
188/** @defgroup LPTIM_LL_EC_TRIG_SOURCE Trigger Source
189 * @{
190 */
191#define LL_LPTIM_TRIG_SOURCE_GPIO 0x00000000U /*!<External input trigger is connected to TIMx_ETR input*/
192#define LL_LPTIM_TRIG_SOURCE_RTCALARMA LPTIM_CFGR_TRIGSEL_0 /*!<External input trigger is connected to RTC Alarm A*/
193#define LL_LPTIM_TRIG_SOURCE_RTCALARMB LPTIM_CFGR_TRIGSEL_1 /*!<External input trigger is connected to RTC Alarm B*/
194#define LL_LPTIM_TRIG_SOURCE_RTCTAMP1 (LPTIM_CFGR_TRIGSEL_1 | LPTIM_CFGR_TRIGSEL_0) /*!<External input trigger is connected to RTC Tamper 1*/
195#define LL_LPTIM_TRIG_SOURCE_TIM1_TRGO LPTIM_CFGR_TRIGSEL_2 /*!<External input trigger is connected to TIM1*/
196#define LL_LPTIM_TRIG_SOURCE_TIM5_TRGO (LPTIM_CFGR_TRIGSEL_2 | LPTIM_CFGR_TRIGSEL_0) /*!<External input trigger is connected to TIM5*/
197/**
198 * @}
199 */
200
201/** @defgroup LPTIM_LL_EC_TRIG_FILTER Trigger Filter
202 * @{
203 */
204#define LL_LPTIM_TRIG_FILTER_NONE 0x00000000U /*!<Any trigger active level change is considered as a valid trigger*/
205#define LL_LPTIM_TRIG_FILTER_2 LPTIM_CFGR_TRGFLT_0 /*!<Trigger active level change must be stable for at least 2 clock periods before it is considered as valid trigger*/
206#define LL_LPTIM_TRIG_FILTER_4 LPTIM_CFGR_TRGFLT_1 /*!<Trigger active level change must be stable for at least 4 clock periods before it is considered as valid trigger*/
207#define LL_LPTIM_TRIG_FILTER_8 LPTIM_CFGR_TRGFLT /*!<Trigger active level change must be stable for at least 8 clock periods before it is considered as valid trigger*/
208/**
209 * @}
210 */
211
212/** @defgroup LPTIM_LL_EC_TRIG_POLARITY Trigger Polarity
213 * @{
214 */
215#define LL_LPTIM_TRIG_POLARITY_RISING LPTIM_CFGR_TRIGEN_0 /*!<LPTIM counter starts when a rising edge is detected*/
216#define LL_LPTIM_TRIG_POLARITY_FALLING LPTIM_CFGR_TRIGEN_1 /*!<LPTIM counter starts when a falling edge is detected*/
217#define LL_LPTIM_TRIG_POLARITY_RISING_FALLING LPTIM_CFGR_TRIGEN /*!<LPTIM counter starts when a rising or a falling edge is detected*/
218/**
219 * @}
220 */
221
222/** @defgroup LPTIM_LL_EC_CLK_SOURCE Clock Source
223 * @{
224 */
225#define LL_LPTIM_CLK_SOURCE_INTERNAL 0x00000000U /*!<LPTIM is clocked by internal clock source (APB clock or any of the embedded oscillators)*/
226#define LL_LPTIM_CLK_SOURCE_EXTERNAL LPTIM_CFGR_CKSEL /*!<LPTIM is clocked by an external clock source through the LPTIM external Input1*/
227/**
228 * @}
229 */
230
231/** @defgroup LPTIM_LL_EC_CLK_FILTER Clock Filter
232 * @{
233 */
234#define LL_LPTIM_CLK_FILTER_NONE 0x00000000U /*!<Any external clock signal level change is considered as a valid transition*/
235#define LL_LPTIM_CLK_FILTER_2 LPTIM_CFGR_CKFLT_0 /*!<External clock signal level change must be stable for at least 2 clock periods before it is considered as valid transition*/
236#define LL_LPTIM_CLK_FILTER_4 LPTIM_CFGR_CKFLT_1 /*!<External clock signal level change must be stable for at least 4 clock periods before it is considered as valid transition*/
237#define LL_LPTIM_CLK_FILTER_8 LPTIM_CFGR_CKFLT /*!<External clock signal level change must be stable for at least 8 clock periods before it is considered as valid transition*/
238/**
239 * @}
240 */
241
242/** @defgroup LPTIM_LL_EC_CLK_POLARITY Clock Polarity
243 * @{
244 */
245#define LL_LPTIM_CLK_POLARITY_RISING 0x00000000U /*!< The rising edge is the active edge used for counting*/
246#define LL_LPTIM_CLK_POLARITY_FALLING LPTIM_CFGR_CKPOL_0 /*!< The falling edge is the active edge used for counting*/
247#define LL_LPTIM_CLK_POLARITY_RISING_FALLING LPTIM_CFGR_CKPOL_1 /*!< Both edges are active edges*/
248/**
249 * @}
250 */
251
252/** @defgroup LPTIM_LL_EC_ENCODER_MODE Encoder Mode
253 * @{
254 */
255#define LL_LPTIM_ENCODER_MODE_RISING 0x00000000U /*!< The rising edge is the active edge used for counting*/
256#define LL_LPTIM_ENCODER_MODE_FALLING LPTIM_CFGR_CKPOL_0 /*!< The falling edge is the active edge used for counting*/
257#define LL_LPTIM_ENCODER_MODE_RISING_FALLING LPTIM_CFGR_CKPOL_1 /*!< Both edges are active edges*/
258/**
259 * @}
260 */
261
262/** @defgroup LPTIM_EC_INPUT1_SRC Input1 Source
263 * @{
264 */
265#define LL_LPTIM_INPUT1_SRC_PAD_AF 0x00000000U
266#define LL_LPTIM_INPUT1_SRC_PAD_PA4 LPTIM_OR_OR_0
267#define LL_LPTIM_INPUT1_SRC_PAD_PB9 LPTIM_OR_OR_1
268#define LL_LPTIM_INPUT1_SRC_TIM_DAC LPTIM_OR_OR
269/**
270 * @}
271 */
272
273/**
274 * @}
275 */
276
277/* Exported macro ------------------------------------------------------------*/
278/** @defgroup LPTIM_LL_Exported_Macros LPTIM Exported Macros
279 * @{
280 */
281
282/** @defgroup LPTIM_LL_EM_WRITE_READ Common Write and read registers Macros
283 * @{
284 */
285
286/**
287 * @brief Write a value in LPTIM register
288 * @param __INSTANCE__ LPTIM Instance
289 * @param __REG__ Register to be written
290 * @param __VALUE__ Value to be written in the register
291 * @retval None
292 */
293#define LL_LPTIM_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG((__INSTANCE__)->__REG__, (__VALUE__))
294
295/**
296 * @brief Read a value in LPTIM register
297 * @param __INSTANCE__ LPTIM Instance
298 * @param __REG__ Register to be read
299 * @retval Register value
300 */
301#define LL_LPTIM_ReadReg(__INSTANCE__, __REG__) READ_REG((__INSTANCE__)->__REG__)
302/**
303 * @}
304 */
305
306/**
307 * @}
308 */
309
310/* Exported functions --------------------------------------------------------*/
311/** @defgroup LPTIM_LL_Exported_Functions LPTIM Exported Functions
312 * @{
313 */
314
315#if defined(USE_FULL_LL_DRIVER)
316/** @defgroup LPTIM_LL_EF_Init Initialisation and deinitialisation functions
317 * @{
318 */
319
320ErrorStatus LL_LPTIM_DeInit(LPTIM_TypeDef *LPTIMx);
321void LL_LPTIM_StructInit(LL_LPTIM_InitTypeDef *LPTIM_InitStruct);
322ErrorStatus LL_LPTIM_Init(LPTIM_TypeDef *LPTIMx, LL_LPTIM_InitTypeDef *LPTIM_InitStruct);
323void LL_LPTIM_Disable(LPTIM_TypeDef *LPTIMx);
324/**
325 * @}
326 */
327#endif /* USE_FULL_LL_DRIVER */
328
329/** @defgroup LPTIM_LL_EF_LPTIM_Configuration LPTIM Configuration
330 * @{
331 */
332
333/**
334 * @brief Enable the LPTIM instance
335 * @note After setting the ENABLE bit, a delay of two counter clock is needed
336 * before the LPTIM instance is actually enabled.
337 * @rmtoll CR ENABLE LL_LPTIM_Enable
338 * @param LPTIMx Low-Power Timer instance
339 * @retval None
340 */
341__STATIC_INLINE void LL_LPTIM_Enable(LPTIM_TypeDef *LPTIMx)
342{
343 SET_BIT(LPTIMx->CR, LPTIM_CR_ENABLE);
344}
345
346/**
347 * @brief Indicates whether the LPTIM instance is enabled.
348 * @rmtoll CR ENABLE LL_LPTIM_IsEnabled
349 * @param LPTIMx Low-Power Timer instance
350 * @retval State of bit (1 or 0).
351 */
352__STATIC_INLINE uint32_t LL_LPTIM_IsEnabled(LPTIM_TypeDef *LPTIMx)
353{
354 return (((READ_BIT(LPTIMx->CR, LPTIM_CR_ENABLE) == LPTIM_CR_ENABLE) ? 1UL : 0UL));
355}
356
357/**
358 * @brief Starts the LPTIM counter in the desired mode.
359 * @note LPTIM instance must be enabled before starting the counter.
360 * @note It is possible to change on the fly from One Shot mode to
361 * Continuous mode.
362 * @rmtoll CR CNTSTRT LL_LPTIM_StartCounter\n
363 * CR SNGSTRT LL_LPTIM_StartCounter
364 * @param LPTIMx Low-Power Timer instance
365 * @param OperatingMode This parameter can be one of the following values:
366 * @arg @ref LL_LPTIM_OPERATING_MODE_CONTINUOUS
367 * @arg @ref LL_LPTIM_OPERATING_MODE_ONESHOT
368 * @retval None
369 */
370__STATIC_INLINE void LL_LPTIM_StartCounter(LPTIM_TypeDef *LPTIMx, uint32_t OperatingMode)
371{
372 MODIFY_REG(LPTIMx->CR, LPTIM_CR_CNTSTRT | LPTIM_CR_SNGSTRT, OperatingMode);
373}
374
375/**
376 * @brief Set the LPTIM registers update mode (enable/disable register preload)
377 * @note This function must be called when the LPTIM instance is disabled.
378 * @rmtoll CFGR PRELOAD LL_LPTIM_SetUpdateMode
379 * @param LPTIMx Low-Power Timer instance
380 * @param UpdateMode This parameter can be one of the following values:
381 * @arg @ref LL_LPTIM_UPDATE_MODE_IMMEDIATE
382 * @arg @ref LL_LPTIM_UPDATE_MODE_ENDOFPERIOD
383 * @retval None
384 */
385__STATIC_INLINE void LL_LPTIM_SetUpdateMode(LPTIM_TypeDef *LPTIMx, uint32_t UpdateMode)
386{
387 MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_PRELOAD, UpdateMode);
388}
389
390/**
391 * @brief Get the LPTIM registers update mode
392 * @rmtoll CFGR PRELOAD LL_LPTIM_GetUpdateMode
393 * @param LPTIMx Low-Power Timer instance
394 * @retval Returned value can be one of the following values:
395 * @arg @ref LL_LPTIM_UPDATE_MODE_IMMEDIATE
396 * @arg @ref LL_LPTIM_UPDATE_MODE_ENDOFPERIOD
397 */
398__STATIC_INLINE uint32_t LL_LPTIM_GetUpdateMode(LPTIM_TypeDef *LPTIMx)
399{
400 return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_PRELOAD));
401}
402
403/**
404 * @brief Set the auto reload value
405 * @note The LPTIMx_ARR register content must only be modified when the LPTIM is enabled
406 * @note After a write to the LPTIMx_ARR register a new write operation to the
407 * same register can only be performed when the previous write operation
408 * is completed. Any successive write before the ARROK flag is set, will
409 * lead to unpredictable results.
410 * @note autoreload value be strictly greater than the compare value.
411 * @rmtoll ARR ARR LL_LPTIM_SetAutoReload
412 * @param LPTIMx Low-Power Timer instance
413 * @param AutoReload Value between Min_Data=0x00 and Max_Data=0xFFFF
414 * @retval None
415 */
416__STATIC_INLINE void LL_LPTIM_SetAutoReload(LPTIM_TypeDef *LPTIMx, uint32_t AutoReload)
417{
418 MODIFY_REG(LPTIMx->ARR, LPTIM_ARR_ARR, AutoReload);
419}
420
421/**
422 * @brief Get actual auto reload value
423 * @rmtoll ARR ARR LL_LPTIM_GetAutoReload
424 * @param LPTIMx Low-Power Timer instance
425 * @retval AutoReload Value between Min_Data=0x00 and Max_Data=0xFFFF
426 */
427__STATIC_INLINE uint32_t LL_LPTIM_GetAutoReload(LPTIM_TypeDef *LPTIMx)
428{
429 return (uint32_t)(READ_BIT(LPTIMx->ARR, LPTIM_ARR_ARR));
430}
431
432/**
433 * @brief Set the compare value
434 * @note After a write to the LPTIMx_CMP register a new write operation to the
435 * same register can only be performed when the previous write operation
436 * is completed. Any successive write before the CMPOK flag is set, will
437 * lead to unpredictable results.
438 * @rmtoll CMP CMP LL_LPTIM_SetCompare
439 * @param LPTIMx Low-Power Timer instance
440 * @param CompareValue Value between Min_Data=0x00 and Max_Data=0xFFFF
441 * @retval None
442 */
443__STATIC_INLINE void LL_LPTIM_SetCompare(LPTIM_TypeDef *LPTIMx, uint32_t CompareValue)
444{
445 MODIFY_REG(LPTIMx->CMP, LPTIM_CMP_CMP, CompareValue);
446}
447
448/**
449 * @brief Get actual compare value
450 * @rmtoll CMP CMP LL_LPTIM_GetCompare
451 * @param LPTIMx Low-Power Timer instance
452 * @retval CompareValue Value between Min_Data=0x00 and Max_Data=0xFFFF
453 */
454__STATIC_INLINE uint32_t LL_LPTIM_GetCompare(LPTIM_TypeDef *LPTIMx)
455{
456 return (uint32_t)(READ_BIT(LPTIMx->CMP, LPTIM_CMP_CMP));
457}
458
459/**
460 * @brief Get actual counter value
461 * @note When the LPTIM instance is running with an asynchronous clock, reading
462 * the LPTIMx_CNT register may return unreliable values. So in this case
463 * it is necessary to perform two consecutive read accesses and verify
464 * that the two returned values are identical.
465 * @rmtoll CNT CNT LL_LPTIM_GetCounter
466 * @param LPTIMx Low-Power Timer instance
467 * @retval Counter value
468 */
469__STATIC_INLINE uint32_t LL_LPTIM_GetCounter(LPTIM_TypeDef *LPTIMx)
470{
471 return (uint32_t)(READ_BIT(LPTIMx->CNT, LPTIM_CNT_CNT));
472}
473
474/**
475 * @brief Set the counter mode (selection of the LPTIM counter clock source).
476 * @note The counter mode can be set only when the LPTIM instance is disabled.
477 * @rmtoll CFGR COUNTMODE LL_LPTIM_SetCounterMode
478 * @param LPTIMx Low-Power Timer instance
479 * @param CounterMode This parameter can be one of the following values:
480 * @arg @ref LL_LPTIM_COUNTER_MODE_INTERNAL
481 * @arg @ref LL_LPTIM_COUNTER_MODE_EXTERNAL
482 * @retval None
483 */
484__STATIC_INLINE void LL_LPTIM_SetCounterMode(LPTIM_TypeDef *LPTIMx, uint32_t CounterMode)
485{
486 MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_COUNTMODE, CounterMode);
487}
488
489/**
490 * @brief Get the counter mode
491 * @rmtoll CFGR COUNTMODE LL_LPTIM_GetCounterMode
492 * @param LPTIMx Low-Power Timer instance
493 * @retval Returned value can be one of the following values:
494 * @arg @ref LL_LPTIM_COUNTER_MODE_INTERNAL
495 * @arg @ref LL_LPTIM_COUNTER_MODE_EXTERNAL
496 */
497__STATIC_INLINE uint32_t LL_LPTIM_GetCounterMode(LPTIM_TypeDef *LPTIMx)
498{
499 return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_COUNTMODE));
500}
501
502/**
503 * @brief Configure the LPTIM instance output (LPTIMx_OUT)
504 * @note This function must be called when the LPTIM instance is disabled.
505 * @note Regarding the LPTIM output polarity the change takes effect
506 * immediately, so the output default value will change immediately after
507 * the polarity is re-configured, even before the timer is enabled.
508 * @rmtoll CFGR WAVE LL_LPTIM_ConfigOutput\n
509 * CFGR WAVPOL LL_LPTIM_ConfigOutput
510 * @param LPTIMx Low-Power Timer instance
511 * @param Waveform This parameter can be one of the following values:
512 * @arg @ref LL_LPTIM_OUTPUT_WAVEFORM_PWM
513 * @arg @ref LL_LPTIM_OUTPUT_WAVEFORM_SETONCE
514 * @param Polarity This parameter can be one of the following values:
515 * @arg @ref LL_LPTIM_OUTPUT_POLARITY_REGULAR
516 * @arg @ref LL_LPTIM_OUTPUT_POLARITY_INVERSE
517 * @retval None
518 */
519__STATIC_INLINE void LL_LPTIM_ConfigOutput(LPTIM_TypeDef *LPTIMx, uint32_t Waveform, uint32_t Polarity)
520{
521 MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_WAVE | LPTIM_CFGR_WAVPOL, Waveform | Polarity);
522}
523
524/**
525 * @brief Set waveform shape
526 * @rmtoll CFGR WAVE LL_LPTIM_SetWaveform
527 * @param LPTIMx Low-Power Timer instance
528 * @param Waveform This parameter can be one of the following values:
529 * @arg @ref LL_LPTIM_OUTPUT_WAVEFORM_PWM
530 * @arg @ref LL_LPTIM_OUTPUT_WAVEFORM_SETONCE
531 * @retval None
532 */
533__STATIC_INLINE void LL_LPTIM_SetWaveform(LPTIM_TypeDef *LPTIMx, uint32_t Waveform)
534{
535 MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_WAVE, Waveform);
536}
537
538/**
539 * @brief Get actual waveform shape
540 * @rmtoll CFGR WAVE LL_LPTIM_GetWaveform
541 * @param LPTIMx Low-Power Timer instance
542 * @retval Returned value can be one of the following values:
543 * @arg @ref LL_LPTIM_OUTPUT_WAVEFORM_PWM
544 * @arg @ref LL_LPTIM_OUTPUT_WAVEFORM_SETONCE
545 */
546__STATIC_INLINE uint32_t LL_LPTIM_GetWaveform(LPTIM_TypeDef *LPTIMx)
547{
548 return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_WAVE));
549}
550
551/**
552 * @brief Set output polarity
553 * @rmtoll CFGR WAVPOL LL_LPTIM_SetPolarity
554 * @param LPTIMx Low-Power Timer instance
555 * @param Polarity This parameter can be one of the following values:
556 * @arg @ref LL_LPTIM_OUTPUT_POLARITY_REGULAR
557 * @arg @ref LL_LPTIM_OUTPUT_POLARITY_INVERSE
558 * @retval None
559 */
560__STATIC_INLINE void LL_LPTIM_SetPolarity(LPTIM_TypeDef *LPTIMx, uint32_t Polarity)
561{
562 MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_WAVPOL, Polarity);
563}
564
565/**
566 * @brief Get actual output polarity
567 * @rmtoll CFGR WAVPOL LL_LPTIM_GetPolarity
568 * @param LPTIMx Low-Power Timer instance
569 * @retval Returned value can be one of the following values:
570 * @arg @ref LL_LPTIM_OUTPUT_POLARITY_REGULAR
571 * @arg @ref LL_LPTIM_OUTPUT_POLARITY_INVERSE
572 */
573__STATIC_INLINE uint32_t LL_LPTIM_GetPolarity(LPTIM_TypeDef *LPTIMx)
574{
575 return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_WAVPOL));
576}
577
578/**
579 * @brief Set actual prescaler division ratio.
580 * @note This function must be called when the LPTIM instance is disabled.
581 * @note When the LPTIM is configured to be clocked by an internal clock source
582 * and the LPTIM counter is configured to be updated by active edges
583 * detected on the LPTIM external Input1, the internal clock provided to
584 * the LPTIM must be not be prescaled.
585 * @rmtoll CFGR PRESC LL_LPTIM_SetPrescaler
586 * @param LPTIMx Low-Power Timer instance
587 * @param Prescaler This parameter can be one of the following values:
588 * @arg @ref LL_LPTIM_PRESCALER_DIV1
589 * @arg @ref LL_LPTIM_PRESCALER_DIV2
590 * @arg @ref LL_LPTIM_PRESCALER_DIV4
591 * @arg @ref LL_LPTIM_PRESCALER_DIV8
592 * @arg @ref LL_LPTIM_PRESCALER_DIV16
593 * @arg @ref LL_LPTIM_PRESCALER_DIV32
594 * @arg @ref LL_LPTIM_PRESCALER_DIV64
595 * @arg @ref LL_LPTIM_PRESCALER_DIV128
596 * @retval None
597 */
598__STATIC_INLINE void LL_LPTIM_SetPrescaler(LPTIM_TypeDef *LPTIMx, uint32_t Prescaler)
599{
600 MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_PRESC, Prescaler);
601}
602
603/**
604 * @brief Get actual prescaler division ratio.
605 * @rmtoll CFGR PRESC LL_LPTIM_GetPrescaler
606 * @param LPTIMx Low-Power Timer instance
607 * @retval Returned value can be one of the following values:
608 * @arg @ref LL_LPTIM_PRESCALER_DIV1
609 * @arg @ref LL_LPTIM_PRESCALER_DIV2
610 * @arg @ref LL_LPTIM_PRESCALER_DIV4
611 * @arg @ref LL_LPTIM_PRESCALER_DIV8
612 * @arg @ref LL_LPTIM_PRESCALER_DIV16
613 * @arg @ref LL_LPTIM_PRESCALER_DIV32
614 * @arg @ref LL_LPTIM_PRESCALER_DIV64
615 * @arg @ref LL_LPTIM_PRESCALER_DIV128
616 */
617__STATIC_INLINE uint32_t LL_LPTIM_GetPrescaler(LPTIM_TypeDef *LPTIMx)
618{
619 return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_PRESC));
620}
621
622/**
623 * @brief Set LPTIM input 1 source (default GPIO).
624 * @rmtoll OR OR LL_LPTIM_SetInput1Src
625 * @param LPTIMx Low-Power Timer instance
626 * @param Src This parameter can be one of the following values:
627 * @arg @ref LL_LPTIM_INPUT1_SRC_PAD_AF
628 * @arg @ref LL_LPTIM_INPUT1_SRC_PAD_PA4
629 * @arg @ref LL_LPTIM_INPUT1_SRC_PAD_PB9
630 * @arg @ref LL_LPTIM_INPUT1_SRC_TIM_DAC
631 * @retval None
632 */
633__STATIC_INLINE void LL_LPTIM_SetInput1Src(LPTIM_TypeDef *LPTIMx, uint32_t Src)
634{
635 MODIFY_REG(LPTIMx->OR, LPTIM_OR_OR, Src);
636}
637
638/**
639 * @}
640 */
641
642/** @defgroup LPTIM_LL_EF_Trigger_Configuration Trigger Configuration
643 * @{
644 */
645
646/**
647 * @brief Enable the timeout function
648 * @note This function must be called when the LPTIM instance is disabled.
649 * @note The first trigger event will start the timer, any successive trigger
650 * event will reset the counter and the timer will restart.
651 * @note The timeout value corresponds to the compare value; if no trigger
652 * occurs within the expected time frame, the MCU is waked-up by the
653 * compare match event.
654 * @rmtoll CFGR TIMOUT LL_LPTIM_EnableTimeout
655 * @param LPTIMx Low-Power Timer instance
656 * @retval None
657 */
658__STATIC_INLINE void LL_LPTIM_EnableTimeout(LPTIM_TypeDef *LPTIMx)
659{
660 SET_BIT(LPTIMx->CFGR, LPTIM_CFGR_TIMOUT);
661}
662
663/**
664 * @brief Disable the timeout function
665 * @note This function must be called when the LPTIM instance is disabled.
666 * @note A trigger event arriving when the timer is already started will be
667 * ignored.
668 * @rmtoll CFGR TIMOUT LL_LPTIM_DisableTimeout
669 * @param LPTIMx Low-Power Timer instance
670 * @retval None
671 */
672__STATIC_INLINE void LL_LPTIM_DisableTimeout(LPTIM_TypeDef *LPTIMx)
673{
674 CLEAR_BIT(LPTIMx->CFGR, LPTIM_CFGR_TIMOUT);
675}
676
677/**
678 * @brief Indicate whether the timeout function is enabled.
679 * @rmtoll CFGR TIMOUT LL_LPTIM_IsEnabledTimeout
680 * @param LPTIMx Low-Power Timer instance
681 * @retval State of bit (1 or 0).
682 */
683__STATIC_INLINE uint32_t LL_LPTIM_IsEnabledTimeout(LPTIM_TypeDef *LPTIMx)
684{
685 return (((READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_TIMOUT) == LPTIM_CFGR_TIMOUT) ? 1UL : 0UL));
686}
687
688/**
689 * @brief Start the LPTIM counter
690 * @note This function must be called when the LPTIM instance is disabled.
691 * @rmtoll CFGR TRIGEN LL_LPTIM_TrigSw
692 * @param LPTIMx Low-Power Timer instance
693 * @retval None
694 */
695__STATIC_INLINE void LL_LPTIM_TrigSw(LPTIM_TypeDef *LPTIMx)
696{
697 CLEAR_BIT(LPTIMx->CFGR, LPTIM_CFGR_TRIGEN);
698}
699
700/**
701 * @brief Configure the external trigger used as a trigger event for the LPTIM.
702 * @note This function must be called when the LPTIM instance is disabled.
703 * @note An internal clock source must be present when a digital filter is
704 * required for the trigger.
705 * @rmtoll CFGR TRIGSEL LL_LPTIM_ConfigTrigger\n
706 * CFGR TRGFLT LL_LPTIM_ConfigTrigger\n
707 * CFGR TRIGEN LL_LPTIM_ConfigTrigger
708 * @param LPTIMx Low-Power Timer instance
709 * @param Source This parameter can be one of the following values:
710 * @arg @ref LL_LPTIM_TRIG_SOURCE_GPIO
711 * @arg @ref LL_LPTIM_TRIG_SOURCE_RTCALARMA
712 * @arg @ref LL_LPTIM_TRIG_SOURCE_RTCALARMB
713 * @arg @ref LL_LPTIM_TRIG_SOURCE_RTCTAMP1
714 * @arg @ref LL_LPTIM_TRIG_SOURCE_TIM1_TRGO
715 * @arg @ref LL_LPTIM_TRIG_SOURCE_TIM5_TRGO
716 * @param Filter This parameter can be one of the following values:
717 * @arg @ref LL_LPTIM_TRIG_FILTER_NONE
718 * @arg @ref LL_LPTIM_TRIG_FILTER_2
719 * @arg @ref LL_LPTIM_TRIG_FILTER_4
720 * @arg @ref LL_LPTIM_TRIG_FILTER_8
721 * @param Polarity This parameter can be one of the following values:
722 * @arg @ref LL_LPTIM_TRIG_POLARITY_RISING
723 * @arg @ref LL_LPTIM_TRIG_POLARITY_FALLING
724 * @arg @ref LL_LPTIM_TRIG_POLARITY_RISING_FALLING
725 * @retval None
726 */
727__STATIC_INLINE void LL_LPTIM_ConfigTrigger(LPTIM_TypeDef *LPTIMx, uint32_t Source, uint32_t Filter, uint32_t Polarity)
728{
729 MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_TRIGSEL | LPTIM_CFGR_TRGFLT | LPTIM_CFGR_TRIGEN, Source | Filter | Polarity);
730}
731
732/**
733 * @brief Get actual external trigger source.
734 * @rmtoll CFGR TRIGSEL LL_LPTIM_GetTriggerSource
735 * @param LPTIMx Low-Power Timer instance
736 * @retval Returned value can be one of the following values:
737 * @arg @ref LL_LPTIM_TRIG_SOURCE_GPIO
738 * @arg @ref LL_LPTIM_TRIG_SOURCE_RTCALARMA
739 * @arg @ref LL_LPTIM_TRIG_SOURCE_RTCALARMB
740 * @arg @ref LL_LPTIM_TRIG_SOURCE_RTCTAMP1
741 * @arg @ref LL_LPTIM_TRIG_SOURCE_TIM1_TRGO
742 * @arg @ref LL_LPTIM_TRIG_SOURCE_TIM5_TRGO
743 */
744__STATIC_INLINE uint32_t LL_LPTIM_GetTriggerSource(LPTIM_TypeDef *LPTIMx)
745{
746 return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_TRIGSEL));
747}
748
749/**
750 * @brief Get actual external trigger filter.
751 * @rmtoll CFGR TRGFLT LL_LPTIM_GetTriggerFilter
752 * @param LPTIMx Low-Power Timer instance
753 * @retval Returned value can be one of the following values:
754 * @arg @ref LL_LPTIM_TRIG_FILTER_NONE
755 * @arg @ref LL_LPTIM_TRIG_FILTER_2
756 * @arg @ref LL_LPTIM_TRIG_FILTER_4
757 * @arg @ref LL_LPTIM_TRIG_FILTER_8
758 */
759__STATIC_INLINE uint32_t LL_LPTIM_GetTriggerFilter(LPTIM_TypeDef *LPTIMx)
760{
761 return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_TRGFLT));
762}
763
764/**
765 * @brief Get actual external trigger polarity.
766 * @rmtoll CFGR TRIGEN LL_LPTIM_GetTriggerPolarity
767 * @param LPTIMx Low-Power Timer instance
768 * @retval Returned value can be one of the following values:
769 * @arg @ref LL_LPTIM_TRIG_POLARITY_RISING
770 * @arg @ref LL_LPTIM_TRIG_POLARITY_FALLING
771 * @arg @ref LL_LPTIM_TRIG_POLARITY_RISING_FALLING
772 */
773__STATIC_INLINE uint32_t LL_LPTIM_GetTriggerPolarity(LPTIM_TypeDef *LPTIMx)
774{
775 return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_TRIGEN));
776}
777
778/**
779 * @}
780 */
781
782/** @defgroup LPTIM_LL_EF_Clock_Configuration Clock Configuration
783 * @{
784 */
785
786/**
787 * @brief Set the source of the clock used by the LPTIM instance.
788 * @note This function must be called when the LPTIM instance is disabled.
789 * @rmtoll CFGR CKSEL LL_LPTIM_SetClockSource
790 * @param LPTIMx Low-Power Timer instance
791 * @param ClockSource This parameter can be one of the following values:
792 * @arg @ref LL_LPTIM_CLK_SOURCE_INTERNAL
793 * @arg @ref LL_LPTIM_CLK_SOURCE_EXTERNAL
794 * @retval None
795 */
796__STATIC_INLINE void LL_LPTIM_SetClockSource(LPTIM_TypeDef *LPTIMx, uint32_t ClockSource)
797{
798 MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_CKSEL, ClockSource);
799}
800
801/**
802 * @brief Get actual LPTIM instance clock source.
803 * @rmtoll CFGR CKSEL LL_LPTIM_GetClockSource
804 * @param LPTIMx Low-Power Timer instance
805 * @retval Returned value can be one of the following values:
806 * @arg @ref LL_LPTIM_CLK_SOURCE_INTERNAL
807 * @arg @ref LL_LPTIM_CLK_SOURCE_EXTERNAL
808 */
809__STATIC_INLINE uint32_t LL_LPTIM_GetClockSource(LPTIM_TypeDef *LPTIMx)
810{
811 return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_CKSEL));
812}
813
814/**
815 * @brief Configure the active edge or edges used by the counter when the LPTIM is clocked by an external clock source.
816 * @note This function must be called when the LPTIM instance is disabled.
817 * @note When both external clock signal edges are considered active ones,
818 * the LPTIM must also be clocked by an internal clock source with a
819 * frequency equal to at least four times the external clock frequency.
820 * @note An internal clock source must be present when a digital filter is
821 * required for external clock.
822 * @rmtoll CFGR CKFLT LL_LPTIM_ConfigClock\n
823 * CFGR CKPOL LL_LPTIM_ConfigClock
824 * @param LPTIMx Low-Power Timer instance
825 * @param ClockFilter This parameter can be one of the following values:
826 * @arg @ref LL_LPTIM_CLK_FILTER_NONE
827 * @arg @ref LL_LPTIM_CLK_FILTER_2
828 * @arg @ref LL_LPTIM_CLK_FILTER_4
829 * @arg @ref LL_LPTIM_CLK_FILTER_8
830 * @param ClockPolarity This parameter can be one of the following values:
831 * @arg @ref LL_LPTIM_CLK_POLARITY_RISING
832 * @arg @ref LL_LPTIM_CLK_POLARITY_FALLING
833 * @arg @ref LL_LPTIM_CLK_POLARITY_RISING_FALLING
834 * @retval None
835 */
836__STATIC_INLINE void LL_LPTIM_ConfigClock(LPTIM_TypeDef *LPTIMx, uint32_t ClockFilter, uint32_t ClockPolarity)
837{
838 MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_CKFLT | LPTIM_CFGR_CKPOL, ClockFilter | ClockPolarity);
839}
840
841/**
842 * @brief Get actual clock polarity
843 * @rmtoll CFGR CKPOL LL_LPTIM_GetClockPolarity
844 * @param LPTIMx Low-Power Timer instance
845 * @retval Returned value can be one of the following values:
846 * @arg @ref LL_LPTIM_CLK_POLARITY_RISING
847 * @arg @ref LL_LPTIM_CLK_POLARITY_FALLING
848 * @arg @ref LL_LPTIM_CLK_POLARITY_RISING_FALLING
849 */
850__STATIC_INLINE uint32_t LL_LPTIM_GetClockPolarity(LPTIM_TypeDef *LPTIMx)
851{
852 return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_CKPOL));
853}
854
855/**
856 * @brief Get actual clock digital filter
857 * @rmtoll CFGR CKFLT LL_LPTIM_GetClockFilter
858 * @param LPTIMx Low-Power Timer instance
859 * @retval Returned value can be one of the following values:
860 * @arg @ref LL_LPTIM_CLK_FILTER_NONE
861 * @arg @ref LL_LPTIM_CLK_FILTER_2
862 * @arg @ref LL_LPTIM_CLK_FILTER_4
863 * @arg @ref LL_LPTIM_CLK_FILTER_8
864 */
865__STATIC_INLINE uint32_t LL_LPTIM_GetClockFilter(LPTIM_TypeDef *LPTIMx)
866{
867 return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_CKFLT));
868}
869
870/**
871 * @}
872 */
873
874/** @defgroup LPTIM_LL_EF_Encoder_Mode Encoder Mode
875 * @{
876 */
877
878/**
879 * @brief Configure the encoder mode.
880 * @note This function must be called when the LPTIM instance is disabled.
881 * @rmtoll CFGR CKPOL LL_LPTIM_SetEncoderMode
882 * @param LPTIMx Low-Power Timer instance
883 * @param EncoderMode This parameter can be one of the following values:
884 * @arg @ref LL_LPTIM_ENCODER_MODE_RISING
885 * @arg @ref LL_LPTIM_ENCODER_MODE_FALLING
886 * @arg @ref LL_LPTIM_ENCODER_MODE_RISING_FALLING
887 * @retval None
888 */
889__STATIC_INLINE void LL_LPTIM_SetEncoderMode(LPTIM_TypeDef *LPTIMx, uint32_t EncoderMode)
890{
891 MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_CKPOL, EncoderMode);
892}
893
894/**
895 * @brief Get actual encoder mode.
896 * @rmtoll CFGR CKPOL LL_LPTIM_GetEncoderMode
897 * @param LPTIMx Low-Power Timer instance
898 * @retval Returned value can be one of the following values:
899 * @arg @ref LL_LPTIM_ENCODER_MODE_RISING
900 * @arg @ref LL_LPTIM_ENCODER_MODE_FALLING
901 * @arg @ref LL_LPTIM_ENCODER_MODE_RISING_FALLING
902 */
903__STATIC_INLINE uint32_t LL_LPTIM_GetEncoderMode(LPTIM_TypeDef *LPTIMx)
904{
905 return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_CKPOL));
906}
907
908/**
909 * @brief Enable the encoder mode
910 * @note This function must be called when the LPTIM instance is disabled.
911 * @note In this mode the LPTIM instance must be clocked by an internal clock
912 * source. Also, the prescaler division ratio must be equal to 1.
913 * @note LPTIM instance must be configured in continuous mode prior enabling
914 * the encoder mode.
915 * @rmtoll CFGR ENC LL_LPTIM_EnableEncoderMode
916 * @param LPTIMx Low-Power Timer instance
917 * @retval None
918 */
919__STATIC_INLINE void LL_LPTIM_EnableEncoderMode(LPTIM_TypeDef *LPTIMx)
920{
921 SET_BIT(LPTIMx->CFGR, LPTIM_CFGR_ENC);
922}
923
924/**
925 * @brief Disable the encoder mode
926 * @note This function must be called when the LPTIM instance is disabled.
927 * @rmtoll CFGR ENC LL_LPTIM_DisableEncoderMode
928 * @param LPTIMx Low-Power Timer instance
929 * @retval None
930 */
931__STATIC_INLINE void LL_LPTIM_DisableEncoderMode(LPTIM_TypeDef *LPTIMx)
932{
933 CLEAR_BIT(LPTIMx->CFGR, LPTIM_CFGR_ENC);
934}
935
936/**
937 * @brief Indicates whether the LPTIM operates in encoder mode.
938 * @rmtoll CFGR ENC LL_LPTIM_IsEnabledEncoderMode
939 * @param LPTIMx Low-Power Timer instance
940 * @retval State of bit (1 or 0).
941 */
942__STATIC_INLINE uint32_t LL_LPTIM_IsEnabledEncoderMode(LPTIM_TypeDef *LPTIMx)
943{
944 return (((READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_ENC) == LPTIM_CFGR_ENC) ? 1UL : 0UL));
945}
946
947/**
948 * @}
949 */
950
951/** @defgroup LPTIM_LL_EF_FLAG_Management FLAG Management
952 * @{
953 */
954
955/**
956 * @brief Clear the compare match flag (CMPMCF)
957 * @rmtoll ICR CMPMCF LL_LPTIM_ClearFLAG_CMPM
958 * @param LPTIMx Low-Power Timer instance
959 * @retval None
960 */
961__STATIC_INLINE void LL_LPTIM_ClearFLAG_CMPM(LPTIM_TypeDef *LPTIMx)
962{
963 SET_BIT(LPTIMx->ICR, LPTIM_ICR_CMPMCF);
964}
965
966/**
967 * @brief Inform application whether a compare match interrupt has occurred.
968 * @rmtoll ISR CMPM LL_LPTIM_IsActiveFlag_CMPM
969 * @param LPTIMx Low-Power Timer instance
970 * @retval State of bit (1 or 0).
971 */
972__STATIC_INLINE uint32_t LL_LPTIM_IsActiveFlag_CMPM(LPTIM_TypeDef *LPTIMx)
973{
974 return (((READ_BIT(LPTIMx->ISR, LPTIM_ISR_CMPM) == LPTIM_ISR_CMPM) ? 1UL : 0UL));
975}
976
977/**
978 * @brief Clear the autoreload match flag (ARRMCF)
979 * @rmtoll ICR ARRMCF LL_LPTIM_ClearFLAG_ARRM
980 * @param LPTIMx Low-Power Timer instance
981 * @retval None
982 */
983__STATIC_INLINE void LL_LPTIM_ClearFLAG_ARRM(LPTIM_TypeDef *LPTIMx)
984{
985 SET_BIT(LPTIMx->ICR, LPTIM_ICR_ARRMCF);
986}
987
988/**
989 * @brief Inform application whether a autoreload match interrupt has occurred.
990 * @rmtoll ISR ARRM LL_LPTIM_IsActiveFlag_ARRM
991 * @param LPTIMx Low-Power Timer instance
992 * @retval State of bit (1 or 0).
993 */
994__STATIC_INLINE uint32_t LL_LPTIM_IsActiveFlag_ARRM(LPTIM_TypeDef *LPTIMx)
995{
996 return (((READ_BIT(LPTIMx->ISR, LPTIM_ISR_ARRM) == LPTIM_ISR_ARRM) ? 1UL : 0UL));
997}
998
999/**
1000 * @brief Clear the external trigger valid edge flag(EXTTRIGCF).
1001 * @rmtoll ICR EXTTRIGCF LL_LPTIM_ClearFlag_EXTTRIG
1002 * @param LPTIMx Low-Power Timer instance
1003 * @retval None
1004 */
1005__STATIC_INLINE void LL_LPTIM_ClearFlag_EXTTRIG(LPTIM_TypeDef *LPTIMx)
1006{
1007 SET_BIT(LPTIMx->ICR, LPTIM_ICR_EXTTRIGCF);
1008}
1009
1010/**
1011 * @brief Inform application whether a valid edge on the selected external trigger input has occurred.
1012 * @rmtoll ISR EXTTRIG LL_LPTIM_IsActiveFlag_EXTTRIG
1013 * @param LPTIMx Low-Power Timer instance
1014 * @retval State of bit (1 or 0).
1015 */
1016__STATIC_INLINE uint32_t LL_LPTIM_IsActiveFlag_EXTTRIG(LPTIM_TypeDef *LPTIMx)
1017{
1018 return (((READ_BIT(LPTIMx->ISR, LPTIM_ISR_EXTTRIG) == LPTIM_ISR_EXTTRIG) ? 1UL : 0UL));
1019}
1020
1021/**
1022 * @brief Clear the compare register update interrupt flag (CMPOKCF).
1023 * @rmtoll ICR CMPOKCF LL_LPTIM_ClearFlag_CMPOK
1024 * @param LPTIMx Low-Power Timer instance
1025 * @retval None
1026 */
1027__STATIC_INLINE void LL_LPTIM_ClearFlag_CMPOK(LPTIM_TypeDef *LPTIMx)
1028{
1029 SET_BIT(LPTIMx->ICR, LPTIM_ICR_CMPOKCF);
1030}
1031
1032/**
1033 * @brief Informs application whether the APB bus write operation to the LPTIMx_CMP register has been successfully completed. If so, a new one can be initiated.
1034 * @rmtoll ISR CMPOK LL_LPTIM_IsActiveFlag_CMPOK
1035 * @param LPTIMx Low-Power Timer instance
1036 * @retval State of bit (1 or 0).
1037 */
1038__STATIC_INLINE uint32_t LL_LPTIM_IsActiveFlag_CMPOK(LPTIM_TypeDef *LPTIMx)
1039{
1040 return (((READ_BIT(LPTIMx->ISR, LPTIM_ISR_CMPOK) == LPTIM_ISR_CMPOK) ? 1UL : 0UL));
1041}
1042
1043/**
1044 * @brief Clear the autoreload register update interrupt flag (ARROKCF).
1045 * @rmtoll ICR ARROKCF LL_LPTIM_ClearFlag_ARROK
1046 * @param LPTIMx Low-Power Timer instance
1047 * @retval None
1048 */
1049__STATIC_INLINE void LL_LPTIM_ClearFlag_ARROK(LPTIM_TypeDef *LPTIMx)
1050{
1051 SET_BIT(LPTIMx->ICR, LPTIM_ICR_ARROKCF);
1052}
1053
1054/**
1055 * @brief Informs application whether the APB bus write operation to the LPTIMx_ARR register has been successfully completed. If so, a new one can be initiated.
1056 * @rmtoll ISR ARROK LL_LPTIM_IsActiveFlag_ARROK
1057 * @param LPTIMx Low-Power Timer instance
1058 * @retval State of bit (1 or 0).
1059 */
1060__STATIC_INLINE uint32_t LL_LPTIM_IsActiveFlag_ARROK(LPTIM_TypeDef *LPTIMx)
1061{
1062 return (((READ_BIT(LPTIMx->ISR, LPTIM_ISR_ARROK) == LPTIM_ISR_ARROK) ? 1UL : 0UL));
1063}
1064
1065/**
1066 * @brief Clear the counter direction change to up interrupt flag (UPCF).
1067 * @rmtoll ICR UPCF LL_LPTIM_ClearFlag_UP
1068 * @param LPTIMx Low-Power Timer instance
1069 * @retval None
1070 */
1071__STATIC_INLINE void LL_LPTIM_ClearFlag_UP(LPTIM_TypeDef *LPTIMx)
1072{
1073 SET_BIT(LPTIMx->ICR, LPTIM_ICR_UPCF);
1074}
1075
1076/**
1077 * @brief Informs the application whether the counter direction has changed from down to up (when the LPTIM instance operates in encoder mode).
1078 * @rmtoll ISR UP LL_LPTIM_IsActiveFlag_UP
1079 * @param LPTIMx Low-Power Timer instance
1080 * @retval State of bit (1 or 0).
1081 */
1082__STATIC_INLINE uint32_t LL_LPTIM_IsActiveFlag_UP(LPTIM_TypeDef *LPTIMx)
1083{
1084 return (((READ_BIT(LPTIMx->ISR, LPTIM_ISR_UP) == LPTIM_ISR_UP) ? 1UL : 0UL));
1085}
1086
1087/**
1088 * @brief Clear the counter direction change to down interrupt flag (DOWNCF).
1089 * @rmtoll ICR DOWNCF LL_LPTIM_ClearFlag_DOWN
1090 * @param LPTIMx Low-Power Timer instance
1091 * @retval None
1092 */
1093__STATIC_INLINE void LL_LPTIM_ClearFlag_DOWN(LPTIM_TypeDef *LPTIMx)
1094{
1095 SET_BIT(LPTIMx->ICR, LPTIM_ICR_DOWNCF);
1096}
1097
1098/**
1099 * @brief Informs the application whether the counter direction has changed from up to down (when the LPTIM instance operates in encoder mode).
1100 * @rmtoll ISR DOWN LL_LPTIM_IsActiveFlag_DOWN
1101 * @param LPTIMx Low-Power Timer instance
1102 * @retval State of bit (1 or 0).
1103 */
1104__STATIC_INLINE uint32_t LL_LPTIM_IsActiveFlag_DOWN(LPTIM_TypeDef *LPTIMx)
1105{
1106 return (((READ_BIT(LPTIMx->ISR, LPTIM_ISR_DOWN) == LPTIM_ISR_DOWN) ? 1UL : 0UL));
1107}
1108
1109/**
1110 * @}
1111 */
1112
1113/** @defgroup LPTIM_LL_EF_IT_Management Interrupt Management
1114 * @{
1115 */
1116
1117/**
1118 * @brief Enable compare match interrupt (CMPMIE).
1119 * @rmtoll IER CMPMIE LL_LPTIM_EnableIT_CMPM
1120 * @param LPTIMx Low-Power Timer instance
1121 * @retval None
1122 */
1123__STATIC_INLINE void LL_LPTIM_EnableIT_CMPM(LPTIM_TypeDef *LPTIMx)
1124{
1125 SET_BIT(LPTIMx->IER, LPTIM_IER_CMPMIE);
1126}
1127
1128/**
1129 * @brief Disable compare match interrupt (CMPMIE).
1130 * @rmtoll IER CMPMIE LL_LPTIM_DisableIT_CMPM
1131 * @param LPTIMx Low-Power Timer instance
1132 * @retval None
1133 */
1134__STATIC_INLINE void LL_LPTIM_DisableIT_CMPM(LPTIM_TypeDef *LPTIMx)
1135{
1136 CLEAR_BIT(LPTIMx->IER, LPTIM_IER_CMPMIE);
1137}
1138
1139/**
1140 * @brief Indicates whether the compare match interrupt (CMPMIE) is enabled.
1141 * @rmtoll IER CMPMIE LL_LPTIM_IsEnabledIT_CMPM
1142 * @param LPTIMx Low-Power Timer instance
1143 * @retval State of bit (1 or 0).
1144 */
1145__STATIC_INLINE uint32_t LL_LPTIM_IsEnabledIT_CMPM(LPTIM_TypeDef *LPTIMx)
1146{
1147 return (((READ_BIT(LPTIMx->IER, LPTIM_IER_CMPMIE) == LPTIM_IER_CMPMIE) ? 1UL : 0UL));
1148}
1149
1150/**
1151 * @brief Enable autoreload match interrupt (ARRMIE).
1152 * @rmtoll IER ARRMIE LL_LPTIM_EnableIT_ARRM
1153 * @param LPTIMx Low-Power Timer instance
1154 * @retval None
1155 */
1156__STATIC_INLINE void LL_LPTIM_EnableIT_ARRM(LPTIM_TypeDef *LPTIMx)
1157{
1158 SET_BIT(LPTIMx->IER, LPTIM_IER_ARRMIE);
1159}
1160
1161/**
1162 * @brief Disable autoreload match interrupt (ARRMIE).
1163 * @rmtoll IER ARRMIE LL_LPTIM_DisableIT_ARRM
1164 * @param LPTIMx Low-Power Timer instance
1165 * @retval None
1166 */
1167__STATIC_INLINE void LL_LPTIM_DisableIT_ARRM(LPTIM_TypeDef *LPTIMx)
1168{
1169 CLEAR_BIT(LPTIMx->IER, LPTIM_IER_ARRMIE);
1170}
1171
1172/**
1173 * @brief Indicates whether the autoreload match interrupt (ARRMIE) is enabled.
1174 * @rmtoll IER ARRMIE LL_LPTIM_IsEnabledIT_ARRM
1175 * @param LPTIMx Low-Power Timer instance
1176 * @retval State of bit (1 or 0).
1177 */
1178__STATIC_INLINE uint32_t LL_LPTIM_IsEnabledIT_ARRM(LPTIM_TypeDef *LPTIMx)
1179{
1180 return (((READ_BIT(LPTIMx->IER, LPTIM_IER_ARRMIE) == LPTIM_IER_ARRMIE) ? 1UL : 0UL));
1181}
1182
1183/**
1184 * @brief Enable external trigger valid edge interrupt (EXTTRIGIE).
1185 * @rmtoll IER EXTTRIGIE LL_LPTIM_EnableIT_EXTTRIG
1186 * @param LPTIMx Low-Power Timer instance
1187 * @retval None
1188 */
1189__STATIC_INLINE void LL_LPTIM_EnableIT_EXTTRIG(LPTIM_TypeDef *LPTIMx)
1190{
1191 SET_BIT(LPTIMx->IER, LPTIM_IER_EXTTRIGIE);
1192}
1193
1194/**
1195 * @brief Disable external trigger valid edge interrupt (EXTTRIGIE).
1196 * @rmtoll IER EXTTRIGIE LL_LPTIM_DisableIT_EXTTRIG
1197 * @param LPTIMx Low-Power Timer instance
1198 * @retval None
1199 */
1200__STATIC_INLINE void LL_LPTIM_DisableIT_EXTTRIG(LPTIM_TypeDef *LPTIMx)
1201{
1202 CLEAR_BIT(LPTIMx->IER, LPTIM_IER_EXTTRIGIE);
1203}
1204
1205/**
1206 * @brief Indicates external trigger valid edge interrupt (EXTTRIGIE) is enabled.
1207 * @rmtoll IER EXTTRIGIE LL_LPTIM_IsEnabledIT_EXTTRIG
1208 * @param LPTIMx Low-Power Timer instance
1209 * @retval State of bit (1 or 0).
1210 */
1211__STATIC_INLINE uint32_t LL_LPTIM_IsEnabledIT_EXTTRIG(LPTIM_TypeDef *LPTIMx)
1212{
1213 return (((READ_BIT(LPTIMx->IER, LPTIM_IER_EXTTRIGIE) == LPTIM_IER_EXTTRIGIE) ? 1UL : 0UL));
1214}
1215
1216/**
1217 * @brief Enable compare register write completed interrupt (CMPOKIE).
1218 * @rmtoll IER CMPOKIE LL_LPTIM_EnableIT_CMPOK
1219 * @param LPTIMx Low-Power Timer instance
1220 * @retval None
1221 */
1222__STATIC_INLINE void LL_LPTIM_EnableIT_CMPOK(LPTIM_TypeDef *LPTIMx)
1223{
1224 SET_BIT(LPTIMx->IER, LPTIM_IER_CMPOKIE);
1225}
1226
1227/**
1228 * @brief Disable compare register write completed interrupt (CMPOKIE).
1229 * @rmtoll IER CMPOKIE LL_LPTIM_DisableIT_CMPOK
1230 * @param LPTIMx Low-Power Timer instance
1231 * @retval None
1232 */
1233__STATIC_INLINE void LL_LPTIM_DisableIT_CMPOK(LPTIM_TypeDef *LPTIMx)
1234{
1235 CLEAR_BIT(LPTIMx->IER, LPTIM_IER_CMPOKIE);
1236}
1237
1238/**
1239 * @brief Indicates whether the compare register write completed interrupt (CMPOKIE) is enabled.
1240 * @rmtoll IER CMPOKIE LL_LPTIM_IsEnabledIT_CMPOK
1241 * @param LPTIMx Low-Power Timer instance
1242 * @retval State of bit (1 or 0).
1243 */
1244__STATIC_INLINE uint32_t LL_LPTIM_IsEnabledIT_CMPOK(LPTIM_TypeDef *LPTIMx)
1245{
1246 return (((READ_BIT(LPTIMx->IER, LPTIM_IER_CMPOKIE) == LPTIM_IER_CMPOKIE) ? 1UL : 0UL));
1247}
1248
1249/**
1250 * @brief Enable autoreload register write completed interrupt (ARROKIE).
1251 * @rmtoll IER ARROKIE LL_LPTIM_EnableIT_ARROK
1252 * @param LPTIMx Low-Power Timer instance
1253 * @retval None
1254 */
1255__STATIC_INLINE void LL_LPTIM_EnableIT_ARROK(LPTIM_TypeDef *LPTIMx)
1256{
1257 SET_BIT(LPTIMx->IER, LPTIM_IER_ARROKIE);
1258}
1259
1260/**
1261 * @brief Disable autoreload register write completed interrupt (ARROKIE).
1262 * @rmtoll IER ARROKIE LL_LPTIM_DisableIT_ARROK
1263 * @param LPTIMx Low-Power Timer instance
1264 * @retval None
1265 */
1266__STATIC_INLINE void LL_LPTIM_DisableIT_ARROK(LPTIM_TypeDef *LPTIMx)
1267{
1268 CLEAR_BIT(LPTIMx->IER, LPTIM_IER_ARROKIE);
1269}
1270
1271/**
1272 * @brief Indicates whether the autoreload register write completed interrupt (ARROKIE) is enabled.
1273 * @rmtoll IER ARROKIE LL_LPTIM_IsEnabledIT_ARROK
1274 * @param LPTIMx Low-Power Timer instance
1275 * @retval State of bit(1 or 0).
1276 */
1277__STATIC_INLINE uint32_t LL_LPTIM_IsEnabledIT_ARROK(LPTIM_TypeDef *LPTIMx)
1278{
1279 return (((READ_BIT(LPTIMx->IER, LPTIM_IER_ARROKIE) == LPTIM_IER_ARROKIE) ? 1UL : 0UL));
1280}
1281
1282/**
1283 * @brief Enable direction change to up interrupt (UPIE).
1284 * @rmtoll IER UPIE LL_LPTIM_EnableIT_UP
1285 * @param LPTIMx Low-Power Timer instance
1286 * @retval None
1287 */
1288__STATIC_INLINE void LL_LPTIM_EnableIT_UP(LPTIM_TypeDef *LPTIMx)
1289{
1290 SET_BIT(LPTIMx->IER, LPTIM_IER_UPIE);
1291}
1292
1293/**
1294 * @brief Disable direction change to up interrupt (UPIE).
1295 * @rmtoll IER UPIE LL_LPTIM_DisableIT_UP
1296 * @param LPTIMx Low-Power Timer instance
1297 * @retval None
1298 */
1299__STATIC_INLINE void LL_LPTIM_DisableIT_UP(LPTIM_TypeDef *LPTIMx)
1300{
1301 CLEAR_BIT(LPTIMx->IER, LPTIM_IER_UPIE);
1302}
1303
1304/**
1305 * @brief Indicates whether the direction change to up interrupt (UPIE) is enabled.
1306 * @rmtoll IER UPIE LL_LPTIM_IsEnabledIT_UP
1307 * @param LPTIMx Low-Power Timer instance
1308 * @retval State of bit(1 or 0).
1309 */
1310__STATIC_INLINE uint32_t LL_LPTIM_IsEnabledIT_UP(LPTIM_TypeDef *LPTIMx)
1311{
1312 return (((READ_BIT(LPTIMx->IER, LPTIM_IER_UPIE) == LPTIM_IER_UPIE) ? 1UL : 0UL));
1313}
1314
1315/**
1316 * @brief Enable direction change to down interrupt (DOWNIE).
1317 * @rmtoll IER DOWNIE LL_LPTIM_EnableIT_DOWN
1318 * @param LPTIMx Low-Power Timer instance
1319 * @retval None
1320 */
1321__STATIC_INLINE void LL_LPTIM_EnableIT_DOWN(LPTIM_TypeDef *LPTIMx)
1322{
1323 SET_BIT(LPTIMx->IER, LPTIM_IER_DOWNIE);
1324}
1325
1326/**
1327 * @brief Disable direction change to down interrupt (DOWNIE).
1328 * @rmtoll IER DOWNIE LL_LPTIM_DisableIT_DOWN
1329 * @param LPTIMx Low-Power Timer instance
1330 * @retval None
1331 */
1332__STATIC_INLINE void LL_LPTIM_DisableIT_DOWN(LPTIM_TypeDef *LPTIMx)
1333{
1334 CLEAR_BIT(LPTIMx->IER, LPTIM_IER_DOWNIE);
1335}
1336
1337/**
1338 * @brief Indicates whether the direction change to down interrupt (DOWNIE) is enabled.
1339 * @rmtoll IER DOWNIE LL_LPTIM_IsEnabledIT_DOWN
1340 * @param LPTIMx Low-Power Timer instance
1341 * @retval State of bit(1 or 0).
1342 */
1343__STATIC_INLINE uint32_t LL_LPTIM_IsEnabledIT_DOWN(LPTIM_TypeDef *LPTIMx)
1344{
1345 return ((READ_BIT(LPTIMx->IER, LPTIM_IER_DOWNIE) == LPTIM_IER_DOWNIE) ? 1UL : 0UL);
1346}
1347
1348/**
1349 * @}
1350 */
1351
1352/**
1353 * @}
1354 */
1355
1356/**
1357 * @}
1358 */
1359
1360#endif /* LPTIM1 */
1361
1362/**
1363 * @}
1364 */
1365
1366#ifdef __cplusplus
1367}
1368#endif
1369
1370#endif /* STM32F4xx_LL_LPTIM_H */
1371
1372/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
Note: See TracBrowser for help on using the repository browser.