source: S-port/trunk/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_fmpsmbus.c

Last change on this file was 1, checked in by AlexLir, 3 years ago
File size: 101.0 KB
Line 
1/**
2 ******************************************************************************
3 * @file stm32f4xx_hal_fmpsmbus.c
4 * @author MCD Application Team
5 * @brief FMPSMBUS HAL module driver.
6 * This file provides firmware functions to manage the following
7 * functionalities of the System Management Bus (SMBus) peripheral,
8 * based on I2C principles of operation :
9 * + Initialization and de-initialization functions
10 * + IO operation functions
11 * + Peripheral State and Errors functions
12 *
13 @verbatim
14 ==============================================================================
15 ##### How to use this driver #####
16 ==============================================================================
17 [..]
18 The FMPSMBUS HAL driver can be used as follows:
19
20 (#) Declare a FMPSMBUS_HandleTypeDef handle structure, for example:
21 FMPSMBUS_HandleTypeDef hfmpsmbus;
22
23 (#)Initialize the FMPSMBUS low level resources by implementing the @ref HAL_FMPSMBUS_MspInit() API:
24 (##) Enable the FMPSMBUSx interface clock
25 (##) FMPSMBUS pins configuration
26 (+++) Enable the clock for the FMPSMBUS GPIOs
27 (+++) Configure FMPSMBUS pins as alternate function open-drain
28 (##) NVIC configuration if you need to use interrupt process
29 (+++) Configure the FMPSMBUSx interrupt priority
30 (+++) Enable the NVIC FMPSMBUS IRQ Channel
31
32 (#) Configure the Communication Clock Timing, Bus Timeout, Own Address1, Master Addressing mode,
33 Dual Addressing mode, Own Address2, Own Address2 Mask, General call, Nostretch mode,
34 Peripheral mode and Packet Error Check mode in the hfmpsmbus Init structure.
35
36 (#) Initialize the FMPSMBUS registers by calling the @ref HAL_FMPSMBUS_Init() API:
37 (++) These API's configures also the low level Hardware GPIO, CLOCK, CORTEX...etc)
38 by calling the customized @ref HAL_FMPSMBUS_MspInit(&hfmpsmbus) API.
39
40 (#) To check if target device is ready for communication, use the function @ref HAL_FMPSMBUS_IsDeviceReady()
41
42 (#) For FMPSMBUS IO operations, only one mode of operations is available within this driver
43
44 *** Interrupt mode IO operation ***
45 ===================================
46 [..]
47 (+) Transmit in master/host FMPSMBUS mode an amount of data in non-blocking mode using @ref HAL_FMPSMBUS_Master_Transmit_IT()
48 (++) At transmission end of transfer @ref HAL_FMPSMBUS_MasterTxCpltCallback() is executed and user can
49 add his own code by customization of function pointer @ref HAL_FMPSMBUS_MasterTxCpltCallback()
50 (+) Receive in master/host FMPSMBUS mode an amount of data in non-blocking mode using @ref HAL_FMPSMBUS_Master_Receive_IT()
51 (++) At reception end of transfer @ref HAL_FMPSMBUS_MasterRxCpltCallback() is executed and user can
52 add his own code by customization of function pointer @ref HAL_FMPSMBUS_MasterRxCpltCallback()
53 (+) Abort a master/host FMPSMBUS process communication with Interrupt using @ref HAL_FMPSMBUS_Master_Abort_IT()
54 (++) The associated previous transfer callback is called at the end of abort process
55 (++) mean @ref HAL_FMPSMBUS_MasterTxCpltCallback() in case of previous state was master transmit
56 (++) mean @ref HAL_FMPSMBUS_MasterRxCpltCallback() in case of previous state was master receive
57 (+) Enable/disable the Address listen mode in slave/device or host/slave FMPSMBUS mode
58 using @ref HAL_FMPSMBUS_EnableListen_IT() @ref HAL_FMPSMBUS_DisableListen_IT()
59 (++) When address slave/device FMPSMBUS match, @ref HAL_FMPSMBUS_AddrCallback() is executed and user can
60 add his own code to check the Address Match Code and the transmission direction request by master/host (Write/Read).
61 (++) At Listen mode end @ref HAL_FMPSMBUS_ListenCpltCallback() is executed and user can
62 add his own code by customization of function pointer @ref HAL_FMPSMBUS_ListenCpltCallback()
63 (+) Transmit in slave/device FMPSMBUS mode an amount of data in non-blocking mode using @ref HAL_FMPSMBUS_Slave_Transmit_IT()
64 (++) At transmission end of transfer @ref HAL_FMPSMBUS_SlaveTxCpltCallback() is executed and user can
65 add his own code by customization of function pointer @ref HAL_FMPSMBUS_SlaveTxCpltCallback()
66 (+) Receive in slave/device FMPSMBUS mode an amount of data in non-blocking mode using @ref HAL_FMPSMBUS_Slave_Receive_IT()
67 (++) At reception end of transfer @ref HAL_FMPSMBUS_SlaveRxCpltCallback() is executed and user can
68 add his own code by customization of function pointer @ref HAL_FMPSMBUS_SlaveRxCpltCallback()
69 (+) Enable/Disable the FMPSMBUS alert mode using @ref HAL_FMPSMBUS_EnableAlert_IT() @ref HAL_FMPSMBUS_DisableAlert_IT()
70 (++) When FMPSMBUS Alert is generated @ref HAL_FMPSMBUS_ErrorCallback() is executed and user can
71 add his own code by customization of function pointer @ref HAL_FMPSMBUS_ErrorCallback()
72 to check the Alert Error Code using function @ref HAL_FMPSMBUS_GetError()
73 (+) Get HAL state machine or error values using @ref HAL_FMPSMBUS_GetState() or @ref HAL_FMPSMBUS_GetError()
74 (+) In case of transfer Error, @ref HAL_FMPSMBUS_ErrorCallback() function is executed and user can
75 add his own code by customization of function pointer @ref HAL_FMPSMBUS_ErrorCallback()
76 to check the Error Code using function @ref HAL_FMPSMBUS_GetError()
77
78 *** FMPSMBUS HAL driver macros list ***
79 ==================================
80 [..]
81 Below the list of most used macros in FMPSMBUS HAL driver.
82
83 (+) @ref __HAL_FMPSMBUS_ENABLE: Enable the FMPSMBUS peripheral
84 (+) @ref __HAL_FMPSMBUS_DISABLE: Disable the FMPSMBUS peripheral
85 (+) @ref __HAL_FMPSMBUS_GET_FLAG: Check whether the specified FMPSMBUS flag is set or not
86 (+) @ref __HAL_FMPSMBUS_CLEAR_FLAG: Clear the specified FMPSMBUS pending flag
87 (+) @ref __HAL_FMPSMBUS_ENABLE_IT: Enable the specified FMPSMBUS interrupt
88 (+) @ref __HAL_FMPSMBUS_DISABLE_IT: Disable the specified FMPSMBUS interrupt
89
90 *** Callback registration ***
91 =============================================
92 [..]
93 The compilation flag USE_HAL_FMPSMBUS_REGISTER_CALLBACKS when set to 1
94 allows the user to configure dynamically the driver callbacks.
95 Use Functions @ref HAL_FMPSMBUS_RegisterCallback() or @ref HAL_FMPSMBUS_RegisterAddrCallback()
96 to register an interrupt callback.
97 [..]
98 Function @ref HAL_FMPSMBUS_RegisterCallback() allows to register following callbacks:
99 (+) MasterTxCpltCallback : callback for Master transmission end of transfer.
100 (+) MasterRxCpltCallback : callback for Master reception end of transfer.
101 (+) SlaveTxCpltCallback : callback for Slave transmission end of transfer.
102 (+) SlaveRxCpltCallback : callback for Slave reception end of transfer.
103 (+) ListenCpltCallback : callback for end of listen mode.
104 (+) ErrorCallback : callback for error detection.
105 (+) MspInitCallback : callback for Msp Init.
106 (+) MspDeInitCallback : callback for Msp DeInit.
107 This function takes as parameters the HAL peripheral handle, the Callback ID
108 and a pointer to the user callback function.
109 [..]
110 For specific callback AddrCallback use dedicated register callbacks : @ref HAL_FMPSMBUS_RegisterAddrCallback.
111 [..]
112 Use function @ref HAL_FMPSMBUS_UnRegisterCallback to reset a callback to the default
113 weak function.
114 @ref HAL_FMPSMBUS_UnRegisterCallback takes as parameters the HAL peripheral handle,
115 and the Callback ID.
116 This function allows to reset following callbacks:
117 (+) MasterTxCpltCallback : callback for Master transmission end of transfer.
118 (+) MasterRxCpltCallback : callback for Master reception end of transfer.
119 (+) SlaveTxCpltCallback : callback for Slave transmission end of transfer.
120 (+) SlaveRxCpltCallback : callback for Slave reception end of transfer.
121 (+) ListenCpltCallback : callback for end of listen mode.
122 (+) ErrorCallback : callback for error detection.
123 (+) MspInitCallback : callback for Msp Init.
124 (+) MspDeInitCallback : callback for Msp DeInit.
125 [..]
126 For callback AddrCallback use dedicated register callbacks : @ref HAL_FMPSMBUS_UnRegisterAddrCallback.
127 [..]
128 By default, after the @ref HAL_FMPSMBUS_Init() and when the state is @ref HAL_FMPI2C_STATE_RESET
129 all callbacks are set to the corresponding weak functions:
130 examples @ref HAL_FMPSMBUS_MasterTxCpltCallback(), @ref HAL_FMPSMBUS_MasterRxCpltCallback().
131 Exception done for MspInit and MspDeInit functions that are
132 reset to the legacy weak functions in the @ref HAL_FMPSMBUS_Init()/ @ref HAL_FMPSMBUS_DeInit() only when
133 these callbacks are null (not registered beforehand).
134 If MspInit or MspDeInit are not null, the @ref HAL_FMPSMBUS_Init()/ @ref HAL_FMPSMBUS_DeInit()
135 keep and use the user MspInit/MspDeInit callbacks (registered beforehand) whatever the state.
136 [..]
137 Callbacks can be registered/unregistered in @ref HAL_FMPI2C_STATE_READY state only.
138 Exception done MspInit/MspDeInit functions that can be registered/unregistered
139 in @ref HAL_FMPI2C_STATE_READY or @ref HAL_FMPI2C_STATE_RESET state,
140 thus registered (user) MspInit/DeInit callbacks can be used during the Init/DeInit.
141 Then, the user first registers the MspInit/MspDeInit user callbacks
142 using @ref HAL_FMPSMBUS_RegisterCallback() before calling @ref HAL_FMPSMBUS_DeInit()
143 or @ref HAL_FMPSMBUS_Init() function.
144 [..]
145 When the compilation flag USE_HAL_FMPSMBUS_REGISTER_CALLBACKS is set to 0 or
146 not defined, the callback registration feature is not available and all callbacks
147 are set to the corresponding weak functions.
148
149 [..]
150 (@) You can refer to the FMPSMBUS HAL driver header file for more useful macros
151
152 @endverbatim
153 ******************************************************************************
154 * @attention
155 *
156 * <h2><center>&copy; Copyright (c) 2016 STMicroelectronics.
157 * All rights reserved.</center></h2>
158 *
159 * This software component is licensed by ST under BSD 3-Clause license,
160 * the "License"; You may not use this file except in compliance with the
161 * License. You may obtain a copy of the License at:
162 * opensource.org/licenses/BSD-3-Clause
163 *
164 ******************************************************************************
165 */
166
167/* Includes ------------------------------------------------------------------*/
168#include "stm32f4xx_hal.h"
169
170/** @addtogroup STM32F4xx_HAL_Driver
171 * @{
172 */
173
174/** @defgroup FMPSMBUS FMPSMBUS
175 * @brief FMPSMBUS HAL module driver
176 * @{
177 */
178
179#ifdef HAL_FMPSMBUS_MODULE_ENABLED
180
181#if defined(FMPI2C_CR1_PE)
182/* Private typedef -----------------------------------------------------------*/
183/* Private constants ---------------------------------------------------------*/
184/** @defgroup FMPSMBUS_Private_Define FMPSMBUS Private Constants
185 * @{
186 */
187#define TIMING_CLEAR_MASK (0xF0FFFFFFUL) /*!< FMPSMBUS TIMING clear register Mask */
188#define HAL_TIMEOUT_ADDR (10000U) /*!< 10 s */
189#define HAL_TIMEOUT_BUSY (25U) /*!< 25 ms */
190#define HAL_TIMEOUT_DIR (25U) /*!< 25 ms */
191#define HAL_TIMEOUT_RXNE (25U) /*!< 25 ms */
192#define HAL_TIMEOUT_STOPF (25U) /*!< 25 ms */
193#define HAL_TIMEOUT_TC (25U) /*!< 25 ms */
194#define HAL_TIMEOUT_TCR (25U) /*!< 25 ms */
195#define HAL_TIMEOUT_TXIS (25U) /*!< 25 ms */
196#define MAX_NBYTE_SIZE 255U
197/**
198 * @}
199 */
200
201/* Private macro -------------------------------------------------------------*/
202/* Private variables ---------------------------------------------------------*/
203/* Private function prototypes -----------------------------------------------*/
204/** @addtogroup FMPSMBUS_Private_Functions FMPSMBUS Private Functions
205 * @{
206 */
207static HAL_StatusTypeDef FMPSMBUS_WaitOnFlagUntilTimeout(FMPSMBUS_HandleTypeDef *hfmpsmbus, uint32_t Flag, FlagStatus Status,
208 uint32_t Timeout);
209
210static void FMPSMBUS_Enable_IRQ(FMPSMBUS_HandleTypeDef *hfmpsmbus, uint32_t InterruptRequest);
211static void FMPSMBUS_Disable_IRQ(FMPSMBUS_HandleTypeDef *hfmpsmbus, uint32_t InterruptRequest);
212static HAL_StatusTypeDef FMPSMBUS_Master_ISR(FMPSMBUS_HandleTypeDef *hfmpsmbus, uint32_t StatusFlags);
213static HAL_StatusTypeDef FMPSMBUS_Slave_ISR(FMPSMBUS_HandleTypeDef *hfmpsmbus, uint32_t StatusFlags);
214
215static void FMPSMBUS_ConvertOtherXferOptions(FMPSMBUS_HandleTypeDef *hfmpsmbus);
216
217static void FMPSMBUS_ITErrorHandler(FMPSMBUS_HandleTypeDef *hfmpsmbus);
218
219static void FMPSMBUS_TransferConfig(FMPSMBUS_HandleTypeDef *hfmpsmbus, uint16_t DevAddress, uint8_t Size, uint32_t Mode,
220 uint32_t Request);
221/**
222 * @}
223 */
224
225/* Exported functions --------------------------------------------------------*/
226
227/** @defgroup FMPSMBUS_Exported_Functions FMPSMBUS Exported Functions
228 * @{
229 */
230
231/** @defgroup FMPSMBUS_Exported_Functions_Group1 Initialization and de-initialization functions
232 * @brief Initialization and Configuration functions
233 *
234@verbatim
235 ===============================================================================
236 ##### Initialization and de-initialization functions #####
237 ===============================================================================
238 [..] This subsection provides a set of functions allowing to initialize and
239 deinitialize the FMPSMBUSx peripheral:
240
241 (+) User must Implement HAL_FMPSMBUS_MspInit() function in which he configures
242 all related peripherals resources (CLOCK, GPIO, IT and NVIC ).
243
244 (+) Call the function HAL_FMPSMBUS_Init() to configure the selected device with
245 the selected configuration:
246 (++) Clock Timing
247 (++) Bus Timeout
248 (++) Analog Filer mode
249 (++) Own Address 1
250 (++) Addressing mode (Master, Slave)
251 (++) Dual Addressing mode
252 (++) Own Address 2
253 (++) Own Address 2 Mask
254 (++) General call mode
255 (++) Nostretch mode
256 (++) Packet Error Check mode
257 (++) Peripheral mode
258
259
260 (+) Call the function HAL_FMPSMBUS_DeInit() to restore the default configuration
261 of the selected FMPSMBUSx peripheral.
262
263 (+) Enable/Disable Analog/Digital filters with HAL_FMPSMBUS_ConfigAnalogFilter() and
264 HAL_FMPSMBUS_ConfigDigitalFilter().
265
266@endverbatim
267 * @{
268 */
269
270/**
271 * @brief Initialize the FMPSMBUS according to the specified parameters
272 * in the FMPSMBUS_InitTypeDef and initialize the associated handle.
273 * @param hfmpsmbus Pointer to a FMPSMBUS_HandleTypeDef structure that contains
274 * the configuration information for the specified FMPSMBUS.
275 * @retval HAL status
276 */
277HAL_StatusTypeDef HAL_FMPSMBUS_Init(FMPSMBUS_HandleTypeDef *hfmpsmbus)
278{
279 /* Check the FMPSMBUS handle allocation */
280 if (hfmpsmbus == NULL)
281 {
282 return HAL_ERROR;
283 }
284
285 /* Check the parameters */
286 assert_param(IS_FMPSMBUS_ALL_INSTANCE(hfmpsmbus->Instance));
287 assert_param(IS_FMPSMBUS_ANALOG_FILTER(hfmpsmbus->Init.AnalogFilter));
288 assert_param(IS_FMPSMBUS_OWN_ADDRESS1(hfmpsmbus->Init.OwnAddress1));
289 assert_param(IS_FMPSMBUS_ADDRESSING_MODE(hfmpsmbus->Init.AddressingMode));
290 assert_param(IS_FMPSMBUS_DUAL_ADDRESS(hfmpsmbus->Init.DualAddressMode));
291 assert_param(IS_FMPSMBUS_OWN_ADDRESS2(hfmpsmbus->Init.OwnAddress2));
292 assert_param(IS_FMPSMBUS_OWN_ADDRESS2_MASK(hfmpsmbus->Init.OwnAddress2Masks));
293 assert_param(IS_FMPSMBUS_GENERAL_CALL(hfmpsmbus->Init.GeneralCallMode));
294 assert_param(IS_FMPSMBUS_NO_STRETCH(hfmpsmbus->Init.NoStretchMode));
295 assert_param(IS_FMPSMBUS_PEC(hfmpsmbus->Init.PacketErrorCheckMode));
296 assert_param(IS_FMPSMBUS_PERIPHERAL_MODE(hfmpsmbus->Init.PeripheralMode));
297
298 if (hfmpsmbus->State == HAL_FMPSMBUS_STATE_RESET)
299 {
300 /* Allocate lock resource and initialize it */
301 hfmpsmbus->Lock = HAL_UNLOCKED;
302
303#if (USE_HAL_FMPSMBUS_REGISTER_CALLBACKS == 1)
304 hfmpsmbus->MasterTxCpltCallback = HAL_FMPSMBUS_MasterTxCpltCallback; /* Legacy weak MasterTxCpltCallback */
305 hfmpsmbus->MasterRxCpltCallback = HAL_FMPSMBUS_MasterRxCpltCallback; /* Legacy weak MasterRxCpltCallback */
306 hfmpsmbus->SlaveTxCpltCallback = HAL_FMPSMBUS_SlaveTxCpltCallback; /* Legacy weak SlaveTxCpltCallback */
307 hfmpsmbus->SlaveRxCpltCallback = HAL_FMPSMBUS_SlaveRxCpltCallback; /* Legacy weak SlaveRxCpltCallback */
308 hfmpsmbus->ListenCpltCallback = HAL_FMPSMBUS_ListenCpltCallback; /* Legacy weak ListenCpltCallback */
309 hfmpsmbus->ErrorCallback = HAL_FMPSMBUS_ErrorCallback; /* Legacy weak ErrorCallback */
310 hfmpsmbus->AddrCallback = HAL_FMPSMBUS_AddrCallback; /* Legacy weak AddrCallback */
311
312 if (hfmpsmbus->MspInitCallback == NULL)
313 {
314 hfmpsmbus->MspInitCallback = HAL_FMPSMBUS_MspInit; /* Legacy weak MspInit */
315 }
316
317 /* Init the low level hardware : GPIO, CLOCK, CORTEX...etc */
318 hfmpsmbus->MspInitCallback(hfmpsmbus);
319#else
320 /* Init the low level hardware : GPIO, CLOCK, NVIC */
321 HAL_FMPSMBUS_MspInit(hfmpsmbus);
322#endif /* USE_HAL_FMPSMBUS_REGISTER_CALLBACKS */
323 }
324
325 hfmpsmbus->State = HAL_FMPSMBUS_STATE_BUSY;
326
327 /* Disable the selected FMPSMBUS peripheral */
328 __HAL_FMPSMBUS_DISABLE(hfmpsmbus);
329
330 /*---------------------------- FMPSMBUSx TIMINGR Configuration ------------------------*/
331 /* Configure FMPSMBUSx: Frequency range */
332 hfmpsmbus->Instance->TIMINGR = hfmpsmbus->Init.Timing & TIMING_CLEAR_MASK;
333
334 /*---------------------------- FMPSMBUSx TIMEOUTR Configuration ------------------------*/
335 /* Configure FMPSMBUSx: Bus Timeout */
336 hfmpsmbus->Instance->TIMEOUTR &= ~FMPI2C_TIMEOUTR_TIMOUTEN;
337 hfmpsmbus->Instance->TIMEOUTR &= ~FMPI2C_TIMEOUTR_TEXTEN;
338 hfmpsmbus->Instance->TIMEOUTR = hfmpsmbus->Init.SMBusTimeout;
339
340 /*---------------------------- FMPSMBUSx OAR1 Configuration -----------------------*/
341 /* Configure FMPSMBUSx: Own Address1 and ack own address1 mode */
342 hfmpsmbus->Instance->OAR1 &= ~FMPI2C_OAR1_OA1EN;
343
344 if (hfmpsmbus->Init.OwnAddress1 != 0UL)
345 {
346 if (hfmpsmbus->Init.AddressingMode == FMPSMBUS_ADDRESSINGMODE_7BIT)
347 {
348 hfmpsmbus->Instance->OAR1 = (FMPI2C_OAR1_OA1EN | hfmpsmbus->Init.OwnAddress1);
349 }
350 else /* FMPSMBUS_ADDRESSINGMODE_10BIT */
351 {
352 hfmpsmbus->Instance->OAR1 = (FMPI2C_OAR1_OA1EN | FMPI2C_OAR1_OA1MODE | hfmpsmbus->Init.OwnAddress1);
353 }
354 }
355
356 /*---------------------------- FMPSMBUSx CR2 Configuration ------------------------*/
357 /* Configure FMPSMBUSx: Addressing Master mode */
358 if (hfmpsmbus->Init.AddressingMode == FMPSMBUS_ADDRESSINGMODE_10BIT)
359 {
360 hfmpsmbus->Instance->CR2 = (FMPI2C_CR2_ADD10);
361 }
362 /* Enable the AUTOEND by default, and enable NACK (should be disable only during Slave process) */
363 /* AUTOEND and NACK bit will be manage during Transfer process */
364 hfmpsmbus->Instance->CR2 |= (FMPI2C_CR2_AUTOEND | FMPI2C_CR2_NACK);
365
366 /*---------------------------- FMPSMBUSx OAR2 Configuration -----------------------*/
367 /* Configure FMPSMBUSx: Dual mode and Own Address2 */
368 hfmpsmbus->Instance->OAR2 = (hfmpsmbus->Init.DualAddressMode | hfmpsmbus->Init.OwnAddress2 | (hfmpsmbus->Init.OwnAddress2Masks << 8U));
369
370 /*---------------------------- FMPSMBUSx CR1 Configuration ------------------------*/
371 /* Configure FMPSMBUSx: Generalcall and NoStretch mode */
372 hfmpsmbus->Instance->CR1 = (hfmpsmbus->Init.GeneralCallMode | hfmpsmbus->Init.NoStretchMode | hfmpsmbus->Init.PacketErrorCheckMode | hfmpsmbus->Init.PeripheralMode | hfmpsmbus->Init.AnalogFilter);
373
374 /* Enable Slave Byte Control only in case of Packet Error Check is enabled and FMPSMBUS Peripheral is set in Slave mode */
375 if ((hfmpsmbus->Init.PacketErrorCheckMode == FMPSMBUS_PEC_ENABLE)
376 && ((hfmpsmbus->Init.PeripheralMode == FMPSMBUS_PERIPHERAL_MODE_FMPSMBUS_SLAVE) || (hfmpsmbus->Init.PeripheralMode == FMPSMBUS_PERIPHERAL_MODE_FMPSMBUS_SLAVE_ARP)))
377 {
378 hfmpsmbus->Instance->CR1 |= FMPI2C_CR1_SBC;
379 }
380
381 /* Enable the selected FMPSMBUS peripheral */
382 __HAL_FMPSMBUS_ENABLE(hfmpsmbus);
383
384 hfmpsmbus->ErrorCode = HAL_FMPSMBUS_ERROR_NONE;
385 hfmpsmbus->PreviousState = HAL_FMPSMBUS_STATE_READY;
386 hfmpsmbus->State = HAL_FMPSMBUS_STATE_READY;
387
388 return HAL_OK;
389}
390
391/**
392 * @brief DeInitialize the FMPSMBUS peripheral.
393 * @param hfmpsmbus Pointer to a FMPSMBUS_HandleTypeDef structure that contains
394 * the configuration information for the specified FMPSMBUS.
395 * @retval HAL status
396 */
397HAL_StatusTypeDef HAL_FMPSMBUS_DeInit(FMPSMBUS_HandleTypeDef *hfmpsmbus)
398{
399 /* Check the FMPSMBUS handle allocation */
400 if (hfmpsmbus == NULL)
401 {
402 return HAL_ERROR;
403 }
404
405 /* Check the parameters */
406 assert_param(IS_FMPSMBUS_ALL_INSTANCE(hfmpsmbus->Instance));
407
408 hfmpsmbus->State = HAL_FMPSMBUS_STATE_BUSY;
409
410 /* Disable the FMPSMBUS Peripheral Clock */
411 __HAL_FMPSMBUS_DISABLE(hfmpsmbus);
412
413#if (USE_HAL_FMPSMBUS_REGISTER_CALLBACKS == 1)
414 if (hfmpsmbus->MspDeInitCallback == NULL)
415 {
416 hfmpsmbus->MspDeInitCallback = HAL_FMPSMBUS_MspDeInit; /* Legacy weak MspDeInit */
417 }
418
419 /* DeInit the low level hardware: GPIO, CLOCK, NVIC */
420 hfmpsmbus->MspDeInitCallback(hfmpsmbus);
421#else
422 /* DeInit the low level hardware: GPIO, CLOCK, NVIC */
423 HAL_FMPSMBUS_MspDeInit(hfmpsmbus);
424#endif /* USE_HAL_FMPSMBUS_REGISTER_CALLBACKS */
425
426 hfmpsmbus->ErrorCode = HAL_FMPSMBUS_ERROR_NONE;
427 hfmpsmbus->PreviousState = HAL_FMPSMBUS_STATE_RESET;
428 hfmpsmbus->State = HAL_FMPSMBUS_STATE_RESET;
429
430 /* Release Lock */
431 __HAL_UNLOCK(hfmpsmbus);
432
433 return HAL_OK;
434}
435
436/**
437 * @brief Initialize the FMPSMBUS MSP.
438 * @param hfmpsmbus Pointer to a FMPSMBUS_HandleTypeDef structure that contains
439 * the configuration information for the specified FMPSMBUS.
440 * @retval None
441 */
442__weak void HAL_FMPSMBUS_MspInit(FMPSMBUS_HandleTypeDef *hfmpsmbus)
443{
444 /* Prevent unused argument(s) compilation warning */
445 UNUSED(hfmpsmbus);
446
447 /* NOTE : This function should not be modified, when the callback is needed,
448 the HAL_FMPSMBUS_MspInit could be implemented in the user file
449 */
450}
451
452/**
453 * @brief DeInitialize the FMPSMBUS MSP.
454 * @param hfmpsmbus Pointer to a FMPSMBUS_HandleTypeDef structure that contains
455 * the configuration information for the specified FMPSMBUS.
456 * @retval None
457 */
458__weak void HAL_FMPSMBUS_MspDeInit(FMPSMBUS_HandleTypeDef *hfmpsmbus)
459{
460 /* Prevent unused argument(s) compilation warning */
461 UNUSED(hfmpsmbus);
462
463 /* NOTE : This function should not be modified, when the callback is needed,
464 the HAL_FMPSMBUS_MspDeInit could be implemented in the user file
465 */
466}
467
468/**
469 * @brief Configure Analog noise filter.
470 * @param hfmpsmbus Pointer to a FMPSMBUS_HandleTypeDef structure that contains
471 * the configuration information for the specified FMPSMBUS.
472 * @param AnalogFilter This parameter can be one of the following values:
473 * @arg @ref FMPSMBUS_ANALOGFILTER_ENABLE
474 * @arg @ref FMPSMBUS_ANALOGFILTER_DISABLE
475 * @retval HAL status
476 */
477HAL_StatusTypeDef HAL_FMPSMBUS_ConfigAnalogFilter(FMPSMBUS_HandleTypeDef *hfmpsmbus, uint32_t AnalogFilter)
478{
479 /* Check the parameters */
480 assert_param(IS_FMPSMBUS_ALL_INSTANCE(hfmpsmbus->Instance));
481 assert_param(IS_FMPSMBUS_ANALOG_FILTER(AnalogFilter));
482
483 if (hfmpsmbus->State == HAL_FMPSMBUS_STATE_READY)
484 {
485 /* Process Locked */
486 __HAL_LOCK(hfmpsmbus);
487
488 hfmpsmbus->State = HAL_FMPSMBUS_STATE_BUSY;
489
490 /* Disable the selected FMPSMBUS peripheral */
491 __HAL_FMPSMBUS_DISABLE(hfmpsmbus);
492
493 /* Reset ANOFF bit */
494 hfmpsmbus->Instance->CR1 &= ~(FMPI2C_CR1_ANFOFF);
495
496 /* Set analog filter bit*/
497 hfmpsmbus->Instance->CR1 |= AnalogFilter;
498
499 __HAL_FMPSMBUS_ENABLE(hfmpsmbus);
500
501 hfmpsmbus->State = HAL_FMPSMBUS_STATE_READY;
502
503 /* Process Unlocked */
504 __HAL_UNLOCK(hfmpsmbus);
505
506 return HAL_OK;
507 }
508 else
509 {
510 return HAL_BUSY;
511 }
512}
513
514/**
515 * @brief Configure Digital noise filter.
516 * @param hfmpsmbus Pointer to a FMPSMBUS_HandleTypeDef structure that contains
517 * the configuration information for the specified FMPSMBUS.
518 * @param DigitalFilter Coefficient of digital noise filter between Min_Data=0x00 and Max_Data=0x0F.
519 * @retval HAL status
520 */
521HAL_StatusTypeDef HAL_FMPSMBUS_ConfigDigitalFilter(FMPSMBUS_HandleTypeDef *hfmpsmbus, uint32_t DigitalFilter)
522{
523 uint32_t tmpreg;
524
525 /* Check the parameters */
526 assert_param(IS_FMPSMBUS_ALL_INSTANCE(hfmpsmbus->Instance));
527 assert_param(IS_FMPSMBUS_DIGITAL_FILTER(DigitalFilter));
528
529 if (hfmpsmbus->State == HAL_FMPSMBUS_STATE_READY)
530 {
531 /* Process Locked */
532 __HAL_LOCK(hfmpsmbus);
533
534 hfmpsmbus->State = HAL_FMPSMBUS_STATE_BUSY;
535
536 /* Disable the selected FMPSMBUS peripheral */
537 __HAL_FMPSMBUS_DISABLE(hfmpsmbus);
538
539 /* Get the old register value */
540 tmpreg = hfmpsmbus->Instance->CR1;
541
542 /* Reset FMPI2C DNF bits [11:8] */
543 tmpreg &= ~(FMPI2C_CR1_DNF);
544
545 /* Set FMPI2Cx DNF coefficient */
546 tmpreg |= DigitalFilter << FMPI2C_CR1_DNF_Pos;
547
548 /* Store the new register value */
549 hfmpsmbus->Instance->CR1 = tmpreg;
550
551 __HAL_FMPSMBUS_ENABLE(hfmpsmbus);
552
553 hfmpsmbus->State = HAL_FMPSMBUS_STATE_READY;
554
555 /* Process Unlocked */
556 __HAL_UNLOCK(hfmpsmbus);
557
558 return HAL_OK;
559 }
560 else
561 {
562 return HAL_BUSY;
563 }
564}
565
566#if (USE_HAL_FMPSMBUS_REGISTER_CALLBACKS == 1)
567/**
568 * @brief Register a User FMPSMBUS Callback
569 * To be used instead of the weak predefined callback
570 * @param hfmpsmbus Pointer to a FMPSMBUS_HandleTypeDef structure that contains
571 * the configuration information for the specified FMPSMBUS.
572 * @param CallbackID ID of the callback to be registered
573 * This parameter can be one of the following values:
574 * @arg @ref HAL_FMPSMBUS_MASTER_TX_COMPLETE_CB_ID Master Tx Transfer completed callback ID
575 * @arg @ref HAL_FMPSMBUS_MASTER_RX_COMPLETE_CB_ID Master Rx Transfer completed callback ID
576 * @arg @ref HAL_FMPSMBUS_SLAVE_TX_COMPLETE_CB_ID Slave Tx Transfer completed callback ID
577 * @arg @ref HAL_FMPSMBUS_SLAVE_RX_COMPLETE_CB_ID Slave Rx Transfer completed callback ID
578 * @arg @ref HAL_FMPSMBUS_LISTEN_COMPLETE_CB_ID Listen Complete callback ID
579 * @arg @ref HAL_FMPSMBUS_ERROR_CB_ID Error callback ID
580 * @arg @ref HAL_FMPSMBUS_MSPINIT_CB_ID MspInit callback ID
581 * @arg @ref HAL_FMPSMBUS_MSPDEINIT_CB_ID MspDeInit callback ID
582 * @param pCallback pointer to the Callback function
583 * @retval HAL status
584 */
585HAL_StatusTypeDef HAL_FMPSMBUS_RegisterCallback(FMPSMBUS_HandleTypeDef *hfmpsmbus, HAL_FMPSMBUS_CallbackIDTypeDef CallbackID,
586 pFMPSMBUS_CallbackTypeDef pCallback)
587{
588 HAL_StatusTypeDef status = HAL_OK;
589
590 if (pCallback == NULL)
591 {
592 /* Update the error code */
593 hfmpsmbus->ErrorCode |= HAL_FMPSMBUS_ERROR_INVALID_CALLBACK;
594
595 return HAL_ERROR;
596 }
597
598 /* Process locked */
599 __HAL_LOCK(hfmpsmbus);
600
601 if (HAL_FMPSMBUS_STATE_READY == hfmpsmbus->State)
602 {
603 switch (CallbackID)
604 {
605 case HAL_FMPSMBUS_MASTER_TX_COMPLETE_CB_ID :
606 hfmpsmbus->MasterTxCpltCallback = pCallback;
607 break;
608
609 case HAL_FMPSMBUS_MASTER_RX_COMPLETE_CB_ID :
610 hfmpsmbus->MasterRxCpltCallback = pCallback;
611 break;
612
613 case HAL_FMPSMBUS_SLAVE_TX_COMPLETE_CB_ID :
614 hfmpsmbus->SlaveTxCpltCallback = pCallback;
615 break;
616
617 case HAL_FMPSMBUS_SLAVE_RX_COMPLETE_CB_ID :
618 hfmpsmbus->SlaveRxCpltCallback = pCallback;
619 break;
620
621 case HAL_FMPSMBUS_LISTEN_COMPLETE_CB_ID :
622 hfmpsmbus->ListenCpltCallback = pCallback;
623 break;
624
625 case HAL_FMPSMBUS_ERROR_CB_ID :
626 hfmpsmbus->ErrorCallback = pCallback;
627 break;
628
629 case HAL_FMPSMBUS_MSPINIT_CB_ID :
630 hfmpsmbus->MspInitCallback = pCallback;
631 break;
632
633 case HAL_FMPSMBUS_MSPDEINIT_CB_ID :
634 hfmpsmbus->MspDeInitCallback = pCallback;
635 break;
636
637 default :
638 /* Update the error code */
639 hfmpsmbus->ErrorCode |= HAL_FMPSMBUS_ERROR_INVALID_CALLBACK;
640
641 /* Return error status */
642 status = HAL_ERROR;
643 break;
644 }
645 }
646 else if (HAL_FMPSMBUS_STATE_RESET == hfmpsmbus->State)
647 {
648 switch (CallbackID)
649 {
650 case HAL_FMPSMBUS_MSPINIT_CB_ID :
651 hfmpsmbus->MspInitCallback = pCallback;
652 break;
653
654 case HAL_FMPSMBUS_MSPDEINIT_CB_ID :
655 hfmpsmbus->MspDeInitCallback = pCallback;
656 break;
657
658 default :
659 /* Update the error code */
660 hfmpsmbus->ErrorCode |= HAL_FMPSMBUS_ERROR_INVALID_CALLBACK;
661
662 /* Return error status */
663 status = HAL_ERROR;
664 break;
665 }
666 }
667 else
668 {
669 /* Update the error code */
670 hfmpsmbus->ErrorCode |= HAL_FMPSMBUS_ERROR_INVALID_CALLBACK;
671
672 /* Return error status */
673 status = HAL_ERROR;
674 }
675
676 /* Release Lock */
677 __HAL_UNLOCK(hfmpsmbus);
678 return status;
679}
680
681/**
682 * @brief Unregister an FMPSMBUS Callback
683 * FMPSMBUS callback is redirected to the weak predefined callback
684 * @param hfmpsmbus Pointer to a FMPSMBUS_HandleTypeDef structure that contains
685 * the configuration information for the specified FMPSMBUS.
686 * @param CallbackID ID of the callback to be unregistered
687 * This parameter can be one of the following values:
688 * This parameter can be one of the following values:
689 * @arg @ref HAL_FMPSMBUS_MASTER_TX_COMPLETE_CB_ID Master Tx Transfer completed callback ID
690 * @arg @ref HAL_FMPSMBUS_MASTER_RX_COMPLETE_CB_ID Master Rx Transfer completed callback ID
691 * @arg @ref HAL_FMPSMBUS_SLAVE_TX_COMPLETE_CB_ID Slave Tx Transfer completed callback ID
692 * @arg @ref HAL_FMPSMBUS_SLAVE_RX_COMPLETE_CB_ID Slave Rx Transfer completed callback ID
693 * @arg @ref HAL_FMPSMBUS_LISTEN_COMPLETE_CB_ID Listen Complete callback ID
694 * @arg @ref HAL_FMPSMBUS_ERROR_CB_ID Error callback ID
695 * @arg @ref HAL_FMPSMBUS_MSPINIT_CB_ID MspInit callback ID
696 * @arg @ref HAL_FMPSMBUS_MSPDEINIT_CB_ID MspDeInit callback ID
697 * @retval HAL status
698 */
699HAL_StatusTypeDef HAL_FMPSMBUS_UnRegisterCallback(FMPSMBUS_HandleTypeDef *hfmpsmbus, HAL_FMPSMBUS_CallbackIDTypeDef CallbackID)
700{
701 HAL_StatusTypeDef status = HAL_OK;
702
703 /* Process locked */
704 __HAL_LOCK(hfmpsmbus);
705
706 if (HAL_FMPSMBUS_STATE_READY == hfmpsmbus->State)
707 {
708 switch (CallbackID)
709 {
710 case HAL_FMPSMBUS_MASTER_TX_COMPLETE_CB_ID :
711 hfmpsmbus->MasterTxCpltCallback = HAL_FMPSMBUS_MasterTxCpltCallback; /* Legacy weak MasterTxCpltCallback */
712 break;
713
714 case HAL_FMPSMBUS_MASTER_RX_COMPLETE_CB_ID :
715 hfmpsmbus->MasterRxCpltCallback = HAL_FMPSMBUS_MasterRxCpltCallback; /* Legacy weak MasterRxCpltCallback */
716 break;
717
718 case HAL_FMPSMBUS_SLAVE_TX_COMPLETE_CB_ID :
719 hfmpsmbus->SlaveTxCpltCallback = HAL_FMPSMBUS_SlaveTxCpltCallback; /* Legacy weak SlaveTxCpltCallback */
720 break;
721
722 case HAL_FMPSMBUS_SLAVE_RX_COMPLETE_CB_ID :
723 hfmpsmbus->SlaveRxCpltCallback = HAL_FMPSMBUS_SlaveRxCpltCallback; /* Legacy weak SlaveRxCpltCallback */
724 break;
725
726 case HAL_FMPSMBUS_LISTEN_COMPLETE_CB_ID :
727 hfmpsmbus->ListenCpltCallback = HAL_FMPSMBUS_ListenCpltCallback; /* Legacy weak ListenCpltCallback */
728 break;
729
730 case HAL_FMPSMBUS_ERROR_CB_ID :
731 hfmpsmbus->ErrorCallback = HAL_FMPSMBUS_ErrorCallback; /* Legacy weak ErrorCallback */
732 break;
733
734 case HAL_FMPSMBUS_MSPINIT_CB_ID :
735 hfmpsmbus->MspInitCallback = HAL_FMPSMBUS_MspInit; /* Legacy weak MspInit */
736 break;
737
738 case HAL_FMPSMBUS_MSPDEINIT_CB_ID :
739 hfmpsmbus->MspDeInitCallback = HAL_FMPSMBUS_MspDeInit; /* Legacy weak MspDeInit */
740 break;
741
742 default :
743 /* Update the error code */
744 hfmpsmbus->ErrorCode |= HAL_FMPSMBUS_ERROR_INVALID_CALLBACK;
745
746 /* Return error status */
747 status = HAL_ERROR;
748 break;
749 }
750 }
751 else if (HAL_FMPSMBUS_STATE_RESET == hfmpsmbus->State)
752 {
753 switch (CallbackID)
754 {
755 case HAL_FMPSMBUS_MSPINIT_CB_ID :
756 hfmpsmbus->MspInitCallback = HAL_FMPSMBUS_MspInit; /* Legacy weak MspInit */
757 break;
758
759 case HAL_FMPSMBUS_MSPDEINIT_CB_ID :
760 hfmpsmbus->MspDeInitCallback = HAL_FMPSMBUS_MspDeInit; /* Legacy weak MspDeInit */
761 break;
762
763 default :
764 /* Update the error code */
765 hfmpsmbus->ErrorCode |= HAL_FMPSMBUS_ERROR_INVALID_CALLBACK;
766
767 /* Return error status */
768 status = HAL_ERROR;
769 break;
770 }
771 }
772 else
773 {
774 /* Update the error code */
775 hfmpsmbus->ErrorCode |= HAL_FMPSMBUS_ERROR_INVALID_CALLBACK;
776
777 /* Return error status */
778 status = HAL_ERROR;
779 }
780
781 /* Release Lock */
782 __HAL_UNLOCK(hfmpsmbus);
783 return status;
784}
785
786/**
787 * @brief Register the Slave Address Match FMPSMBUS Callback
788 * To be used instead of the weak HAL_FMPSMBUS_AddrCallback() predefined callback
789 * @param hfmpsmbus Pointer to a FMPSMBUS_HandleTypeDef structure that contains
790 * the configuration information for the specified FMPSMBUS.
791 * @param pCallback pointer to the Address Match Callback function
792 * @retval HAL status
793 */
794HAL_StatusTypeDef HAL_FMPSMBUS_RegisterAddrCallback(FMPSMBUS_HandleTypeDef *hfmpsmbus, pFMPSMBUS_AddrCallbackTypeDef pCallback)
795{
796 HAL_StatusTypeDef status = HAL_OK;
797
798 if (pCallback == NULL)
799 {
800 /* Update the error code */
801 hfmpsmbus->ErrorCode |= HAL_FMPSMBUS_ERROR_INVALID_CALLBACK;
802
803 return HAL_ERROR;
804 }
805 /* Process locked */
806 __HAL_LOCK(hfmpsmbus);
807
808 if (HAL_FMPSMBUS_STATE_READY == hfmpsmbus->State)
809 {
810 hfmpsmbus->AddrCallback = pCallback;
811 }
812 else
813 {
814 /* Update the error code */
815 hfmpsmbus->ErrorCode |= HAL_FMPSMBUS_ERROR_INVALID_CALLBACK;
816
817 /* Return error status */
818 status = HAL_ERROR;
819 }
820
821 /* Release Lock */
822 __HAL_UNLOCK(hfmpsmbus);
823 return status;
824}
825
826/**
827 * @brief UnRegister the Slave Address Match FMPSMBUS Callback
828 * Info Ready FMPSMBUS Callback is redirected to the weak HAL_FMPSMBUS_AddrCallback() predefined callback
829 * @param hfmpsmbus Pointer to a FMPSMBUS_HandleTypeDef structure that contains
830 * the configuration information for the specified FMPSMBUS.
831 * @retval HAL status
832 */
833HAL_StatusTypeDef HAL_FMPSMBUS_UnRegisterAddrCallback(FMPSMBUS_HandleTypeDef *hfmpsmbus)
834{
835 HAL_StatusTypeDef status = HAL_OK;
836
837 /* Process locked */
838 __HAL_LOCK(hfmpsmbus);
839
840 if (HAL_FMPSMBUS_STATE_READY == hfmpsmbus->State)
841 {
842 hfmpsmbus->AddrCallback = HAL_FMPSMBUS_AddrCallback; /* Legacy weak AddrCallback */
843 }
844 else
845 {
846 /* Update the error code */
847 hfmpsmbus->ErrorCode |= HAL_FMPSMBUS_ERROR_INVALID_CALLBACK;
848
849 /* Return error status */
850 status = HAL_ERROR;
851 }
852
853 /* Release Lock */
854 __HAL_UNLOCK(hfmpsmbus);
855 return status;
856}
857
858#endif /* USE_HAL_FMPSMBUS_REGISTER_CALLBACKS */
859
860/**
861 * @}
862 */
863
864/** @defgroup FMPSMBUS_Exported_Functions_Group2 Input and Output operation functions
865 * @brief Data transfers functions
866 *
867@verbatim
868 ===============================================================================
869 ##### IO operation functions #####
870 ===============================================================================
871 [..]
872 This subsection provides a set of functions allowing to manage the FMPSMBUS data
873 transfers.
874
875 (#) Blocking mode function to check if device is ready for usage is :
876 (++) HAL_FMPSMBUS_IsDeviceReady()
877
878 (#) There is only one mode of transfer:
879 (++) Non-Blocking mode : The communication is performed using Interrupts.
880 These functions return the status of the transfer startup.
881 The end of the data processing will be indicated through the
882 dedicated FMPSMBUS IRQ when using Interrupt mode.
883
884 (#) Non-Blocking mode functions with Interrupt are :
885 (++) HAL_FMPSMBUS_Master_Transmit_IT()
886 (++) HAL_FMPSMBUS_Master_Receive_IT()
887 (++) HAL_FMPSMBUS_Slave_Transmit_IT()
888 (++) HAL_FMPSMBUS_Slave_Receive_IT()
889 (++) HAL_FMPSMBUS_EnableListen_IT() or alias HAL_FMPSMBUS_EnableListen_IT()
890 (++) HAL_FMPSMBUS_DisableListen_IT()
891 (++) HAL_FMPSMBUS_EnableAlert_IT()
892 (++) HAL_FMPSMBUS_DisableAlert_IT()
893
894 (#) A set of Transfer Complete Callbacks are provided in non-Blocking mode:
895 (++) HAL_FMPSMBUS_MasterTxCpltCallback()
896 (++) HAL_FMPSMBUS_MasterRxCpltCallback()
897 (++) HAL_FMPSMBUS_SlaveTxCpltCallback()
898 (++) HAL_FMPSMBUS_SlaveRxCpltCallback()
899 (++) HAL_FMPSMBUS_AddrCallback()
900 (++) HAL_FMPSMBUS_ListenCpltCallback()
901 (++) HAL_FMPSMBUS_ErrorCallback()
902
903@endverbatim
904 * @{
905 */
906
907/**
908 * @brief Transmit in master/host FMPSMBUS mode an amount of data in non-blocking mode with Interrupt.
909 * @param hfmpsmbus Pointer to a FMPSMBUS_HandleTypeDef structure that contains
910 * the configuration information for the specified FMPSMBUS.
911 * @param DevAddress Target device address: The device 7 bits address value
912 * in datasheet must be shifted to the left before calling the interface
913 * @param pData Pointer to data buffer
914 * @param Size Amount of data to be sent
915 * @param XferOptions Options of Transfer, value of @ref FMPSMBUS_XferOptions_definition
916 * @retval HAL status
917 */
918HAL_StatusTypeDef HAL_FMPSMBUS_Master_Transmit_IT(FMPSMBUS_HandleTypeDef *hfmpsmbus, uint16_t DevAddress, uint8_t *pData,
919 uint16_t Size, uint32_t XferOptions)
920{
921 uint32_t tmp;
922
923 /* Check the parameters */
924 assert_param(IS_FMPSMBUS_TRANSFER_OPTIONS_REQUEST(XferOptions));
925
926 if (hfmpsmbus->State == HAL_FMPSMBUS_STATE_READY)
927 {
928 /* Process Locked */
929 __HAL_LOCK(hfmpsmbus);
930
931 hfmpsmbus->State = HAL_FMPSMBUS_STATE_MASTER_BUSY_TX;
932 hfmpsmbus->ErrorCode = HAL_FMPSMBUS_ERROR_NONE;
933 /* Prepare transfer parameters */
934 hfmpsmbus->pBuffPtr = pData;
935 hfmpsmbus->XferCount = Size;
936 hfmpsmbus->XferOptions = XferOptions;
937
938 /* In case of Quick command, remove autoend mode */
939 /* Manage the stop generation by software */
940 if (hfmpsmbus->pBuffPtr == NULL)
941 {
942 hfmpsmbus->XferOptions &= ~FMPSMBUS_AUTOEND_MODE;
943 }
944
945 if (Size > MAX_NBYTE_SIZE)
946 {
947 hfmpsmbus->XferSize = MAX_NBYTE_SIZE;
948 }
949 else
950 {
951 hfmpsmbus->XferSize = Size;
952 }
953
954 /* Send Slave Address */
955 /* Set NBYTES to write and reload if size > MAX_NBYTE_SIZE and generate RESTART */
956 if ((hfmpsmbus->XferSize < hfmpsmbus->XferCount) && (hfmpsmbus->XferSize == MAX_NBYTE_SIZE))
957 {
958 FMPSMBUS_TransferConfig(hfmpsmbus, DevAddress, (uint8_t)hfmpsmbus->XferSize,
959 FMPSMBUS_RELOAD_MODE | (hfmpsmbus->XferOptions & FMPSMBUS_SENDPEC_MODE), FMPSMBUS_GENERATE_START_WRITE);
960 }
961 else
962 {
963 /* If transfer direction not change, do not generate Restart Condition */
964 /* Mean Previous state is same as current state */
965
966 /* Store current volatile XferOptions, misra rule */
967 tmp = hfmpsmbus->XferOptions;
968
969 if ((hfmpsmbus->PreviousState == HAL_FMPSMBUS_STATE_MASTER_BUSY_TX) && (IS_FMPSMBUS_TRANSFER_OTHER_OPTIONS_REQUEST(tmp) == 0))
970 {
971 FMPSMBUS_TransferConfig(hfmpsmbus, DevAddress, (uint8_t)hfmpsmbus->XferSize, hfmpsmbus->XferOptions, FMPSMBUS_NO_STARTSTOP);
972 }
973 /* Else transfer direction change, so generate Restart with new transfer direction */
974 else
975 {
976 /* Convert OTHER_xxx XferOptions if any */
977 FMPSMBUS_ConvertOtherXferOptions(hfmpsmbus);
978
979 /* Handle Transfer */
980 FMPSMBUS_TransferConfig(hfmpsmbus, DevAddress, (uint8_t)hfmpsmbus->XferSize, hfmpsmbus->XferOptions, FMPSMBUS_GENERATE_START_WRITE);
981 }
982
983 /* If PEC mode is enable, size to transmit manage by SW part should be Size-1 byte, corresponding to PEC byte */
984 /* PEC byte is automatically sent by HW block, no need to manage it in Transmit process */
985 if (FMPSMBUS_GET_PEC_MODE(hfmpsmbus) != 0UL)
986 {
987 hfmpsmbus->XferSize--;
988 hfmpsmbus->XferCount--;
989 }
990 }
991
992 /* Process Unlocked */
993 __HAL_UNLOCK(hfmpsmbus);
994
995 /* Note : The FMPSMBUS interrupts must be enabled after unlocking current process
996 to avoid the risk of FMPSMBUS interrupt handle execution before current
997 process unlock */
998 FMPSMBUS_Enable_IRQ(hfmpsmbus, FMPSMBUS_IT_TX);
999
1000 return HAL_OK;
1001 }
1002 else
1003 {
1004 return HAL_BUSY;
1005 }
1006}
1007
1008/**
1009 * @brief Receive in master/host FMPSMBUS mode an amount of data in non-blocking mode with Interrupt.
1010 * @param hfmpsmbus Pointer to a FMPSMBUS_HandleTypeDef structure that contains
1011 * the configuration information for the specified FMPSMBUS.
1012 * @param DevAddress Target device address: The device 7 bits address value
1013 * in datasheet must be shifted to the left before calling the interface
1014 * @param pData Pointer to data buffer
1015 * @param Size Amount of data to be sent
1016 * @param XferOptions Options of Transfer, value of @ref FMPSMBUS_XferOptions_definition
1017 * @retval HAL status
1018 */
1019HAL_StatusTypeDef HAL_FMPSMBUS_Master_Receive_IT(FMPSMBUS_HandleTypeDef *hfmpsmbus, uint16_t DevAddress, uint8_t *pData,
1020 uint16_t Size, uint32_t XferOptions)
1021{
1022 uint32_t tmp;
1023
1024 /* Check the parameters */
1025 assert_param(IS_FMPSMBUS_TRANSFER_OPTIONS_REQUEST(XferOptions));
1026
1027 if (hfmpsmbus->State == HAL_FMPSMBUS_STATE_READY)
1028 {
1029 /* Process Locked */
1030 __HAL_LOCK(hfmpsmbus);
1031
1032 hfmpsmbus->State = HAL_FMPSMBUS_STATE_MASTER_BUSY_RX;
1033 hfmpsmbus->ErrorCode = HAL_FMPSMBUS_ERROR_NONE;
1034
1035 /* Prepare transfer parameters */
1036 hfmpsmbus->pBuffPtr = pData;
1037 hfmpsmbus->XferCount = Size;
1038 hfmpsmbus->XferOptions = XferOptions;
1039
1040 /* In case of Quick command, remove autoend mode */
1041 /* Manage the stop generation by software */
1042 if (hfmpsmbus->pBuffPtr == NULL)
1043 {
1044 hfmpsmbus->XferOptions &= ~FMPSMBUS_AUTOEND_MODE;
1045 }
1046
1047 if (Size > MAX_NBYTE_SIZE)
1048 {
1049 hfmpsmbus->XferSize = MAX_NBYTE_SIZE;
1050 }
1051 else
1052 {
1053 hfmpsmbus->XferSize = Size;
1054 }
1055
1056 /* Send Slave Address */
1057 /* Set NBYTES to write and reload if size > MAX_NBYTE_SIZE and generate RESTART */
1058 if ((hfmpsmbus->XferSize < hfmpsmbus->XferCount) && (hfmpsmbus->XferSize == MAX_NBYTE_SIZE))
1059 {
1060 FMPSMBUS_TransferConfig(hfmpsmbus, DevAddress, (uint8_t)hfmpsmbus->XferSize,
1061 FMPSMBUS_RELOAD_MODE | (hfmpsmbus->XferOptions & FMPSMBUS_SENDPEC_MODE), FMPSMBUS_GENERATE_START_READ);
1062 }
1063 else
1064 {
1065 /* If transfer direction not change, do not generate Restart Condition */
1066 /* Mean Previous state is same as current state */
1067
1068 /* Store current volatile XferOptions, Misra rule */
1069 tmp = hfmpsmbus->XferOptions;
1070
1071 if ((hfmpsmbus->PreviousState == HAL_FMPSMBUS_STATE_MASTER_BUSY_RX) && (IS_FMPSMBUS_TRANSFER_OTHER_OPTIONS_REQUEST(tmp) == 0))
1072 {
1073 FMPSMBUS_TransferConfig(hfmpsmbus, DevAddress, (uint8_t)hfmpsmbus->XferSize, hfmpsmbus->XferOptions, FMPSMBUS_NO_STARTSTOP);
1074 }
1075 /* Else transfer direction change, so generate Restart with new transfer direction */
1076 else
1077 {
1078 /* Convert OTHER_xxx XferOptions if any */
1079 FMPSMBUS_ConvertOtherXferOptions(hfmpsmbus);
1080
1081 /* Handle Transfer */
1082 FMPSMBUS_TransferConfig(hfmpsmbus, DevAddress, (uint8_t)hfmpsmbus->XferSize, hfmpsmbus->XferOptions, FMPSMBUS_GENERATE_START_READ);
1083 }
1084 }
1085
1086 /* Process Unlocked */
1087 __HAL_UNLOCK(hfmpsmbus);
1088
1089 /* Note : The FMPSMBUS interrupts must be enabled after unlocking current process
1090 to avoid the risk of FMPSMBUS interrupt handle execution before current
1091 process unlock */
1092 FMPSMBUS_Enable_IRQ(hfmpsmbus, FMPSMBUS_IT_RX);
1093
1094 return HAL_OK;
1095 }
1096 else
1097 {
1098 return HAL_BUSY;
1099 }
1100}
1101
1102/**
1103 * @brief Abort a master/host FMPSMBUS process communication with Interrupt.
1104 * @note This abort can be called only if state is ready
1105 * @param hfmpsmbus Pointer to a FMPSMBUS_HandleTypeDef structure that contains
1106 * the configuration information for the specified FMPSMBUS.
1107 * @param DevAddress Target device address: The device 7 bits address value
1108 * in datasheet must be shifted to the left before calling the interface
1109 * @retval HAL status
1110 */
1111HAL_StatusTypeDef HAL_FMPSMBUS_Master_Abort_IT(FMPSMBUS_HandleTypeDef *hfmpsmbus, uint16_t DevAddress)
1112{
1113 if (hfmpsmbus->State == HAL_FMPSMBUS_STATE_READY)
1114 {
1115 /* Process Locked */
1116 __HAL_LOCK(hfmpsmbus);
1117
1118 /* Keep the same state as previous */
1119 /* to perform as well the call of the corresponding end of transfer callback */
1120 if (hfmpsmbus->PreviousState == HAL_FMPSMBUS_STATE_MASTER_BUSY_TX)
1121 {
1122 hfmpsmbus->State = HAL_FMPSMBUS_STATE_MASTER_BUSY_TX;
1123 }
1124 else if (hfmpsmbus->PreviousState == HAL_FMPSMBUS_STATE_MASTER_BUSY_RX)
1125 {
1126 hfmpsmbus->State = HAL_FMPSMBUS_STATE_MASTER_BUSY_RX;
1127 }
1128 else
1129 {
1130 /* Wrong usage of abort function */
1131 /* This function should be used only in case of abort monitored by master device */
1132 return HAL_ERROR;
1133 }
1134 hfmpsmbus->ErrorCode = HAL_FMPSMBUS_ERROR_NONE;
1135
1136 /* Set NBYTES to 1 to generate a dummy read on FMPSMBUS peripheral */
1137 /* Set AUTOEND mode, this will generate a NACK then STOP condition to abort the current transfer */
1138 FMPSMBUS_TransferConfig(hfmpsmbus, DevAddress, 1, FMPSMBUS_AUTOEND_MODE, FMPSMBUS_NO_STARTSTOP);
1139
1140 /* Process Unlocked */
1141 __HAL_UNLOCK(hfmpsmbus);
1142
1143 /* Note : The FMPSMBUS interrupts must be enabled after unlocking current process
1144 to avoid the risk of FMPSMBUS interrupt handle execution before current
1145 process unlock */
1146 if (hfmpsmbus->State == HAL_FMPSMBUS_STATE_MASTER_BUSY_TX)
1147 {
1148 FMPSMBUS_Enable_IRQ(hfmpsmbus, FMPSMBUS_IT_TX);
1149 }
1150 else if (hfmpsmbus->State == HAL_FMPSMBUS_STATE_MASTER_BUSY_RX)
1151 {
1152 FMPSMBUS_Enable_IRQ(hfmpsmbus, FMPSMBUS_IT_RX);
1153 }
1154 else
1155 {
1156 /* Nothing to do */
1157 }
1158
1159 return HAL_OK;
1160 }
1161 else
1162 {
1163 return HAL_BUSY;
1164 }
1165}
1166
1167/**
1168 * @brief Transmit in slave/device FMPSMBUS mode an amount of data in non-blocking mode with Interrupt.
1169 * @param hfmpsmbus Pointer to a FMPSMBUS_HandleTypeDef structure that contains
1170 * the configuration information for the specified FMPSMBUS.
1171 * @param pData Pointer to data buffer
1172 * @param Size Amount of data to be sent
1173 * @param XferOptions Options of Transfer, value of @ref FMPSMBUS_XferOptions_definition
1174 * @retval HAL status
1175 */
1176HAL_StatusTypeDef HAL_FMPSMBUS_Slave_Transmit_IT(FMPSMBUS_HandleTypeDef *hfmpsmbus, uint8_t *pData, uint16_t Size,
1177 uint32_t XferOptions)
1178{
1179 /* Check the parameters */
1180 assert_param(IS_FMPSMBUS_TRANSFER_OPTIONS_REQUEST(XferOptions));
1181
1182 if ((hfmpsmbus->State & HAL_FMPSMBUS_STATE_LISTEN) == HAL_FMPSMBUS_STATE_LISTEN)
1183 {
1184 if ((pData == NULL) || (Size == 0UL))
1185 {
1186 hfmpsmbus->ErrorCode = HAL_FMPSMBUS_ERROR_INVALID_PARAM;
1187 return HAL_ERROR;
1188 }
1189
1190 /* Disable Interrupts, to prevent preemption during treatment in case of multicall */
1191 FMPSMBUS_Disable_IRQ(hfmpsmbus, FMPSMBUS_IT_ADDR | FMPSMBUS_IT_TX);
1192
1193 /* Process Locked */
1194 __HAL_LOCK(hfmpsmbus);
1195
1196 hfmpsmbus->State = (HAL_FMPSMBUS_STATE_SLAVE_BUSY_TX | HAL_FMPSMBUS_STATE_LISTEN);
1197 hfmpsmbus->ErrorCode = HAL_FMPSMBUS_ERROR_NONE;
1198
1199 /* Set SBC bit to manage Acknowledge at each bit */
1200 hfmpsmbus->Instance->CR1 |= FMPI2C_CR1_SBC;
1201
1202 /* Enable Address Acknowledge */
1203 hfmpsmbus->Instance->CR2 &= ~FMPI2C_CR2_NACK;
1204
1205 /* Prepare transfer parameters */
1206 hfmpsmbus->pBuffPtr = pData;
1207 hfmpsmbus->XferCount = Size;
1208 hfmpsmbus->XferOptions = XferOptions;
1209
1210 /* Convert OTHER_xxx XferOptions if any */
1211 FMPSMBUS_ConvertOtherXferOptions(hfmpsmbus);
1212
1213 if (Size > MAX_NBYTE_SIZE)
1214 {
1215 hfmpsmbus->XferSize = MAX_NBYTE_SIZE;
1216 }
1217 else
1218 {
1219 hfmpsmbus->XferSize = Size;
1220 }
1221
1222 /* Set NBYTES to write and reload if size > MAX_NBYTE_SIZE and generate RESTART */
1223 if ((hfmpsmbus->XferSize < hfmpsmbus->XferCount) && (hfmpsmbus->XferSize == MAX_NBYTE_SIZE))
1224 {
1225 FMPSMBUS_TransferConfig(hfmpsmbus, 0, (uint8_t)hfmpsmbus->XferSize,
1226 FMPSMBUS_RELOAD_MODE | (hfmpsmbus->XferOptions & FMPSMBUS_SENDPEC_MODE), FMPSMBUS_NO_STARTSTOP);
1227 }
1228 else
1229 {
1230 /* Set NBYTE to transmit */
1231 FMPSMBUS_TransferConfig(hfmpsmbus, 0, (uint8_t)hfmpsmbus->XferSize, hfmpsmbus->XferOptions, FMPSMBUS_NO_STARTSTOP);
1232
1233 /* If PEC mode is enable, size to transmit should be Size-1 byte, corresponding to PEC byte */
1234 /* PEC byte is automatically sent by HW block, no need to manage it in Transmit process */
1235 if (FMPSMBUS_GET_PEC_MODE(hfmpsmbus) != 0UL)
1236 {
1237 hfmpsmbus->XferSize--;
1238 hfmpsmbus->XferCount--;
1239 }
1240 }
1241
1242 /* Clear ADDR flag after prepare the transfer parameters */
1243 /* This action will generate an acknowledge to the HOST */
1244 __HAL_FMPSMBUS_CLEAR_FLAG(hfmpsmbus, FMPSMBUS_FLAG_ADDR);
1245
1246 /* Process Unlocked */
1247 __HAL_UNLOCK(hfmpsmbus);
1248
1249 /* Note : The FMPSMBUS interrupts must be enabled after unlocking current process
1250 to avoid the risk of FMPSMBUS interrupt handle execution before current
1251 process unlock */
1252 /* REnable ADDR interrupt */
1253 FMPSMBUS_Enable_IRQ(hfmpsmbus, FMPSMBUS_IT_TX | FMPSMBUS_IT_ADDR);
1254
1255 return HAL_OK;
1256 }
1257 else
1258 {
1259 return HAL_BUSY;
1260 }
1261}
1262
1263/**
1264 * @brief Receive in slave/device FMPSMBUS mode an amount of data in non-blocking mode with Interrupt.
1265 * @param hfmpsmbus Pointer to a FMPSMBUS_HandleTypeDef structure that contains
1266 * the configuration information for the specified FMPSMBUS.
1267 * @param pData Pointer to data buffer
1268 * @param Size Amount of data to be sent
1269 * @param XferOptions Options of Transfer, value of @ref FMPSMBUS_XferOptions_definition
1270 * @retval HAL status
1271 */
1272HAL_StatusTypeDef HAL_FMPSMBUS_Slave_Receive_IT(FMPSMBUS_HandleTypeDef *hfmpsmbus, uint8_t *pData, uint16_t Size,
1273 uint32_t XferOptions)
1274{
1275 /* Check the parameters */
1276 assert_param(IS_FMPSMBUS_TRANSFER_OPTIONS_REQUEST(XferOptions));
1277
1278 if ((hfmpsmbus->State & HAL_FMPSMBUS_STATE_LISTEN) == HAL_FMPSMBUS_STATE_LISTEN)
1279 {
1280 if ((pData == NULL) || (Size == 0UL))
1281 {
1282 hfmpsmbus->ErrorCode = HAL_FMPSMBUS_ERROR_INVALID_PARAM;
1283 return HAL_ERROR;
1284 }
1285
1286 /* Disable Interrupts, to prevent preemption during treatment in case of multicall */
1287 FMPSMBUS_Disable_IRQ(hfmpsmbus, FMPSMBUS_IT_ADDR | FMPSMBUS_IT_RX);
1288
1289 /* Process Locked */
1290 __HAL_LOCK(hfmpsmbus);
1291
1292 hfmpsmbus->State = (HAL_FMPSMBUS_STATE_SLAVE_BUSY_RX | HAL_FMPSMBUS_STATE_LISTEN);
1293 hfmpsmbus->ErrorCode = HAL_FMPSMBUS_ERROR_NONE;
1294
1295 /* Set SBC bit to manage Acknowledge at each bit */
1296 hfmpsmbus->Instance->CR1 |= FMPI2C_CR1_SBC;
1297
1298 /* Enable Address Acknowledge */
1299 hfmpsmbus->Instance->CR2 &= ~FMPI2C_CR2_NACK;
1300
1301 /* Prepare transfer parameters */
1302 hfmpsmbus->pBuffPtr = pData;
1303 hfmpsmbus->XferSize = Size;
1304 hfmpsmbus->XferCount = Size;
1305 hfmpsmbus->XferOptions = XferOptions;
1306
1307 /* Convert OTHER_xxx XferOptions if any */
1308 FMPSMBUS_ConvertOtherXferOptions(hfmpsmbus);
1309
1310 /* Set NBYTE to receive */
1311 /* If XferSize equal "1", or XferSize equal "2" with PEC requested (mean 1 data byte + 1 PEC byte */
1312 /* no need to set RELOAD bit mode, a ACK will be automatically generated in that case */
1313 /* else need to set RELOAD bit mode to generate an automatic ACK at each byte Received */
1314 /* This RELOAD bit will be reset for last BYTE to be receive in FMPSMBUS_Slave_ISR */
1315 if (((FMPSMBUS_GET_PEC_MODE(hfmpsmbus) != 0UL) && (hfmpsmbus->XferSize == 2U)) || (hfmpsmbus->XferSize == 1U))
1316 {
1317 FMPSMBUS_TransferConfig(hfmpsmbus, 0, (uint8_t)hfmpsmbus->XferSize, hfmpsmbus->XferOptions, FMPSMBUS_NO_STARTSTOP);
1318 }
1319 else
1320 {
1321 FMPSMBUS_TransferConfig(hfmpsmbus, 0, 1, hfmpsmbus->XferOptions | FMPSMBUS_RELOAD_MODE, FMPSMBUS_NO_STARTSTOP);
1322 }
1323
1324 /* Clear ADDR flag after prepare the transfer parameters */
1325 /* This action will generate an acknowledge to the HOST */
1326 __HAL_FMPSMBUS_CLEAR_FLAG(hfmpsmbus, FMPSMBUS_FLAG_ADDR);
1327
1328 /* Process Unlocked */
1329 __HAL_UNLOCK(hfmpsmbus);
1330
1331 /* Note : The FMPSMBUS interrupts must be enabled after unlocking current process
1332 to avoid the risk of FMPSMBUS interrupt handle execution before current
1333 process unlock */
1334 /* REnable ADDR interrupt */
1335 FMPSMBUS_Enable_IRQ(hfmpsmbus, FMPSMBUS_IT_RX | FMPSMBUS_IT_ADDR);
1336
1337 return HAL_OK;
1338 }
1339 else
1340 {
1341 return HAL_BUSY;
1342 }
1343}
1344
1345/**
1346 * @brief Enable the Address listen mode with Interrupt.
1347 * @param hfmpsmbus Pointer to a FMPSMBUS_HandleTypeDef structure that contains
1348 * the configuration information for the specified FMPSMBUS.
1349 * @retval HAL status
1350 */
1351HAL_StatusTypeDef HAL_FMPSMBUS_EnableListen_IT(FMPSMBUS_HandleTypeDef *hfmpsmbus)
1352{
1353 hfmpsmbus->State = HAL_FMPSMBUS_STATE_LISTEN;
1354
1355 /* Enable the Address Match interrupt */
1356 FMPSMBUS_Enable_IRQ(hfmpsmbus, FMPSMBUS_IT_ADDR);
1357
1358 return HAL_OK;
1359}
1360
1361/**
1362 * @brief Disable the Address listen mode with Interrupt.
1363 * @param hfmpsmbus Pointer to a FMPSMBUS_HandleTypeDef structure that contains
1364 * the configuration information for the specified FMPSMBUS.
1365 * @retval HAL status
1366 */
1367HAL_StatusTypeDef HAL_FMPSMBUS_DisableListen_IT(FMPSMBUS_HandleTypeDef *hfmpsmbus)
1368{
1369 /* Disable Address listen mode only if a transfer is not ongoing */
1370 if (hfmpsmbus->State == HAL_FMPSMBUS_STATE_LISTEN)
1371 {
1372 hfmpsmbus->State = HAL_FMPSMBUS_STATE_READY;
1373
1374 /* Disable the Address Match interrupt */
1375 FMPSMBUS_Disable_IRQ(hfmpsmbus, FMPSMBUS_IT_ADDR);
1376
1377 return HAL_OK;
1378 }
1379 else
1380 {
1381 return HAL_BUSY;
1382 }
1383}
1384
1385/**
1386 * @brief Enable the FMPSMBUS alert mode with Interrupt.
1387 * @param hfmpsmbus Pointer to a FMPSMBUS_HandleTypeDef structure that contains
1388 * the configuration information for the specified FMPSMBUSx peripheral.
1389 * @retval HAL status
1390 */
1391HAL_StatusTypeDef HAL_FMPSMBUS_EnableAlert_IT(FMPSMBUS_HandleTypeDef *hfmpsmbus)
1392{
1393 /* Enable SMBus alert */
1394 hfmpsmbus->Instance->CR1 |= FMPI2C_CR1_ALERTEN;
1395
1396 /* Clear ALERT flag */
1397 __HAL_FMPSMBUS_CLEAR_FLAG(hfmpsmbus, FMPSMBUS_FLAG_ALERT);
1398
1399 /* Enable Alert Interrupt */
1400 FMPSMBUS_Enable_IRQ(hfmpsmbus, FMPSMBUS_IT_ALERT);
1401
1402 return HAL_OK;
1403}
1404/**
1405 * @brief Disable the FMPSMBUS alert mode with Interrupt.
1406 * @param hfmpsmbus Pointer to a FMPSMBUS_HandleTypeDef structure that contains
1407 * the configuration information for the specified FMPSMBUSx peripheral.
1408 * @retval HAL status
1409 */
1410HAL_StatusTypeDef HAL_FMPSMBUS_DisableAlert_IT(FMPSMBUS_HandleTypeDef *hfmpsmbus)
1411{
1412 /* Enable SMBus alert */
1413 hfmpsmbus->Instance->CR1 &= ~FMPI2C_CR1_ALERTEN;
1414
1415 /* Disable Alert Interrupt */
1416 FMPSMBUS_Disable_IRQ(hfmpsmbus, FMPSMBUS_IT_ALERT);
1417
1418 return HAL_OK;
1419}
1420
1421/**
1422 * @brief Check if target device is ready for communication.
1423 * @param hfmpsmbus Pointer to a FMPSMBUS_HandleTypeDef structure that contains
1424 * the configuration information for the specified FMPSMBUS.
1425 * @param DevAddress Target device address: The device 7 bits address value
1426 * in datasheet must be shifted to the left before calling the interface
1427 * @param Trials Number of trials
1428 * @param Timeout Timeout duration
1429 * @retval HAL status
1430 */
1431HAL_StatusTypeDef HAL_FMPSMBUS_IsDeviceReady(FMPSMBUS_HandleTypeDef *hfmpsmbus, uint16_t DevAddress, uint32_t Trials,
1432 uint32_t Timeout)
1433{
1434 uint32_t tickstart;
1435
1436 __IO uint32_t FMPSMBUS_Trials = 0UL;
1437
1438 FlagStatus tmp1;
1439 FlagStatus tmp2;
1440
1441 if (hfmpsmbus->State == HAL_FMPSMBUS_STATE_READY)
1442 {
1443 if (__HAL_FMPSMBUS_GET_FLAG(hfmpsmbus, FMPSMBUS_FLAG_BUSY) != RESET)
1444 {
1445 return HAL_BUSY;
1446 }
1447
1448 /* Process Locked */
1449 __HAL_LOCK(hfmpsmbus);
1450
1451 hfmpsmbus->State = HAL_FMPSMBUS_STATE_BUSY;
1452 hfmpsmbus->ErrorCode = HAL_FMPSMBUS_ERROR_NONE;
1453
1454 do
1455 {
1456 /* Generate Start */
1457 hfmpsmbus->Instance->CR2 = FMPSMBUS_GENERATE_START(hfmpsmbus->Init.AddressingMode, DevAddress);
1458
1459 /* No need to Check TC flag, with AUTOEND mode the stop is automatically generated */
1460 /* Wait until STOPF flag is set or a NACK flag is set*/
1461 tickstart = HAL_GetTick();
1462
1463 tmp1 = __HAL_FMPSMBUS_GET_FLAG(hfmpsmbus, FMPSMBUS_FLAG_STOPF);
1464 tmp2 = __HAL_FMPSMBUS_GET_FLAG(hfmpsmbus, FMPSMBUS_FLAG_AF);
1465
1466 while ((tmp1 == RESET) && (tmp2 == RESET))
1467 {
1468 if (Timeout != HAL_MAX_DELAY)
1469 {
1470 if (((HAL_GetTick() - tickstart) > Timeout) || (Timeout == 0UL))
1471 {
1472 /* Device is ready */
1473 hfmpsmbus->State = HAL_FMPSMBUS_STATE_READY;
1474
1475 /* Update FMPSMBUS error code */
1476 hfmpsmbus->ErrorCode |= HAL_FMPSMBUS_ERROR_HALTIMEOUT;
1477
1478 /* Process Unlocked */
1479 __HAL_UNLOCK(hfmpsmbus);
1480 return HAL_ERROR;
1481 }
1482 }
1483
1484 tmp1 = __HAL_FMPSMBUS_GET_FLAG(hfmpsmbus, FMPSMBUS_FLAG_STOPF);
1485 tmp2 = __HAL_FMPSMBUS_GET_FLAG(hfmpsmbus, FMPSMBUS_FLAG_AF);
1486 }
1487
1488 /* Check if the NACKF flag has not been set */
1489 if (__HAL_FMPSMBUS_GET_FLAG(hfmpsmbus, FMPSMBUS_FLAG_AF) == RESET)
1490 {
1491 /* Wait until STOPF flag is reset */
1492 if (FMPSMBUS_WaitOnFlagUntilTimeout(hfmpsmbus, FMPSMBUS_FLAG_STOPF, RESET, Timeout) != HAL_OK)
1493 {
1494 return HAL_ERROR;
1495 }
1496
1497 /* Clear STOP Flag */
1498 __HAL_FMPSMBUS_CLEAR_FLAG(hfmpsmbus, FMPSMBUS_FLAG_STOPF);
1499
1500 /* Device is ready */
1501 hfmpsmbus->State = HAL_FMPSMBUS_STATE_READY;
1502
1503 /* Process Unlocked */
1504 __HAL_UNLOCK(hfmpsmbus);
1505
1506 return HAL_OK;
1507 }
1508 else
1509 {
1510 /* Wait until STOPF flag is reset */
1511 if (FMPSMBUS_WaitOnFlagUntilTimeout(hfmpsmbus, FMPSMBUS_FLAG_STOPF, RESET, Timeout) != HAL_OK)
1512 {
1513 return HAL_ERROR;
1514 }
1515
1516 /* Clear NACK Flag */
1517 __HAL_FMPSMBUS_CLEAR_FLAG(hfmpsmbus, FMPSMBUS_FLAG_AF);
1518
1519 /* Clear STOP Flag, auto generated with autoend*/
1520 __HAL_FMPSMBUS_CLEAR_FLAG(hfmpsmbus, FMPSMBUS_FLAG_STOPF);
1521 }
1522
1523 /* Check if the maximum allowed number of trials has been reached */
1524 if (FMPSMBUS_Trials == Trials)
1525 {
1526 /* Generate Stop */
1527 hfmpsmbus->Instance->CR2 |= FMPI2C_CR2_STOP;
1528
1529 /* Wait until STOPF flag is reset */
1530 if (FMPSMBUS_WaitOnFlagUntilTimeout(hfmpsmbus, FMPSMBUS_FLAG_STOPF, RESET, Timeout) != HAL_OK)
1531 {
1532 return HAL_ERROR;
1533 }
1534
1535 /* Clear STOP Flag */
1536 __HAL_FMPSMBUS_CLEAR_FLAG(hfmpsmbus, FMPSMBUS_FLAG_STOPF);
1537 }
1538
1539 /* Increment Trials */
1540 FMPSMBUS_Trials++;
1541 } while (FMPSMBUS_Trials < Trials);
1542
1543 hfmpsmbus->State = HAL_FMPSMBUS_STATE_READY;
1544
1545 /* Update FMPSMBUS error code */
1546 hfmpsmbus->ErrorCode |= HAL_FMPSMBUS_ERROR_HALTIMEOUT;
1547
1548 /* Process Unlocked */
1549 __HAL_UNLOCK(hfmpsmbus);
1550
1551 return HAL_ERROR;
1552 }
1553 else
1554 {
1555 return HAL_BUSY;
1556 }
1557}
1558/**
1559 * @}
1560 */
1561
1562/** @defgroup FMPSMBUS_IRQ_Handler_and_Callbacks IRQ Handler and Callbacks
1563 * @{
1564 */
1565
1566/**
1567 * @brief Handle FMPSMBUS event interrupt request.
1568 * @param hfmpsmbus Pointer to a FMPSMBUS_HandleTypeDef structure that contains
1569 * the configuration information for the specified FMPSMBUS.
1570 * @retval None
1571 */
1572void HAL_FMPSMBUS_EV_IRQHandler(FMPSMBUS_HandleTypeDef *hfmpsmbus)
1573{
1574 /* Use a local variable to store the current ISR flags */
1575 /* This action will avoid a wrong treatment due to ISR flags change during interrupt handler */
1576 uint32_t tmpisrvalue = READ_REG(hfmpsmbus->Instance->ISR);
1577 uint32_t tmpcr1value = READ_REG(hfmpsmbus->Instance->CR1);
1578
1579 /* FMPSMBUS in mode Transmitter ---------------------------------------------------*/
1580 if ((FMPSMBUS_CHECK_IT_SOURCE(tmpcr1value, (FMPSMBUS_IT_TCI | FMPSMBUS_IT_STOPI | FMPSMBUS_IT_NACKI | FMPSMBUS_IT_TXI)) != RESET) &&
1581 ((FMPSMBUS_CHECK_FLAG(tmpisrvalue, FMPSMBUS_FLAG_TXIS) != RESET) ||
1582 (FMPSMBUS_CHECK_FLAG(tmpisrvalue, FMPSMBUS_FLAG_TCR) != RESET) ||
1583 (FMPSMBUS_CHECK_FLAG(tmpisrvalue, FMPSMBUS_FLAG_TC) != RESET) ||
1584 (FMPSMBUS_CHECK_FLAG(tmpisrvalue, FMPSMBUS_FLAG_STOPF) != RESET) ||
1585 (FMPSMBUS_CHECK_FLAG(tmpisrvalue, FMPSMBUS_FLAG_AF) != RESET)))
1586 {
1587 /* Slave mode selected */
1588 if ((hfmpsmbus->State & HAL_FMPSMBUS_STATE_SLAVE_BUSY_TX) == HAL_FMPSMBUS_STATE_SLAVE_BUSY_TX)
1589 {
1590 (void)FMPSMBUS_Slave_ISR(hfmpsmbus, tmpisrvalue);
1591 }
1592 /* Master mode selected */
1593 else if ((hfmpsmbus->State & HAL_FMPSMBUS_STATE_MASTER_BUSY_TX) == HAL_FMPSMBUS_STATE_MASTER_BUSY_TX)
1594 {
1595 (void)FMPSMBUS_Master_ISR(hfmpsmbus, tmpisrvalue);
1596 }
1597 else
1598 {
1599 /* Nothing to do */
1600 }
1601 }
1602
1603 /* FMPSMBUS in mode Receiver ----------------------------------------------------*/
1604 if ((FMPSMBUS_CHECK_IT_SOURCE(tmpcr1value, (FMPSMBUS_IT_TCI | FMPSMBUS_IT_STOPI | FMPSMBUS_IT_NACKI | FMPSMBUS_IT_RXI)) != RESET) &&
1605 ((FMPSMBUS_CHECK_FLAG(tmpisrvalue, FMPSMBUS_FLAG_RXNE) != RESET) ||
1606 (FMPSMBUS_CHECK_FLAG(tmpisrvalue, FMPSMBUS_FLAG_TCR) != RESET) ||
1607 (FMPSMBUS_CHECK_FLAG(tmpisrvalue, FMPSMBUS_FLAG_TC) != RESET) ||
1608 (FMPSMBUS_CHECK_FLAG(tmpisrvalue, FMPSMBUS_FLAG_STOPF) != RESET) ||
1609 (FMPSMBUS_CHECK_FLAG(tmpisrvalue, FMPSMBUS_FLAG_AF) != RESET)))
1610 {
1611 /* Slave mode selected */
1612 if ((hfmpsmbus->State & HAL_FMPSMBUS_STATE_SLAVE_BUSY_RX) == HAL_FMPSMBUS_STATE_SLAVE_BUSY_RX)
1613 {
1614 (void)FMPSMBUS_Slave_ISR(hfmpsmbus, tmpisrvalue);
1615 }
1616 /* Master mode selected */
1617 else if ((hfmpsmbus->State & HAL_FMPSMBUS_STATE_MASTER_BUSY_RX) == HAL_FMPSMBUS_STATE_MASTER_BUSY_RX)
1618 {
1619 (void)FMPSMBUS_Master_ISR(hfmpsmbus, tmpisrvalue);
1620 }
1621 else
1622 {
1623 /* Nothing to do */
1624 }
1625 }
1626
1627 /* FMPSMBUS in mode Listener Only --------------------------------------------------*/
1628 if (((FMPSMBUS_CHECK_IT_SOURCE(tmpcr1value, FMPSMBUS_IT_ADDRI) != RESET) ||
1629 (FMPSMBUS_CHECK_IT_SOURCE(tmpcr1value, FMPSMBUS_IT_STOPI) != RESET) ||
1630 (FMPSMBUS_CHECK_IT_SOURCE(tmpcr1value, FMPSMBUS_IT_NACKI) != RESET)) &&
1631 ((FMPSMBUS_CHECK_FLAG(tmpisrvalue, FMPSMBUS_FLAG_ADDR) != RESET) ||
1632 (FMPSMBUS_CHECK_FLAG(tmpisrvalue, FMPSMBUS_FLAG_STOPF) != RESET) ||
1633 (FMPSMBUS_CHECK_FLAG(tmpisrvalue, FMPSMBUS_FLAG_AF) != RESET)))
1634 {
1635 if ((hfmpsmbus->State & HAL_FMPSMBUS_STATE_LISTEN) == HAL_FMPSMBUS_STATE_LISTEN)
1636 {
1637 (void)FMPSMBUS_Slave_ISR(hfmpsmbus, tmpisrvalue);
1638 }
1639 }
1640}
1641
1642/**
1643 * @brief Handle FMPSMBUS error interrupt request.
1644 * @param hfmpsmbus Pointer to a FMPSMBUS_HandleTypeDef structure that contains
1645 * the configuration information for the specified FMPSMBUS.
1646 * @retval None
1647 */
1648void HAL_FMPSMBUS_ER_IRQHandler(FMPSMBUS_HandleTypeDef *hfmpsmbus)
1649{
1650 FMPSMBUS_ITErrorHandler(hfmpsmbus);
1651}
1652
1653/**
1654 * @brief Master Tx Transfer completed callback.
1655 * @param hfmpsmbus Pointer to a FMPSMBUS_HandleTypeDef structure that contains
1656 * the configuration information for the specified FMPSMBUS.
1657 * @retval None
1658 */
1659__weak void HAL_FMPSMBUS_MasterTxCpltCallback(FMPSMBUS_HandleTypeDef *hfmpsmbus)
1660{
1661 /* Prevent unused argument(s) compilation warning */
1662 UNUSED(hfmpsmbus);
1663
1664 /* NOTE : This function should not be modified, when the callback is needed,
1665 the HAL_FMPSMBUS_MasterTxCpltCallback() could be implemented in the user file
1666 */
1667}
1668
1669/**
1670 * @brief Master Rx Transfer completed callback.
1671 * @param hfmpsmbus Pointer to a FMPSMBUS_HandleTypeDef structure that contains
1672 * the configuration information for the specified FMPSMBUS.
1673 * @retval None
1674 */
1675__weak void HAL_FMPSMBUS_MasterRxCpltCallback(FMPSMBUS_HandleTypeDef *hfmpsmbus)
1676{
1677 /* Prevent unused argument(s) compilation warning */
1678 UNUSED(hfmpsmbus);
1679
1680 /* NOTE : This function should not be modified, when the callback is needed,
1681 the HAL_FMPSMBUS_MasterRxCpltCallback() could be implemented in the user file
1682 */
1683}
1684
1685/** @brief Slave Tx Transfer completed callback.
1686 * @param hfmpsmbus Pointer to a FMPSMBUS_HandleTypeDef structure that contains
1687 * the configuration information for the specified FMPSMBUS.
1688 * @retval None
1689 */
1690__weak void HAL_FMPSMBUS_SlaveTxCpltCallback(FMPSMBUS_HandleTypeDef *hfmpsmbus)
1691{
1692 /* Prevent unused argument(s) compilation warning */
1693 UNUSED(hfmpsmbus);
1694
1695 /* NOTE : This function should not be modified, when the callback is needed,
1696 the HAL_FMPSMBUS_SlaveTxCpltCallback() could be implemented in the user file
1697 */
1698}
1699
1700/**
1701 * @brief Slave Rx Transfer completed callback.
1702 * @param hfmpsmbus Pointer to a FMPSMBUS_HandleTypeDef structure that contains
1703 * the configuration information for the specified FMPSMBUS.
1704 * @retval None
1705 */
1706__weak void HAL_FMPSMBUS_SlaveRxCpltCallback(FMPSMBUS_HandleTypeDef *hfmpsmbus)
1707{
1708 /* Prevent unused argument(s) compilation warning */
1709 UNUSED(hfmpsmbus);
1710
1711 /* NOTE : This function should not be modified, when the callback is needed,
1712 the HAL_FMPSMBUS_SlaveRxCpltCallback() could be implemented in the user file
1713 */
1714}
1715
1716/**
1717 * @brief Slave Address Match callback.
1718 * @param hfmpsmbus Pointer to a FMPSMBUS_HandleTypeDef structure that contains
1719 * the configuration information for the specified FMPSMBUS.
1720 * @param TransferDirection Master request Transfer Direction (Write/Read)
1721 * @param AddrMatchCode Address Match Code
1722 * @retval None
1723 */
1724__weak void HAL_FMPSMBUS_AddrCallback(FMPSMBUS_HandleTypeDef *hfmpsmbus, uint8_t TransferDirection, uint16_t AddrMatchCode)
1725{
1726 /* Prevent unused argument(s) compilation warning */
1727 UNUSED(hfmpsmbus);
1728 UNUSED(TransferDirection);
1729 UNUSED(AddrMatchCode);
1730
1731 /* NOTE : This function should not be modified, when the callback is needed,
1732 the HAL_FMPSMBUS_AddrCallback() could be implemented in the user file
1733 */
1734}
1735
1736/**
1737 * @brief Listen Complete callback.
1738 * @param hfmpsmbus Pointer to a FMPSMBUS_HandleTypeDef structure that contains
1739 * the configuration information for the specified FMPSMBUS.
1740 * @retval None
1741 */
1742__weak void HAL_FMPSMBUS_ListenCpltCallback(FMPSMBUS_HandleTypeDef *hfmpsmbus)
1743{
1744 /* Prevent unused argument(s) compilation warning */
1745 UNUSED(hfmpsmbus);
1746
1747 /* NOTE : This function should not be modified, when the callback is needed,
1748 the HAL_FMPSMBUS_ListenCpltCallback() could be implemented in the user file
1749 */
1750}
1751
1752/**
1753 * @brief FMPSMBUS error callback.
1754 * @param hfmpsmbus Pointer to a FMPSMBUS_HandleTypeDef structure that contains
1755 * the configuration information for the specified FMPSMBUS.
1756 * @retval None
1757 */
1758__weak void HAL_FMPSMBUS_ErrorCallback(FMPSMBUS_HandleTypeDef *hfmpsmbus)
1759{
1760 /* Prevent unused argument(s) compilation warning */
1761 UNUSED(hfmpsmbus);
1762
1763 /* NOTE : This function should not be modified, when the callback is needed,
1764 the HAL_FMPSMBUS_ErrorCallback() could be implemented in the user file
1765 */
1766}
1767
1768/**
1769 * @}
1770 */
1771
1772/** @defgroup FMPSMBUS_Exported_Functions_Group3 Peripheral State and Errors functions
1773 * @brief Peripheral State and Errors functions
1774 *
1775@verbatim
1776 ===============================================================================
1777 ##### Peripheral State and Errors functions #####
1778 ===============================================================================
1779 [..]
1780 This subsection permits to get in run-time the status of the peripheral
1781 and the data flow.
1782
1783@endverbatim
1784 * @{
1785 */
1786
1787/**
1788 * @brief Return the FMPSMBUS handle state.
1789 * @param hfmpsmbus Pointer to a FMPSMBUS_HandleTypeDef structure that contains
1790 * the configuration information for the specified FMPSMBUS.
1791 * @retval HAL state
1792 */
1793uint32_t HAL_FMPSMBUS_GetState(FMPSMBUS_HandleTypeDef *hfmpsmbus)
1794{
1795 /* Return FMPSMBUS handle state */
1796 return hfmpsmbus->State;
1797}
1798
1799/**
1800 * @brief Return the FMPSMBUS error code.
1801 * @param hfmpsmbus Pointer to a FMPSMBUS_HandleTypeDef structure that contains
1802 * the configuration information for the specified FMPSMBUS.
1803 * @retval FMPSMBUS Error Code
1804 */
1805uint32_t HAL_FMPSMBUS_GetError(FMPSMBUS_HandleTypeDef *hfmpsmbus)
1806{
1807 return hfmpsmbus->ErrorCode;
1808}
1809
1810/**
1811 * @}
1812 */
1813
1814/**
1815 * @}
1816 */
1817
1818/** @addtogroup FMPSMBUS_Private_Functions FMPSMBUS Private Functions
1819 * @brief Data transfers Private functions
1820 * @{
1821 */
1822
1823/**
1824 * @brief Interrupt Sub-Routine which handle the Interrupt Flags Master Mode.
1825 * @param hfmpsmbus Pointer to a FMPSMBUS_HandleTypeDef structure that contains
1826 * the configuration information for the specified FMPSMBUS.
1827 * @param StatusFlags Value of Interrupt Flags.
1828 * @retval HAL status
1829 */
1830static HAL_StatusTypeDef FMPSMBUS_Master_ISR(FMPSMBUS_HandleTypeDef *hfmpsmbus, uint32_t StatusFlags)
1831{
1832 uint16_t DevAddress;
1833
1834 /* Process Locked */
1835 __HAL_LOCK(hfmpsmbus);
1836
1837 if (FMPSMBUS_CHECK_FLAG(StatusFlags, FMPSMBUS_FLAG_AF) != RESET)
1838 {
1839 /* Clear NACK Flag */
1840 __HAL_FMPSMBUS_CLEAR_FLAG(hfmpsmbus, FMPSMBUS_FLAG_AF);
1841
1842 /* Set corresponding Error Code */
1843 /* No need to generate STOP, it is automatically done */
1844 hfmpsmbus->ErrorCode |= HAL_FMPSMBUS_ERROR_ACKF;
1845
1846 /* Process Unlocked */
1847 __HAL_UNLOCK(hfmpsmbus);
1848
1849 /* Call the Error callback to inform upper layer */
1850#if (USE_HAL_FMPSMBUS_REGISTER_CALLBACKS == 1)
1851 hfmpsmbus->ErrorCallback(hfmpsmbus);
1852#else
1853 HAL_FMPSMBUS_ErrorCallback(hfmpsmbus);
1854#endif /* USE_HAL_FMPSMBUS_REGISTER_CALLBACKS */
1855 }
1856 else if (FMPSMBUS_CHECK_FLAG(StatusFlags, FMPSMBUS_FLAG_STOPF) != RESET)
1857 {
1858 /* Check and treat errors if errors occurs during STOP process */
1859 FMPSMBUS_ITErrorHandler(hfmpsmbus);
1860
1861 /* Call the corresponding callback to inform upper layer of End of Transfer */
1862 if (hfmpsmbus->State == HAL_FMPSMBUS_STATE_MASTER_BUSY_TX)
1863 {
1864 /* Disable Interrupt */
1865 FMPSMBUS_Disable_IRQ(hfmpsmbus, FMPSMBUS_IT_TX);
1866
1867 /* Clear STOP Flag */
1868 __HAL_FMPSMBUS_CLEAR_FLAG(hfmpsmbus, FMPSMBUS_FLAG_STOPF);
1869
1870 /* Clear Configuration Register 2 */
1871 FMPSMBUS_RESET_CR2(hfmpsmbus);
1872
1873 /* Flush remaining data in Fifo register in case of error occurs before TXEmpty */
1874 /* Disable the selected FMPSMBUS peripheral */
1875 __HAL_FMPSMBUS_DISABLE(hfmpsmbus);
1876
1877 hfmpsmbus->PreviousState = HAL_FMPSMBUS_STATE_READY;
1878 hfmpsmbus->State = HAL_FMPSMBUS_STATE_READY;
1879
1880 /* Process Unlocked */
1881 __HAL_UNLOCK(hfmpsmbus);
1882
1883 /* Re-enable the selected FMPSMBUS peripheral */
1884 __HAL_FMPSMBUS_ENABLE(hfmpsmbus);
1885
1886 /* Call the corresponding callback to inform upper layer of End of Transfer */
1887#if (USE_HAL_FMPSMBUS_REGISTER_CALLBACKS == 1)
1888 hfmpsmbus->MasterTxCpltCallback(hfmpsmbus);
1889#else
1890 HAL_FMPSMBUS_MasterTxCpltCallback(hfmpsmbus);
1891#endif /* USE_HAL_FMPSMBUS_REGISTER_CALLBACKS */
1892 }
1893 else if (hfmpsmbus->State == HAL_FMPSMBUS_STATE_MASTER_BUSY_RX)
1894 {
1895 /* Store Last receive data if any */
1896 if (FMPSMBUS_CHECK_FLAG(StatusFlags, FMPSMBUS_FLAG_RXNE) != RESET)
1897 {
1898 /* Read data from RXDR */
1899 *hfmpsmbus->pBuffPtr = (uint8_t)(hfmpsmbus->Instance->RXDR);
1900
1901 /* Increment Buffer pointer */
1902 hfmpsmbus->pBuffPtr++;
1903
1904 if ((hfmpsmbus->XferSize > 0U))
1905 {
1906 hfmpsmbus->XferSize--;
1907 hfmpsmbus->XferCount--;
1908 }
1909 }
1910
1911 /* Disable Interrupt */
1912 FMPSMBUS_Disable_IRQ(hfmpsmbus, FMPSMBUS_IT_RX);
1913
1914 /* Clear STOP Flag */
1915 __HAL_FMPSMBUS_CLEAR_FLAG(hfmpsmbus, FMPSMBUS_FLAG_STOPF);
1916
1917 /* Clear Configuration Register 2 */
1918 FMPSMBUS_RESET_CR2(hfmpsmbus);
1919
1920 hfmpsmbus->PreviousState = HAL_FMPSMBUS_STATE_READY;
1921 hfmpsmbus->State = HAL_FMPSMBUS_STATE_READY;
1922
1923 /* Process Unlocked */
1924 __HAL_UNLOCK(hfmpsmbus);
1925
1926 /* Call the corresponding callback to inform upper layer of End of Transfer */
1927#if (USE_HAL_FMPSMBUS_REGISTER_CALLBACKS == 1)
1928 hfmpsmbus->MasterRxCpltCallback(hfmpsmbus);
1929#else
1930 HAL_FMPSMBUS_MasterRxCpltCallback(hfmpsmbus);
1931#endif /* USE_HAL_FMPSMBUS_REGISTER_CALLBACKS */
1932 }
1933 else
1934 {
1935 /* Nothing to do */
1936 }
1937 }
1938 else if (FMPSMBUS_CHECK_FLAG(StatusFlags, FMPSMBUS_FLAG_RXNE) != RESET)
1939 {
1940 /* Read data from RXDR */
1941 *hfmpsmbus->pBuffPtr = (uint8_t)(hfmpsmbus->Instance->RXDR);
1942
1943 /* Increment Buffer pointer */
1944 hfmpsmbus->pBuffPtr++;
1945
1946 /* Increment Size counter */
1947 hfmpsmbus->XferSize--;
1948 hfmpsmbus->XferCount--;
1949 }
1950 else if (FMPSMBUS_CHECK_FLAG(StatusFlags, FMPSMBUS_FLAG_TXIS) != RESET)
1951 {
1952 /* Write data to TXDR */
1953 hfmpsmbus->Instance->TXDR = *hfmpsmbus->pBuffPtr;
1954
1955 /* Increment Buffer pointer */
1956 hfmpsmbus->pBuffPtr++;
1957
1958 /* Increment Size counter */
1959 hfmpsmbus->XferSize--;
1960 hfmpsmbus->XferCount--;
1961 }
1962 else if (FMPSMBUS_CHECK_FLAG(StatusFlags, FMPSMBUS_FLAG_TCR) != RESET)
1963 {
1964 if ((hfmpsmbus->XferCount != 0U) && (hfmpsmbus->XferSize == 0U))
1965 {
1966 DevAddress = (uint16_t)(hfmpsmbus->Instance->CR2 & FMPI2C_CR2_SADD);
1967
1968 if (hfmpsmbus->XferCount > MAX_NBYTE_SIZE)
1969 {
1970 FMPSMBUS_TransferConfig(hfmpsmbus, DevAddress, MAX_NBYTE_SIZE,
1971 (FMPSMBUS_RELOAD_MODE | (hfmpsmbus->XferOptions & FMPSMBUS_SENDPEC_MODE)), FMPSMBUS_NO_STARTSTOP);
1972 hfmpsmbus->XferSize = MAX_NBYTE_SIZE;
1973 }
1974 else
1975 {
1976 hfmpsmbus->XferSize = hfmpsmbus->XferCount;
1977 FMPSMBUS_TransferConfig(hfmpsmbus, DevAddress, (uint8_t)hfmpsmbus->XferSize, hfmpsmbus->XferOptions, FMPSMBUS_NO_STARTSTOP);
1978 /* If PEC mode is enable, size to transmit should be Size-1 byte, corresponding to PEC byte */
1979 /* PEC byte is automatically sent by HW block, no need to manage it in Transmit process */
1980 if (FMPSMBUS_GET_PEC_MODE(hfmpsmbus) != 0UL)
1981 {
1982 hfmpsmbus->XferSize--;
1983 hfmpsmbus->XferCount--;
1984 }
1985 }
1986 }
1987 else if ((hfmpsmbus->XferCount == 0U) && (hfmpsmbus->XferSize == 0U))
1988 {
1989 /* Call TxCpltCallback() if no stop mode is set */
1990 if (FMPSMBUS_GET_STOP_MODE(hfmpsmbus) != FMPSMBUS_AUTOEND_MODE)
1991 {
1992 /* Call the corresponding callback to inform upper layer of End of Transfer */
1993 if (hfmpsmbus->State == HAL_FMPSMBUS_STATE_MASTER_BUSY_TX)
1994 {
1995 /* Disable Interrupt */
1996 FMPSMBUS_Disable_IRQ(hfmpsmbus, FMPSMBUS_IT_TX);
1997 hfmpsmbus->PreviousState = hfmpsmbus->State;
1998 hfmpsmbus->State = HAL_FMPSMBUS_STATE_READY;
1999
2000 /* Process Unlocked */
2001 __HAL_UNLOCK(hfmpsmbus);
2002
2003 /* Call the corresponding callback to inform upper layer of End of Transfer */
2004#if (USE_HAL_FMPSMBUS_REGISTER_CALLBACKS == 1)
2005 hfmpsmbus->MasterTxCpltCallback(hfmpsmbus);
2006#else
2007 HAL_FMPSMBUS_MasterTxCpltCallback(hfmpsmbus);
2008#endif /* USE_HAL_FMPSMBUS_REGISTER_CALLBACKS */
2009 }
2010 else if (hfmpsmbus->State == HAL_FMPSMBUS_STATE_MASTER_BUSY_RX)
2011 {
2012 FMPSMBUS_Disable_IRQ(hfmpsmbus, FMPSMBUS_IT_RX);
2013 hfmpsmbus->PreviousState = hfmpsmbus->State;
2014 hfmpsmbus->State = HAL_FMPSMBUS_STATE_READY;
2015
2016 /* Process Unlocked */
2017 __HAL_UNLOCK(hfmpsmbus);
2018
2019 /* Call the corresponding callback to inform upper layer of End of Transfer */
2020#if (USE_HAL_FMPSMBUS_REGISTER_CALLBACKS == 1)
2021 hfmpsmbus->MasterRxCpltCallback(hfmpsmbus);
2022#else
2023 HAL_FMPSMBUS_MasterRxCpltCallback(hfmpsmbus);
2024#endif /* USE_HAL_FMPSMBUS_REGISTER_CALLBACKS */
2025 }
2026 else
2027 {
2028 /* Nothing to do */
2029 }
2030 }
2031 }
2032 else
2033 {
2034 /* Nothing to do */
2035 }
2036 }
2037 else if (FMPSMBUS_CHECK_FLAG(StatusFlags, FMPSMBUS_FLAG_TC) != RESET)
2038 {
2039 if (hfmpsmbus->XferCount == 0U)
2040 {
2041 /* Specific use case for Quick command */
2042 if (hfmpsmbus->pBuffPtr == NULL)
2043 {
2044 /* Generate a Stop command */
2045 hfmpsmbus->Instance->CR2 |= FMPI2C_CR2_STOP;
2046 }
2047 /* Call TxCpltCallback() if no stop mode is set */
2048 else if (FMPSMBUS_GET_STOP_MODE(hfmpsmbus) != FMPSMBUS_AUTOEND_MODE)
2049 {
2050 /* No Generate Stop, to permit restart mode */
2051 /* The stop will be done at the end of transfer, when FMPSMBUS_AUTOEND_MODE enable */
2052
2053 /* Call the corresponding callback to inform upper layer of End of Transfer */
2054 if (hfmpsmbus->State == HAL_FMPSMBUS_STATE_MASTER_BUSY_TX)
2055 {
2056 /* Disable Interrupt */
2057 FMPSMBUS_Disable_IRQ(hfmpsmbus, FMPSMBUS_IT_TX);
2058 hfmpsmbus->PreviousState = hfmpsmbus->State;
2059 hfmpsmbus->State = HAL_FMPSMBUS_STATE_READY;
2060
2061 /* Process Unlocked */
2062 __HAL_UNLOCK(hfmpsmbus);
2063
2064 /* Call the corresponding callback to inform upper layer of End of Transfer */
2065#if (USE_HAL_FMPSMBUS_REGISTER_CALLBACKS == 1)
2066 hfmpsmbus->MasterTxCpltCallback(hfmpsmbus);
2067#else
2068 HAL_FMPSMBUS_MasterTxCpltCallback(hfmpsmbus);
2069#endif /* USE_HAL_FMPSMBUS_REGISTER_CALLBACKS */
2070 }
2071 else if (hfmpsmbus->State == HAL_FMPSMBUS_STATE_MASTER_BUSY_RX)
2072 {
2073 FMPSMBUS_Disable_IRQ(hfmpsmbus, FMPSMBUS_IT_RX);
2074 hfmpsmbus->PreviousState = hfmpsmbus->State;
2075 hfmpsmbus->State = HAL_FMPSMBUS_STATE_READY;
2076
2077 /* Process Unlocked */
2078 __HAL_UNLOCK(hfmpsmbus);
2079
2080 /* Call the corresponding callback to inform upper layer of End of Transfer */
2081#if (USE_HAL_FMPSMBUS_REGISTER_CALLBACKS == 1)
2082 hfmpsmbus->MasterRxCpltCallback(hfmpsmbus);
2083#else
2084 HAL_FMPSMBUS_MasterRxCpltCallback(hfmpsmbus);
2085#endif /* USE_HAL_FMPSMBUS_REGISTER_CALLBACKS */
2086 }
2087 else
2088 {
2089 /* Nothing to do */
2090 }
2091 }
2092 else
2093 {
2094 /* Nothing to do */
2095 }
2096 }
2097 }
2098 else
2099 {
2100 /* Nothing to do */
2101 }
2102
2103 /* Process Unlocked */
2104 __HAL_UNLOCK(hfmpsmbus);
2105
2106 return HAL_OK;
2107}
2108/**
2109 * @brief Interrupt Sub-Routine which handle the Interrupt Flags Slave Mode.
2110 * @param hfmpsmbus Pointer to a FMPSMBUS_HandleTypeDef structure that contains
2111 * the configuration information for the specified FMPSMBUS.
2112 * @param StatusFlags Value of Interrupt Flags.
2113 * @retval HAL status
2114 */
2115static HAL_StatusTypeDef FMPSMBUS_Slave_ISR(FMPSMBUS_HandleTypeDef *hfmpsmbus, uint32_t StatusFlags)
2116{
2117 uint8_t TransferDirection;
2118 uint16_t SlaveAddrCode;
2119
2120 /* Process Locked */
2121 __HAL_LOCK(hfmpsmbus);
2122
2123 if (FMPSMBUS_CHECK_FLAG(StatusFlags, FMPSMBUS_FLAG_AF) != RESET)
2124 {
2125 /* Check that FMPSMBUS transfer finished */
2126 /* if yes, normal usecase, a NACK is sent by the HOST when Transfer is finished */
2127 /* Mean XferCount == 0*/
2128 /* So clear Flag NACKF only */
2129 if (hfmpsmbus->XferCount == 0U)
2130 {
2131 /* Clear NACK Flag */
2132 __HAL_FMPSMBUS_CLEAR_FLAG(hfmpsmbus, FMPSMBUS_FLAG_AF);
2133
2134 /* Process Unlocked */
2135 __HAL_UNLOCK(hfmpsmbus);
2136 }
2137 else
2138 {
2139 /* if no, error usecase, a Non-Acknowledge of last Data is generated by the HOST*/
2140 /* Clear NACK Flag */
2141 __HAL_FMPSMBUS_CLEAR_FLAG(hfmpsmbus, FMPSMBUS_FLAG_AF);
2142
2143 /* Set HAL State to "Idle" State, mean to LISTEN state */
2144 /* So reset Slave Busy state */
2145 hfmpsmbus->PreviousState = hfmpsmbus->State;
2146 hfmpsmbus->State &= ~((uint32_t)HAL_FMPSMBUS_STATE_SLAVE_BUSY_TX);
2147 hfmpsmbus->State &= ~((uint32_t)HAL_FMPSMBUS_STATE_SLAVE_BUSY_RX);
2148
2149 /* Disable RX/TX Interrupts, keep only ADDR Interrupt */
2150 FMPSMBUS_Disable_IRQ(hfmpsmbus, FMPSMBUS_IT_RX | FMPSMBUS_IT_TX);
2151
2152 /* Set ErrorCode corresponding to a Non-Acknowledge */
2153 hfmpsmbus->ErrorCode |= HAL_FMPSMBUS_ERROR_ACKF;
2154
2155 /* Process Unlocked */
2156 __HAL_UNLOCK(hfmpsmbus);
2157
2158 /* Call the Error callback to inform upper layer */
2159#if (USE_HAL_FMPSMBUS_REGISTER_CALLBACKS == 1)
2160 hfmpsmbus->ErrorCallback(hfmpsmbus);
2161#else
2162 HAL_FMPSMBUS_ErrorCallback(hfmpsmbus);
2163#endif /* USE_HAL_FMPSMBUS_REGISTER_CALLBACKS */
2164 }
2165 }
2166 else if (FMPSMBUS_CHECK_FLAG(StatusFlags, FMPSMBUS_FLAG_ADDR) != RESET)
2167 {
2168 TransferDirection = (uint8_t)(FMPSMBUS_GET_DIR(hfmpsmbus));
2169 SlaveAddrCode = (uint16_t)(FMPSMBUS_GET_ADDR_MATCH(hfmpsmbus));
2170
2171 /* Disable ADDR interrupt to prevent multiple ADDRInterrupt*/
2172 /* Other ADDRInterrupt will be treat in next Listen usecase */
2173 __HAL_FMPSMBUS_DISABLE_IT(hfmpsmbus, FMPSMBUS_IT_ADDRI);
2174
2175 /* Process Unlocked */
2176 __HAL_UNLOCK(hfmpsmbus);
2177
2178 /* Call Slave Addr callback */
2179#if (USE_HAL_FMPSMBUS_REGISTER_CALLBACKS == 1)
2180 hfmpsmbus->AddrCallback(hfmpsmbus, TransferDirection, SlaveAddrCode);
2181#else
2182 HAL_FMPSMBUS_AddrCallback(hfmpsmbus, TransferDirection, SlaveAddrCode);
2183#endif /* USE_HAL_FMPSMBUS_REGISTER_CALLBACKS */
2184 }
2185 else if ((FMPSMBUS_CHECK_FLAG(StatusFlags, FMPSMBUS_FLAG_RXNE) != RESET) ||
2186 (FMPSMBUS_CHECK_FLAG(StatusFlags, FMPSMBUS_FLAG_TCR) != RESET))
2187 {
2188 if ((hfmpsmbus->State & HAL_FMPSMBUS_STATE_SLAVE_BUSY_RX) == HAL_FMPSMBUS_STATE_SLAVE_BUSY_RX)
2189 {
2190 /* Read data from RXDR */
2191 *hfmpsmbus->pBuffPtr = (uint8_t)(hfmpsmbus->Instance->RXDR);
2192
2193 /* Increment Buffer pointer */
2194 hfmpsmbus->pBuffPtr++;
2195
2196 hfmpsmbus->XferSize--;
2197 hfmpsmbus->XferCount--;
2198
2199 if (hfmpsmbus->XferCount == 1U)
2200 {
2201 /* Receive last Byte, can be PEC byte in case of PEC BYTE enabled */
2202 /* or only the last Byte of Transfer */
2203 /* So reset the RELOAD bit mode */
2204 hfmpsmbus->XferOptions &= ~FMPSMBUS_RELOAD_MODE;
2205 FMPSMBUS_TransferConfig(hfmpsmbus, 0, 1, hfmpsmbus->XferOptions, FMPSMBUS_NO_STARTSTOP);
2206 }
2207 else if (hfmpsmbus->XferCount == 0U)
2208 {
2209 /* Last Byte is received, disable Interrupt */
2210 FMPSMBUS_Disable_IRQ(hfmpsmbus, FMPSMBUS_IT_RX);
2211
2212 /* Remove HAL_FMPSMBUS_STATE_SLAVE_BUSY_RX, keep only HAL_FMPSMBUS_STATE_LISTEN */
2213 hfmpsmbus->PreviousState = hfmpsmbus->State;
2214 hfmpsmbus->State &= ~((uint32_t)HAL_FMPSMBUS_STATE_SLAVE_BUSY_RX);
2215
2216 /* Process Unlocked */
2217 __HAL_UNLOCK(hfmpsmbus);
2218
2219 /* Call the corresponding callback to inform upper layer of End of Transfer */
2220#if (USE_HAL_FMPSMBUS_REGISTER_CALLBACKS == 1)
2221 hfmpsmbus->SlaveRxCpltCallback(hfmpsmbus);
2222#else
2223 HAL_FMPSMBUS_SlaveRxCpltCallback(hfmpsmbus);
2224#endif /* USE_HAL_FMPSMBUS_REGISTER_CALLBACKS */
2225 }
2226 else
2227 {
2228 /* Set Reload for next Bytes */
2229 FMPSMBUS_TransferConfig(hfmpsmbus, 0, 1, FMPSMBUS_RELOAD_MODE | (hfmpsmbus->XferOptions & FMPSMBUS_SENDPEC_MODE), FMPSMBUS_NO_STARTSTOP);
2230
2231 /* Ack last Byte Read */
2232 hfmpsmbus->Instance->CR2 &= ~FMPI2C_CR2_NACK;
2233 }
2234 }
2235 else if ((hfmpsmbus->State & HAL_FMPSMBUS_STATE_SLAVE_BUSY_TX) == HAL_FMPSMBUS_STATE_SLAVE_BUSY_TX)
2236 {
2237 if ((hfmpsmbus->XferCount != 0U) && (hfmpsmbus->XferSize == 0U))
2238 {
2239 if (hfmpsmbus->XferCount > MAX_NBYTE_SIZE)
2240 {
2241 FMPSMBUS_TransferConfig(hfmpsmbus, 0, MAX_NBYTE_SIZE, (FMPSMBUS_RELOAD_MODE | (hfmpsmbus->XferOptions & FMPSMBUS_SENDPEC_MODE)),
2242 FMPSMBUS_NO_STARTSTOP);
2243 hfmpsmbus->XferSize = MAX_NBYTE_SIZE;
2244 }
2245 else
2246 {
2247 hfmpsmbus->XferSize = hfmpsmbus->XferCount;
2248 FMPSMBUS_TransferConfig(hfmpsmbus, 0, (uint8_t)hfmpsmbus->XferSize, hfmpsmbus->XferOptions, FMPSMBUS_NO_STARTSTOP);
2249 /* If PEC mode is enable, size to transmit should be Size-1 byte, corresponding to PEC byte */
2250 /* PEC byte is automatically sent by HW block, no need to manage it in Transmit process */
2251 if (FMPSMBUS_GET_PEC_MODE(hfmpsmbus) != 0UL)
2252 {
2253 hfmpsmbus->XferSize--;
2254 hfmpsmbus->XferCount--;
2255 }
2256 }
2257 }
2258 }
2259 else
2260 {
2261 /* Nothing to do */
2262 }
2263 }
2264 else if (FMPSMBUS_CHECK_FLAG(StatusFlags, FMPSMBUS_FLAG_TXIS) != RESET)
2265 {
2266 /* Write data to TXDR only if XferCount not reach "0" */
2267 /* A TXIS flag can be set, during STOP treatment */
2268 /* Check if all Data have already been sent */
2269 /* If it is the case, this last write in TXDR is not sent, correspond to a dummy TXIS event */
2270 if (hfmpsmbus->XferCount > 0U)
2271 {
2272 /* Write data to TXDR */
2273 hfmpsmbus->Instance->TXDR = *hfmpsmbus->pBuffPtr;
2274
2275 /* Increment Buffer pointer */
2276 hfmpsmbus->pBuffPtr++;
2277
2278 hfmpsmbus->XferCount--;
2279 hfmpsmbus->XferSize--;
2280 }
2281
2282 if (hfmpsmbus->XferCount == 0U)
2283 {
2284 /* Last Byte is Transmitted */
2285 /* Remove HAL_FMPSMBUS_STATE_SLAVE_BUSY_TX, keep only HAL_FMPSMBUS_STATE_LISTEN */
2286 FMPSMBUS_Disable_IRQ(hfmpsmbus, FMPSMBUS_IT_TX);
2287 hfmpsmbus->PreviousState = hfmpsmbus->State;
2288 hfmpsmbus->State &= ~((uint32_t)HAL_FMPSMBUS_STATE_SLAVE_BUSY_TX);
2289
2290 /* Process Unlocked */
2291 __HAL_UNLOCK(hfmpsmbus);
2292
2293 /* Call the corresponding callback to inform upper layer of End of Transfer */
2294#if (USE_HAL_FMPSMBUS_REGISTER_CALLBACKS == 1)
2295 hfmpsmbus->SlaveTxCpltCallback(hfmpsmbus);
2296#else
2297 HAL_FMPSMBUS_SlaveTxCpltCallback(hfmpsmbus);
2298#endif /* USE_HAL_FMPSMBUS_REGISTER_CALLBACKS */
2299 }
2300 }
2301 else
2302 {
2303 /* Nothing to do */
2304 }
2305
2306 /* Check if STOPF is set */
2307 if (FMPSMBUS_CHECK_FLAG(StatusFlags, FMPSMBUS_FLAG_STOPF) != RESET)
2308 {
2309 if ((hfmpsmbus->State & HAL_FMPSMBUS_STATE_LISTEN) == HAL_FMPSMBUS_STATE_LISTEN)
2310 {
2311 /* Store Last receive data if any */
2312 if (__HAL_FMPSMBUS_GET_FLAG(hfmpsmbus, FMPSMBUS_FLAG_RXNE) != RESET)
2313 {
2314 /* Read data from RXDR */
2315 *hfmpsmbus->pBuffPtr = (uint8_t)(hfmpsmbus->Instance->RXDR);
2316
2317 /* Increment Buffer pointer */
2318 hfmpsmbus->pBuffPtr++;
2319
2320 if ((hfmpsmbus->XferSize > 0U))
2321 {
2322 hfmpsmbus->XferSize--;
2323 hfmpsmbus->XferCount--;
2324 }
2325 }
2326
2327 /* Disable RX and TX Interrupts */
2328 FMPSMBUS_Disable_IRQ(hfmpsmbus, FMPSMBUS_IT_RX | FMPSMBUS_IT_TX);
2329
2330 /* Disable ADDR Interrupt */
2331 FMPSMBUS_Disable_IRQ(hfmpsmbus, FMPSMBUS_IT_ADDR);
2332
2333 /* Disable Address Acknowledge */
2334 hfmpsmbus->Instance->CR2 |= FMPI2C_CR2_NACK;
2335
2336 /* Clear Configuration Register 2 */
2337 FMPSMBUS_RESET_CR2(hfmpsmbus);
2338
2339 /* Clear STOP Flag */
2340 __HAL_FMPSMBUS_CLEAR_FLAG(hfmpsmbus, FMPSMBUS_FLAG_STOPF);
2341
2342 /* Clear ADDR flag */
2343 __HAL_FMPSMBUS_CLEAR_FLAG(hfmpsmbus, FMPSMBUS_FLAG_ADDR);
2344
2345 hfmpsmbus->XferOptions = 0;
2346 hfmpsmbus->PreviousState = hfmpsmbus->State;
2347 hfmpsmbus->State = HAL_FMPSMBUS_STATE_READY;
2348
2349 /* Process Unlocked */
2350 __HAL_UNLOCK(hfmpsmbus);
2351
2352 /* Call the Listen Complete callback, to inform upper layer of the end of Listen usecase */
2353#if (USE_HAL_FMPSMBUS_REGISTER_CALLBACKS == 1)
2354 hfmpsmbus->ListenCpltCallback(hfmpsmbus);
2355#else
2356 HAL_FMPSMBUS_ListenCpltCallback(hfmpsmbus);
2357#endif /* USE_HAL_FMPSMBUS_REGISTER_CALLBACKS */
2358 }
2359 }
2360
2361 /* Process Unlocked */
2362 __HAL_UNLOCK(hfmpsmbus);
2363
2364 return HAL_OK;
2365}
2366/**
2367 * @brief Manage the enabling of Interrupts.
2368 * @param hfmpsmbus Pointer to a FMPSMBUS_HandleTypeDef structure that contains
2369 * the configuration information for the specified FMPSMBUS.
2370 * @param InterruptRequest Value of @ref FMPSMBUS_Interrupt_configuration_definition.
2371 * @retval HAL status
2372 */
2373static void FMPSMBUS_Enable_IRQ(FMPSMBUS_HandleTypeDef *hfmpsmbus, uint32_t InterruptRequest)
2374{
2375 uint32_t tmpisr = 0UL;
2376
2377 if ((InterruptRequest & FMPSMBUS_IT_ALERT) == FMPSMBUS_IT_ALERT)
2378 {
2379 /* Enable ERR interrupt */
2380 tmpisr |= FMPSMBUS_IT_ERRI;
2381 }
2382
2383 if ((InterruptRequest & FMPSMBUS_IT_ADDR) == FMPSMBUS_IT_ADDR)
2384 {
2385 /* Enable ADDR, STOP interrupt */
2386 tmpisr |= FMPSMBUS_IT_ADDRI | FMPSMBUS_IT_STOPI | FMPSMBUS_IT_NACKI | FMPSMBUS_IT_ERRI;
2387 }
2388
2389 if ((InterruptRequest & FMPSMBUS_IT_TX) == FMPSMBUS_IT_TX)
2390 {
2391 /* Enable ERR, TC, STOP, NACK, RXI interrupt */
2392 tmpisr |= FMPSMBUS_IT_ERRI | FMPSMBUS_IT_TCI | FMPSMBUS_IT_STOPI | FMPSMBUS_IT_NACKI | FMPSMBUS_IT_TXI;
2393 }
2394
2395 if ((InterruptRequest & FMPSMBUS_IT_RX) == FMPSMBUS_IT_RX)
2396 {
2397 /* Enable ERR, TC, STOP, NACK, TXI interrupt */
2398 tmpisr |= FMPSMBUS_IT_ERRI | FMPSMBUS_IT_TCI | FMPSMBUS_IT_STOPI | FMPSMBUS_IT_NACKI | FMPSMBUS_IT_RXI;
2399 }
2400
2401 /* Enable interrupts only at the end */
2402 /* to avoid the risk of FMPSMBUS interrupt handle execution before */
2403 /* all interrupts requested done */
2404 __HAL_FMPSMBUS_ENABLE_IT(hfmpsmbus, tmpisr);
2405}
2406/**
2407 * @brief Manage the disabling of Interrupts.
2408 * @param hfmpsmbus Pointer to a FMPSMBUS_HandleTypeDef structure that contains
2409 * the configuration information for the specified FMPSMBUS.
2410 * @param InterruptRequest Value of @ref FMPSMBUS_Interrupt_configuration_definition.
2411 * @retval HAL status
2412 */
2413static void FMPSMBUS_Disable_IRQ(FMPSMBUS_HandleTypeDef *hfmpsmbus, uint32_t InterruptRequest)
2414{
2415 uint32_t tmpisr = 0UL;
2416 uint32_t tmpstate = hfmpsmbus->State;
2417
2418 if ((tmpstate == HAL_FMPSMBUS_STATE_READY) && ((InterruptRequest & FMPSMBUS_IT_ALERT) == FMPSMBUS_IT_ALERT))
2419 {
2420 /* Disable ERR interrupt */
2421 tmpisr |= FMPSMBUS_IT_ERRI;
2422 }
2423
2424 if ((InterruptRequest & FMPSMBUS_IT_TX) == FMPSMBUS_IT_TX)
2425 {
2426 /* Disable TC, STOP, NACK and TXI interrupt */
2427 tmpisr |= FMPSMBUS_IT_TCI | FMPSMBUS_IT_TXI;
2428
2429 if ((FMPSMBUS_GET_ALERT_ENABLED(hfmpsmbus) == 0UL)
2430 && ((tmpstate & HAL_FMPSMBUS_STATE_LISTEN) != HAL_FMPSMBUS_STATE_LISTEN))
2431 {
2432 /* Disable ERR interrupt */
2433 tmpisr |= FMPSMBUS_IT_ERRI;
2434 }
2435
2436 if ((tmpstate & HAL_FMPSMBUS_STATE_LISTEN) != HAL_FMPSMBUS_STATE_LISTEN)
2437 {
2438 /* Disable STOP and NACK interrupt */
2439 tmpisr |= FMPSMBUS_IT_STOPI | FMPSMBUS_IT_NACKI;
2440 }
2441 }
2442
2443 if ((InterruptRequest & FMPSMBUS_IT_RX) == FMPSMBUS_IT_RX)
2444 {
2445 /* Disable TC, STOP, NACK and RXI interrupt */
2446 tmpisr |= FMPSMBUS_IT_TCI | FMPSMBUS_IT_RXI;
2447
2448 if ((FMPSMBUS_GET_ALERT_ENABLED(hfmpsmbus) == 0UL)
2449 && ((tmpstate & HAL_FMPSMBUS_STATE_LISTEN) != HAL_FMPSMBUS_STATE_LISTEN))
2450 {
2451 /* Disable ERR interrupt */
2452 tmpisr |= FMPSMBUS_IT_ERRI;
2453 }
2454
2455 if ((tmpstate & HAL_FMPSMBUS_STATE_LISTEN) != HAL_FMPSMBUS_STATE_LISTEN)
2456 {
2457 /* Disable STOP and NACK interrupt */
2458 tmpisr |= FMPSMBUS_IT_STOPI | FMPSMBUS_IT_NACKI;
2459 }
2460 }
2461
2462 if ((InterruptRequest & FMPSMBUS_IT_ADDR) == FMPSMBUS_IT_ADDR)
2463 {
2464 /* Disable ADDR, STOP and NACK interrupt */
2465 tmpisr |= FMPSMBUS_IT_ADDRI | FMPSMBUS_IT_STOPI | FMPSMBUS_IT_NACKI;
2466
2467 if (FMPSMBUS_GET_ALERT_ENABLED(hfmpsmbus) == 0UL)
2468 {
2469 /* Disable ERR interrupt */
2470 tmpisr |= FMPSMBUS_IT_ERRI;
2471 }
2472 }
2473
2474 /* Disable interrupts only at the end */
2475 /* to avoid a breaking situation like at "t" time */
2476 /* all disable interrupts request are not done */
2477 __HAL_FMPSMBUS_DISABLE_IT(hfmpsmbus, tmpisr);
2478}
2479
2480/**
2481 * @brief FMPSMBUS interrupts error handler.
2482 * @param hfmpsmbus FMPSMBUS handle.
2483 * @retval None
2484 */
2485static void FMPSMBUS_ITErrorHandler(FMPSMBUS_HandleTypeDef *hfmpsmbus)
2486{
2487 uint32_t itflags = READ_REG(hfmpsmbus->Instance->ISR);
2488 uint32_t itsources = READ_REG(hfmpsmbus->Instance->CR1);
2489 uint32_t tmpstate;
2490 uint32_t tmperror;
2491
2492 /* FMPSMBUS Bus error interrupt occurred ------------------------------------*/
2493 if (((itflags & FMPSMBUS_FLAG_BERR) == FMPSMBUS_FLAG_BERR) && ((itsources & FMPSMBUS_IT_ERRI) == FMPSMBUS_IT_ERRI))
2494 {
2495 hfmpsmbus->ErrorCode |= HAL_FMPSMBUS_ERROR_BERR;
2496
2497 /* Clear BERR flag */
2498 __HAL_FMPSMBUS_CLEAR_FLAG(hfmpsmbus, FMPSMBUS_FLAG_BERR);
2499 }
2500
2501 /* FMPSMBUS Over-Run/Under-Run interrupt occurred ----------------------------------------*/
2502 if (((itflags & FMPSMBUS_FLAG_OVR) == FMPSMBUS_FLAG_OVR) && ((itsources & FMPSMBUS_IT_ERRI) == FMPSMBUS_IT_ERRI))
2503 {
2504 hfmpsmbus->ErrorCode |= HAL_FMPSMBUS_ERROR_OVR;
2505
2506 /* Clear OVR flag */
2507 __HAL_FMPSMBUS_CLEAR_FLAG(hfmpsmbus, FMPSMBUS_FLAG_OVR);
2508 }
2509
2510 /* FMPSMBUS Arbitration Loss error interrupt occurred ------------------------------------*/
2511 if (((itflags & FMPSMBUS_FLAG_ARLO) == FMPSMBUS_FLAG_ARLO) && ((itsources & FMPSMBUS_IT_ERRI) == FMPSMBUS_IT_ERRI))
2512 {
2513 hfmpsmbus->ErrorCode |= HAL_FMPSMBUS_ERROR_ARLO;
2514
2515 /* Clear ARLO flag */
2516 __HAL_FMPSMBUS_CLEAR_FLAG(hfmpsmbus, FMPSMBUS_FLAG_ARLO);
2517 }
2518
2519 /* FMPSMBUS Timeout error interrupt occurred ---------------------------------------------*/
2520 if (((itflags & FMPSMBUS_FLAG_TIMEOUT) == FMPSMBUS_FLAG_TIMEOUT) && ((itsources & FMPSMBUS_IT_ERRI) == FMPSMBUS_IT_ERRI))
2521 {
2522 hfmpsmbus->ErrorCode |= HAL_FMPSMBUS_ERROR_BUSTIMEOUT;
2523
2524 /* Clear TIMEOUT flag */
2525 __HAL_FMPSMBUS_CLEAR_FLAG(hfmpsmbus, FMPSMBUS_FLAG_TIMEOUT);
2526 }
2527
2528 /* FMPSMBUS Alert error interrupt occurred -----------------------------------------------*/
2529 if (((itflags & FMPSMBUS_FLAG_ALERT) == FMPSMBUS_FLAG_ALERT) && ((itsources & FMPSMBUS_IT_ERRI) == FMPSMBUS_IT_ERRI))
2530 {
2531 hfmpsmbus->ErrorCode |= HAL_FMPSMBUS_ERROR_ALERT;
2532
2533 /* Clear ALERT flag */
2534 __HAL_FMPSMBUS_CLEAR_FLAG(hfmpsmbus, FMPSMBUS_FLAG_ALERT);
2535 }
2536
2537 /* FMPSMBUS Packet Error Check error interrupt occurred ----------------------------------*/
2538 if (((itflags & FMPSMBUS_FLAG_PECERR) == FMPSMBUS_FLAG_PECERR) && ((itsources & FMPSMBUS_IT_ERRI) == FMPSMBUS_IT_ERRI))
2539 {
2540 hfmpsmbus->ErrorCode |= HAL_FMPSMBUS_ERROR_PECERR;
2541
2542 /* Clear PEC error flag */
2543 __HAL_FMPSMBUS_CLEAR_FLAG(hfmpsmbus, FMPSMBUS_FLAG_PECERR);
2544 }
2545
2546 /* Store current volatile hfmpsmbus->State, misra rule */
2547 tmperror = hfmpsmbus->ErrorCode;
2548
2549 /* Call the Error Callback in case of Error detected */
2550 if ((tmperror != HAL_FMPSMBUS_ERROR_NONE) && (tmperror != HAL_FMPSMBUS_ERROR_ACKF))
2551 {
2552 /* Do not Reset the HAL state in case of ALERT error */
2553 if ((tmperror & HAL_FMPSMBUS_ERROR_ALERT) != HAL_FMPSMBUS_ERROR_ALERT)
2554 {
2555 /* Store current volatile hfmpsmbus->State, misra rule */
2556 tmpstate = hfmpsmbus->State;
2557
2558 if (((tmpstate & HAL_FMPSMBUS_STATE_SLAVE_BUSY_TX) == HAL_FMPSMBUS_STATE_SLAVE_BUSY_TX)
2559 || ((tmpstate & HAL_FMPSMBUS_STATE_SLAVE_BUSY_RX) == HAL_FMPSMBUS_STATE_SLAVE_BUSY_RX))
2560 {
2561 /* Reset only HAL_FMPSMBUS_STATE_SLAVE_BUSY_XX */
2562 /* keep HAL_FMPSMBUS_STATE_LISTEN if set */
2563 hfmpsmbus->PreviousState = HAL_FMPSMBUS_STATE_READY;
2564 hfmpsmbus->State = HAL_FMPSMBUS_STATE_LISTEN;
2565 }
2566 }
2567
2568 /* Call the Error callback to inform upper layer */
2569#if (USE_HAL_FMPSMBUS_REGISTER_CALLBACKS == 1)
2570 hfmpsmbus->ErrorCallback(hfmpsmbus);
2571#else
2572 HAL_FMPSMBUS_ErrorCallback(hfmpsmbus);
2573#endif /* USE_HAL_FMPSMBUS_REGISTER_CALLBACKS */
2574 }
2575}
2576
2577/**
2578 * @brief Handle FMPSMBUS Communication Timeout.
2579 * @param hfmpsmbus Pointer to a FMPSMBUS_HandleTypeDef structure that contains
2580 * the configuration information for the specified FMPSMBUS.
2581 * @param Flag Specifies the FMPSMBUS flag to check.
2582 * @param Status The new Flag status (SET or RESET).
2583 * @param Timeout Timeout duration
2584 * @retval HAL status
2585 */
2586static HAL_StatusTypeDef FMPSMBUS_WaitOnFlagUntilTimeout(FMPSMBUS_HandleTypeDef *hfmpsmbus, uint32_t Flag, FlagStatus Status,
2587 uint32_t Timeout)
2588{
2589 uint32_t tickstart = HAL_GetTick();
2590
2591 /* Wait until flag is set */
2592 while ((FlagStatus)(__HAL_FMPSMBUS_GET_FLAG(hfmpsmbus, Flag)) == Status)
2593 {
2594 /* Check for the Timeout */
2595 if (Timeout != HAL_MAX_DELAY)
2596 {
2597 if (((HAL_GetTick() - tickstart) > Timeout) || (Timeout == 0UL))
2598 {
2599 hfmpsmbus->PreviousState = hfmpsmbus->State;
2600 hfmpsmbus->State = HAL_FMPSMBUS_STATE_READY;
2601
2602 /* Update FMPSMBUS error code */
2603 hfmpsmbus->ErrorCode |= HAL_FMPSMBUS_ERROR_HALTIMEOUT;
2604
2605 /* Process Unlocked */
2606 __HAL_UNLOCK(hfmpsmbus);
2607
2608 return HAL_ERROR;
2609 }
2610 }
2611 }
2612
2613 return HAL_OK;
2614}
2615
2616/**
2617 * @brief Handle FMPSMBUSx communication when starting transfer or during transfer (TC or TCR flag are set).
2618 * @param hfmpsmbus FMPSMBUS handle.
2619 * @param DevAddress specifies the slave address to be programmed.
2620 * @param Size specifies the number of bytes to be programmed.
2621 * This parameter must be a value between 0 and 255.
2622 * @param Mode New state of the FMPSMBUS START condition generation.
2623 * This parameter can be one or a combination of the following values:
2624 * @arg @ref FMPSMBUS_RELOAD_MODE Enable Reload mode.
2625 * @arg @ref FMPSMBUS_AUTOEND_MODE Enable Automatic end mode.
2626 * @arg @ref FMPSMBUS_SOFTEND_MODE Enable Software end mode and Reload mode.
2627 * @arg @ref FMPSMBUS_SENDPEC_MODE Enable Packet Error Calculation mode.
2628 * @param Request New state of the FMPSMBUS START condition generation.
2629 * This parameter can be one of the following values:
2630 * @arg @ref FMPSMBUS_NO_STARTSTOP Don't Generate stop and start condition.
2631 * @arg @ref FMPSMBUS_GENERATE_STOP Generate stop condition (Size should be set to 0).
2632 * @arg @ref FMPSMBUS_GENERATE_START_READ Generate Restart for read request.
2633 * @arg @ref FMPSMBUS_GENERATE_START_WRITE Generate Restart for write request.
2634 * @retval None
2635 */
2636static void FMPSMBUS_TransferConfig(FMPSMBUS_HandleTypeDef *hfmpsmbus, uint16_t DevAddress, uint8_t Size, uint32_t Mode,
2637 uint32_t Request)
2638{
2639 /* Check the parameters */
2640 assert_param(IS_FMPSMBUS_ALL_INSTANCE(hfmpsmbus->Instance));
2641 assert_param(IS_FMPSMBUS_TRANSFER_MODE(Mode));
2642 assert_param(IS_FMPSMBUS_TRANSFER_REQUEST(Request));
2643
2644 /* update CR2 register */
2645 MODIFY_REG(hfmpsmbus->Instance->CR2,
2646 ((FMPI2C_CR2_SADD | FMPI2C_CR2_NBYTES | FMPI2C_CR2_RELOAD | FMPI2C_CR2_AUTOEND | \
2647 (FMPI2C_CR2_RD_WRN & (uint32_t)(Request >> (31UL - FMPI2C_CR2_RD_WRN_Pos))) | \
2648 FMPI2C_CR2_START | FMPI2C_CR2_STOP | FMPI2C_CR2_PECBYTE)), \
2649 (uint32_t)(((uint32_t)DevAddress & FMPI2C_CR2_SADD) | \
2650 (((uint32_t)Size << FMPI2C_CR2_NBYTES_Pos) & FMPI2C_CR2_NBYTES) | (uint32_t)Mode | (uint32_t)Request));
2651}
2652
2653/**
2654 * @brief Convert FMPSMBUSx OTHER_xxx XferOptions to functional XferOptions.
2655 * @param hfmpsmbus FMPSMBUS handle.
2656 * @retval None
2657 */
2658static void FMPSMBUS_ConvertOtherXferOptions(FMPSMBUS_HandleTypeDef *hfmpsmbus)
2659{
2660 /* if user set XferOptions to FMPSMBUS_OTHER_FRAME_NO_PEC */
2661 /* it request implicitly to generate a restart condition */
2662 /* set XferOptions to FMPSMBUS_FIRST_FRAME */
2663 if (hfmpsmbus->XferOptions == FMPSMBUS_OTHER_FRAME_NO_PEC)
2664 {
2665 hfmpsmbus->XferOptions = FMPSMBUS_FIRST_FRAME;
2666 }
2667 /* else if user set XferOptions to FMPSMBUS_OTHER_FRAME_WITH_PEC */
2668 /* it request implicitly to generate a restart condition */
2669 /* set XferOptions to FMPSMBUS_FIRST_FRAME | FMPSMBUS_SENDPEC_MODE */
2670 else if (hfmpsmbus->XferOptions == FMPSMBUS_OTHER_FRAME_WITH_PEC)
2671 {
2672 hfmpsmbus->XferOptions = FMPSMBUS_FIRST_FRAME | FMPSMBUS_SENDPEC_MODE;
2673 }
2674 /* else if user set XferOptions to FMPSMBUS_OTHER_AND_LAST_FRAME_NO_PEC */
2675 /* it request implicitly to generate a restart condition */
2676 /* then generate a stop condition at the end of transfer */
2677 /* set XferOptions to FMPSMBUS_FIRST_AND_LAST_FRAME_NO_PEC */
2678 else if (hfmpsmbus->XferOptions == FMPSMBUS_OTHER_AND_LAST_FRAME_NO_PEC)
2679 {
2680 hfmpsmbus->XferOptions = FMPSMBUS_FIRST_AND_LAST_FRAME_NO_PEC;
2681 }
2682 /* else if user set XferOptions to FMPSMBUS_OTHER_AND_LAST_FRAME_WITH_PEC */
2683 /* it request implicitly to generate a restart condition */
2684 /* then generate a stop condition at the end of transfer */
2685 /* set XferOptions to FMPSMBUS_FIRST_AND_LAST_FRAME_WITH_PEC */
2686 else if (hfmpsmbus->XferOptions == FMPSMBUS_OTHER_AND_LAST_FRAME_WITH_PEC)
2687 {
2688 hfmpsmbus->XferOptions = FMPSMBUS_FIRST_AND_LAST_FRAME_WITH_PEC;
2689 }
2690 else
2691 {
2692 /* Nothing to do */
2693 }
2694}
2695/**
2696 * @}
2697 */
2698
2699#endif /* FMPI2C_CR1_PE */
2700#endif /* HAL_FMPSMBUS_MODULE_ENABLED */
2701/**
2702 * @}
2703 */
2704
2705/**
2706 * @}
2707 */
2708
2709/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
Note: See TracBrowser for help on using the repository browser.