| 1 | /**
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| 2 | ******************************************************************************
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| 3 | * @file stm32f4xx_hal_lptim.c
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| 4 | * @author MCD Application Team
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| 5 | * @brief LPTIM HAL module driver.
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| 6 | * This file provides firmware functions to manage the following
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| 7 | * functionalities of the Low Power Timer (LPTIM) peripheral:
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| 8 | * + Initialization and de-initialization functions.
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| 9 | * + Start/Stop operation functions in polling mode.
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| 10 | * + Start/Stop operation functions in interrupt mode.
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| 11 | * + Reading operation functions.
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| 12 | * + Peripheral State functions.
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| 13 | *
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| 14 | @verbatim
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| 15 | ==============================================================================
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| 16 | ##### How to use this driver #####
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| 17 | ==============================================================================
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| 18 | [..]
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| 19 | The LPTIM HAL driver can be used as follows:
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| 20 |
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| 21 | (#)Initialize the LPTIM low level resources by implementing the
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| 22 | HAL_LPTIM_MspInit():
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| 23 | (++) Enable the LPTIM interface clock using __HAL_RCC_LPTIMx_CLK_ENABLE().
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| 24 | (++) In case of using interrupts (e.g. HAL_LPTIM_PWM_Start_IT()):
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| 25 | (+++) Configure the LPTIM interrupt priority using HAL_NVIC_SetPriority().
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| 26 | (+++) Enable the LPTIM IRQ handler using HAL_NVIC_EnableIRQ().
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| 27 | (+++) In LPTIM IRQ handler, call HAL_LPTIM_IRQHandler().
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| 28 |
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| 29 | (#)Initialize the LPTIM HAL using HAL_LPTIM_Init(). This function
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| 30 | configures mainly:
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| 31 | (++) The instance: LPTIM1.
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| 32 | (++) Clock: the counter clock.
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| 33 | (+++) Source : it can be either the ULPTIM input (IN1) or one of
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| 34 | the internal clock; (APB, LSE or LSI).
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| 35 | (+++) Prescaler: select the clock divider.
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| 36 | (++) UltraLowPowerClock : To be used only if the ULPTIM is selected
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| 37 | as counter clock source.
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| 38 | (+++) Polarity: polarity of the active edge for the counter unit
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| 39 | if the ULPTIM input is selected.
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| 40 | (+++) SampleTime: clock sampling time to configure the clock glitch
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| 41 | filter.
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| 42 | (++) Trigger: How the counter start.
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| 43 | (+++) Source: trigger can be software or one of the hardware triggers.
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| 44 | (+++) ActiveEdge : only for hardware trigger.
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| 45 | (+++) SampleTime : trigger sampling time to configure the trigger
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| 46 | glitch filter.
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| 47 | (++) OutputPolarity : 2 opposite polarities are possible.
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| 48 | (++) UpdateMode: specifies whether the update of the autoreload and
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| 49 | the compare values is done immediately or after the end of current
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| 50 | period.
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| 51 |
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| 52 | (#)Six modes are available:
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| 53 |
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| 54 | (++) PWM Mode: To generate a PWM signal with specified period and pulse,
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| 55 | call HAL_LPTIM_PWM_Start() or HAL_LPTIM_PWM_Start_IT() for interruption
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| 56 | mode.
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| 57 |
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| 58 | (++) One Pulse Mode: To generate pulse with specified width in response
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| 59 | to a stimulus, call HAL_LPTIM_OnePulse_Start() or
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| 60 | HAL_LPTIM_OnePulse_Start_IT() for interruption mode.
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| 61 |
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| 62 | (++) Set once Mode: In this mode, the output changes the level (from
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| 63 | low level to high level if the output polarity is configured high, else
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| 64 | the opposite) when a compare match occurs. To start this mode, call
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| 65 | HAL_LPTIM_SetOnce_Start() or HAL_LPTIM_SetOnce_Start_IT() for
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| 66 | interruption mode.
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| 67 |
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| 68 | (++) Encoder Mode: To use the encoder interface call
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| 69 | HAL_LPTIM_Encoder_Start() or HAL_LPTIM_Encoder_Start_IT() for
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| 70 | interruption mode. Only available for LPTIM1 instance.
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| 71 |
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| 72 | (++) Time out Mode: an active edge on one selected trigger input rests
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| 73 | the counter. The first trigger event will start the timer, any
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| 74 | successive trigger event will reset the counter and the timer will
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| 75 | restart. To start this mode call HAL_LPTIM_TimeOut_Start_IT() or
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| 76 | HAL_LPTIM_TimeOut_Start_IT() for interruption mode.
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| 77 |
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| 78 | (++) Counter Mode: counter can be used to count external events on
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| 79 | the LPTIM Input1 or it can be used to count internal clock cycles.
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| 80 | To start this mode, call HAL_LPTIM_Counter_Start() or
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| 81 | HAL_LPTIM_Counter_Start_IT() for interruption mode.
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| 82 |
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| 83 |
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| 84 | (#) User can stop any process by calling the corresponding API:
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| 85 | HAL_LPTIM_Xxx_Stop() or HAL_LPTIM_Xxx_Stop_IT() if the process is
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| 86 | already started in interruption mode.
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| 87 |
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| 88 | (#) De-initialize the LPTIM peripheral using HAL_LPTIM_DeInit().
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| 89 |
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| 90 | *** Callback registration ***
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| 91 | =============================================
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| 92 | [..]
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| 93 | The compilation define USE_HAL_LPTIM_REGISTER_CALLBACKS when set to 1
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| 94 | allows the user to configure dynamically the driver callbacks.
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| 95 | [..]
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| 96 | Use Function @ref HAL_LPTIM_RegisterCallback() to register a callback.
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| 97 | @ref HAL_LPTIM_RegisterCallback() takes as parameters the HAL peripheral handle,
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| 98 | the Callback ID and a pointer to the user callback function.
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| 99 | [..]
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| 100 | Use function @ref HAL_LPTIM_UnRegisterCallback() to reset a callback to the
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| 101 | default weak function.
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| 102 | @ref HAL_LPTIM_UnRegisterCallback takes as parameters the HAL peripheral handle,
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| 103 | and the Callback ID.
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| 104 | [..]
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| 105 | These functions allow to register/unregister following callbacks:
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| 106 |
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| 107 | (+) MspInitCallback : LPTIM Base Msp Init Callback.
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| 108 | (+) MspDeInitCallback : LPTIM Base Msp DeInit Callback.
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| 109 | (+) CompareMatchCallback : Compare match Callback.
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| 110 | (+) AutoReloadMatchCallback : Auto-reload match Callback.
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| 111 | (+) TriggerCallback : External trigger event detection Callback.
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| 112 | (+) CompareWriteCallback : Compare register write complete Callback.
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| 113 | (+) AutoReloadWriteCallback : Auto-reload register write complete Callback.
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| 114 | (+) DirectionUpCallback : Up-counting direction change Callback.
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| 115 | (+) DirectionDownCallback : Down-counting direction change Callback.
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| 116 |
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| 117 | [..]
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| 118 | By default, after the Init and when the state is HAL_LPTIM_STATE_RESET
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| 119 | all interrupt callbacks are set to the corresponding weak functions:
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| 120 | examples @ref HAL_LPTIM_TriggerCallback(), @ref HAL_LPTIM_CompareMatchCallback().
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| 121 |
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| 122 | [..]
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| 123 | Exception done for MspInit and MspDeInit functions that are reset to the legacy weak
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| 124 | functionalities in the Init/DeInit only when these callbacks are null
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| 125 | (not registered beforehand). If not, MspInit or MspDeInit are not null, the Init/DeInit
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| 126 | keep and use the user MspInit/MspDeInit callbacks (registered beforehand)
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| 127 |
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| 128 | [..]
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| 129 | Callbacks can be registered/unregistered in HAL_LPTIM_STATE_READY state only.
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| 130 | Exception done MspInit/MspDeInit that can be registered/unregistered
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| 131 | in HAL_LPTIM_STATE_READY or HAL_LPTIM_STATE_RESET state,
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| 132 | thus registered (user) MspInit/DeInit callbacks can be used during the Init/DeInit.
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| 133 | In that case first register the MspInit/MspDeInit user callbacks
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| 134 | using @ref HAL_LPTIM_RegisterCallback() before calling DeInit or Init function.
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| 135 |
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| 136 | [..]
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| 137 | When The compilation define USE_HAL_LPTIM_REGISTER_CALLBACKS is set to 0 or
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| 138 | not defined, the callback registration feature is not available and all callbacks
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| 139 | are set to the corresponding weak functions.
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| 140 |
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| 141 | @endverbatim
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| 142 | ******************************************************************************
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| 143 | * @attention
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| 144 | *
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| 145 | * <h2><center>© Copyright (c) 2016 STMicroelectronics.
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| 146 | * All rights reserved.</center></h2>
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| 147 | *
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| 148 | * This software component is licensed by ST under BSD 3-Clause license,
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| 149 | * the "License"; You may not use this file except in compliance with the
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| 150 | * License. You may obtain a copy of the License at:
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| 151 | * opensource.org/licenses/BSD-3-Clause
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| 152 | *
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| 153 | ******************************************************************************
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| 154 | */
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| 155 |
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| 156 | /* Includes ------------------------------------------------------------------*/
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| 157 | #include "stm32f4xx_hal.h"
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| 158 |
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| 159 | /** @addtogroup STM32F4xx_HAL_Driver
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| 160 | * @{
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| 161 | */
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| 162 |
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| 163 | /** @defgroup LPTIM LPTIM
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| 164 | * @brief LPTIM HAL module driver.
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| 165 | * @{
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| 166 | */
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| 167 |
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| 168 | #ifdef HAL_LPTIM_MODULE_ENABLED
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| 169 |
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| 170 | #if defined (LPTIM1)
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| 171 |
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| 172 | /* Private typedef -----------------------------------------------------------*/
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| 173 | /* Private define ------------------------------------------------------------*/
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| 174 | /** @addtogroup LPTIM_Private_Constants
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| 175 | * @{
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| 176 | */
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| 177 | #define TIMEOUT 1000UL /* Timeout is 1s */
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| 178 | /**
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| 179 | * @}
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| 180 | */
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| 181 |
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| 182 | /* Private macro -------------------------------------------------------------*/
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| 183 | /* Private variables ---------------------------------------------------------*/
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| 184 | /* Private function prototypes -----------------------------------------------*/
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| 185 | #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
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| 186 | static void LPTIM_ResetCallback(LPTIM_HandleTypeDef *lptim);
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| 187 | #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
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| 188 | static HAL_StatusTypeDef LPTIM_WaitForFlag(LPTIM_HandleTypeDef *hlptim, uint32_t flag);
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| 189 |
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| 190 | /* Exported functions --------------------------------------------------------*/
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| 191 |
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| 192 | /** @defgroup LPTIM_Exported_Functions LPTIM Exported Functions
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| 193 | * @{
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| 194 | */
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| 195 |
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| 196 | /** @defgroup LPTIM_Exported_Functions_Group1 Initialization/de-initialization functions
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| 197 | * @brief Initialization and Configuration functions.
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| 198 | *
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| 199 | @verbatim
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| 200 | ==============================================================================
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| 201 | ##### Initialization and de-initialization functions #####
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| 202 | ==============================================================================
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| 203 | [..] This section provides functions allowing to:
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| 204 | (+) Initialize the LPTIM according to the specified parameters in the
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| 205 | LPTIM_InitTypeDef and initialize the associated handle.
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| 206 | (+) DeInitialize the LPTIM peripheral.
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| 207 | (+) Initialize the LPTIM MSP.
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| 208 | (+) DeInitialize the LPTIM MSP.
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| 209 |
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| 210 | @endverbatim
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| 211 | * @{
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| 212 | */
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| 213 |
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| 214 | /**
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| 215 | * @brief Initialize the LPTIM according to the specified parameters in the
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| 216 | * LPTIM_InitTypeDef and initialize the associated handle.
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| 217 | * @param hlptim LPTIM handle
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| 218 | * @retval HAL status
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| 219 | */
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| 220 | HAL_StatusTypeDef HAL_LPTIM_Init(LPTIM_HandleTypeDef *hlptim)
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| 221 | {
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| 222 | uint32_t tmpcfgr;
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| 223 |
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| 224 | /* Check the LPTIM handle allocation */
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| 225 | if (hlptim == NULL)
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| 226 | {
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| 227 | return HAL_ERROR;
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| 228 | }
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| 229 |
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| 230 | /* Check the parameters */
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| 231 | assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
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| 232 |
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| 233 | assert_param(IS_LPTIM_CLOCK_SOURCE(hlptim->Init.Clock.Source));
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| 234 | assert_param(IS_LPTIM_CLOCK_PRESCALER(hlptim->Init.Clock.Prescaler));
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| 235 | if ((hlptim->Init.Clock.Source == LPTIM_CLOCKSOURCE_ULPTIM)
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| 236 | || (hlptim->Init.CounterSource == LPTIM_COUNTERSOURCE_EXTERNAL))
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| 237 | {
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| 238 | assert_param(IS_LPTIM_CLOCK_POLARITY(hlptim->Init.UltraLowPowerClock.Polarity));
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| 239 | assert_param(IS_LPTIM_CLOCK_SAMPLE_TIME(hlptim->Init.UltraLowPowerClock.SampleTime));
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| 240 | }
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| 241 | assert_param(IS_LPTIM_TRG_SOURCE(hlptim->Init.Trigger.Source));
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| 242 | if (hlptim->Init.Trigger.Source != LPTIM_TRIGSOURCE_SOFTWARE)
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| 243 | {
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| 244 | assert_param(IS_LPTIM_EXT_TRG_POLARITY(hlptim->Init.Trigger.ActiveEdge));
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| 245 | assert_param(IS_LPTIM_TRIG_SAMPLE_TIME(hlptim->Init.Trigger.SampleTime));
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| 246 | }
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| 247 | assert_param(IS_LPTIM_OUTPUT_POLARITY(hlptim->Init.OutputPolarity));
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| 248 | assert_param(IS_LPTIM_UPDATE_MODE(hlptim->Init.UpdateMode));
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| 249 | assert_param(IS_LPTIM_COUNTER_SOURCE(hlptim->Init.CounterSource));
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| 250 |
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| 251 | if (hlptim->State == HAL_LPTIM_STATE_RESET)
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| 252 | {
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| 253 | /* Allocate lock resource and initialize it */
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| 254 | hlptim->Lock = HAL_UNLOCKED;
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| 255 |
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| 256 | #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
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| 257 | /* Reset interrupt callbacks to legacy weak callbacks */
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| 258 | LPTIM_ResetCallback(hlptim);
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| 259 |
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| 260 | if (hlptim->MspInitCallback == NULL)
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| 261 | {
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| 262 | hlptim->MspInitCallback = HAL_LPTIM_MspInit;
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| 263 | }
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| 264 |
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| 265 | /* Init the low level hardware : GPIO, CLOCK, NVIC */
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| 266 | hlptim->MspInitCallback(hlptim);
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| 267 | #else
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| 268 | /* Init the low level hardware : GPIO, CLOCK, NVIC */
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| 269 | HAL_LPTIM_MspInit(hlptim);
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| 270 | #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
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| 271 | }
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| 272 |
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| 273 | /* Change the LPTIM state */
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| 274 | hlptim->State = HAL_LPTIM_STATE_BUSY;
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| 275 |
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| 276 | /* Get the LPTIMx CFGR value */
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| 277 | tmpcfgr = hlptim->Instance->CFGR;
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| 278 |
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| 279 | if ((hlptim->Init.Clock.Source == LPTIM_CLOCKSOURCE_ULPTIM)
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| 280 | || (hlptim->Init.CounterSource == LPTIM_COUNTERSOURCE_EXTERNAL))
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| 281 | {
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| 282 | tmpcfgr &= (uint32_t)(~(LPTIM_CFGR_CKPOL | LPTIM_CFGR_CKFLT));
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| 283 | }
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| 284 | if (hlptim->Init.Trigger.Source != LPTIM_TRIGSOURCE_SOFTWARE)
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| 285 | {
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| 286 | tmpcfgr &= (uint32_t)(~(LPTIM_CFGR_TRGFLT | LPTIM_CFGR_TRIGSEL));
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| 287 | }
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| 288 |
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| 289 | /* Clear CKSEL, PRESC, TRIGEN, TRGFLT, WAVPOL, PRELOAD & COUNTMODE bits */
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| 290 | tmpcfgr &= (uint32_t)(~(LPTIM_CFGR_CKSEL | LPTIM_CFGR_TRIGEN | LPTIM_CFGR_PRELOAD |
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| 291 | LPTIM_CFGR_WAVPOL | LPTIM_CFGR_PRESC | LPTIM_CFGR_COUNTMODE));
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| 292 |
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| 293 | /* Set initialization parameters */
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| 294 | tmpcfgr |= (hlptim->Init.Clock.Source |
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| 295 | hlptim->Init.Clock.Prescaler |
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| 296 | hlptim->Init.OutputPolarity |
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| 297 | hlptim->Init.UpdateMode |
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| 298 | hlptim->Init.CounterSource);
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| 299 |
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| 300 | /* Glitch filters for internal triggers and external inputs are configured
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| 301 | * only if an internal clock source is provided to the LPTIM
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| 302 | */
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| 303 | if (hlptim->Init.Clock.Source == LPTIM_CLOCKSOURCE_APBCLOCK_LPOSC)
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| 304 | {
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| 305 | tmpcfgr |= (hlptim->Init.Trigger.SampleTime |
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| 306 | hlptim->Init.UltraLowPowerClock.SampleTime);
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| 307 | }
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| 308 |
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| 309 | /* Configure LPTIM external clock polarity and digital filter */
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| 310 | if ((hlptim->Init.Clock.Source == LPTIM_CLOCKSOURCE_ULPTIM)
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| 311 | || (hlptim->Init.CounterSource == LPTIM_COUNTERSOURCE_EXTERNAL))
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| 312 | {
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| 313 | tmpcfgr |= (hlptim->Init.UltraLowPowerClock.Polarity |
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| 314 | hlptim->Init.UltraLowPowerClock.SampleTime);
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| 315 | }
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| 316 |
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| 317 | /* Configure LPTIM external trigger */
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| 318 | if (hlptim->Init.Trigger.Source != LPTIM_TRIGSOURCE_SOFTWARE)
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| 319 | {
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| 320 | /* Enable External trigger and set the trigger source */
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| 321 | tmpcfgr |= (hlptim->Init.Trigger.Source |
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| 322 | hlptim->Init.Trigger.ActiveEdge |
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| 323 | hlptim->Init.Trigger.SampleTime);
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| 324 | }
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| 325 |
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| 326 | /* Write to LPTIMx CFGR */
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| 327 | hlptim->Instance->CFGR = tmpcfgr;
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| 328 |
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| 329 | /* Change the LPTIM state */
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| 330 | hlptim->State = HAL_LPTIM_STATE_READY;
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| 331 |
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| 332 | /* Return function status */
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| 333 | return HAL_OK;
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| 334 | }
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| 335 |
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| 336 | /**
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| 337 | * @brief DeInitialize the LPTIM peripheral.
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| 338 | * @param hlptim LPTIM handle
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| 339 | * @retval HAL status
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| 340 | */
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| 341 | HAL_StatusTypeDef HAL_LPTIM_DeInit(LPTIM_HandleTypeDef *hlptim)
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| 342 | {
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| 343 | /* Check the LPTIM handle allocation */
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| 344 | if (hlptim == NULL)
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| 345 | {
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| 346 | return HAL_ERROR;
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| 347 | }
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| 348 |
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| 349 | /* Change the LPTIM state */
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| 350 | hlptim->State = HAL_LPTIM_STATE_BUSY;
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| 351 |
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| 352 | /* Disable the LPTIM Peripheral Clock */
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| 353 | __HAL_LPTIM_DISABLE(hlptim);
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| 354 |
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| 355 | if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
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| 356 | {
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| 357 | return HAL_TIMEOUT;
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| 358 | }
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| 359 |
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| 360 | #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
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| 361 | if (hlptim->MspDeInitCallback == NULL)
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| 362 | {
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| 363 | hlptim->MspDeInitCallback = HAL_LPTIM_MspDeInit;
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| 364 | }
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| 365 |
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| 366 | /* DeInit the low level hardware: CLOCK, NVIC.*/
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| 367 | hlptim->MspDeInitCallback(hlptim);
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| 368 | #else
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| 369 | /* DeInit the low level hardware: CLOCK, NVIC.*/
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| 370 | HAL_LPTIM_MspDeInit(hlptim);
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| 371 | #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
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| 372 |
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| 373 | /* Change the LPTIM state */
|
|---|
| 374 | hlptim->State = HAL_LPTIM_STATE_RESET;
|
|---|
| 375 |
|
|---|
| 376 | /* Release Lock */
|
|---|
| 377 | __HAL_UNLOCK(hlptim);
|
|---|
| 378 |
|
|---|
| 379 | /* Return function status */
|
|---|
| 380 | return HAL_OK;
|
|---|
| 381 | }
|
|---|
| 382 |
|
|---|
| 383 | /**
|
|---|
| 384 | * @brief Initialize the LPTIM MSP.
|
|---|
| 385 | * @param hlptim LPTIM handle
|
|---|
| 386 | * @retval None
|
|---|
| 387 | */
|
|---|
| 388 | __weak void HAL_LPTIM_MspInit(LPTIM_HandleTypeDef *hlptim)
|
|---|
| 389 | {
|
|---|
| 390 | /* Prevent unused argument(s) compilation warning */
|
|---|
| 391 | UNUSED(hlptim);
|
|---|
| 392 |
|
|---|
| 393 | /* NOTE : This function should not be modified, when the callback is needed,
|
|---|
| 394 | the HAL_LPTIM_MspInit could be implemented in the user file
|
|---|
| 395 | */
|
|---|
| 396 | }
|
|---|
| 397 |
|
|---|
| 398 | /**
|
|---|
| 399 | * @brief DeInitialize LPTIM MSP.
|
|---|
| 400 | * @param hlptim LPTIM handle
|
|---|
| 401 | * @retval None
|
|---|
| 402 | */
|
|---|
| 403 | __weak void HAL_LPTIM_MspDeInit(LPTIM_HandleTypeDef *hlptim)
|
|---|
| 404 | {
|
|---|
| 405 | /* Prevent unused argument(s) compilation warning */
|
|---|
| 406 | UNUSED(hlptim);
|
|---|
| 407 |
|
|---|
| 408 | /* NOTE : This function should not be modified, when the callback is needed,
|
|---|
| 409 | the HAL_LPTIM_MspDeInit could be implemented in the user file
|
|---|
| 410 | */
|
|---|
| 411 | }
|
|---|
| 412 |
|
|---|
| 413 | /**
|
|---|
| 414 | * @}
|
|---|
| 415 | */
|
|---|
| 416 |
|
|---|
| 417 | /** @defgroup LPTIM_Exported_Functions_Group2 LPTIM Start-Stop operation functions
|
|---|
| 418 | * @brief Start-Stop operation functions.
|
|---|
| 419 | *
|
|---|
| 420 | @verbatim
|
|---|
| 421 | ==============================================================================
|
|---|
| 422 | ##### LPTIM Start Stop operation functions #####
|
|---|
| 423 | ==============================================================================
|
|---|
| 424 | [..] This section provides functions allowing to:
|
|---|
| 425 | (+) Start the PWM mode.
|
|---|
| 426 | (+) Stop the PWM mode.
|
|---|
| 427 | (+) Start the One pulse mode.
|
|---|
| 428 | (+) Stop the One pulse mode.
|
|---|
| 429 | (+) Start the Set once mode.
|
|---|
| 430 | (+) Stop the Set once mode.
|
|---|
| 431 | (+) Start the Encoder mode.
|
|---|
| 432 | (+) Stop the Encoder mode.
|
|---|
| 433 | (+) Start the Timeout mode.
|
|---|
| 434 | (+) Stop the Timeout mode.
|
|---|
| 435 | (+) Start the Counter mode.
|
|---|
| 436 | (+) Stop the Counter mode.
|
|---|
| 437 |
|
|---|
| 438 |
|
|---|
| 439 | @endverbatim
|
|---|
| 440 | * @{
|
|---|
| 441 | */
|
|---|
| 442 |
|
|---|
| 443 | /**
|
|---|
| 444 | * @brief Start the LPTIM PWM generation.
|
|---|
| 445 | * @param hlptim LPTIM handle
|
|---|
| 446 | * @param Period Specifies the Autoreload value.
|
|---|
| 447 | * This parameter must be a value between 0x0000 and 0xFFFF.
|
|---|
| 448 | * @param Pulse Specifies the compare value.
|
|---|
| 449 | * This parameter must be a value between 0x0000 and 0xFFFF.
|
|---|
| 450 | * @retval HAL status
|
|---|
| 451 | */
|
|---|
| 452 | HAL_StatusTypeDef HAL_LPTIM_PWM_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse)
|
|---|
| 453 | {
|
|---|
| 454 | /* Check the parameters */
|
|---|
| 455 | assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
|
|---|
| 456 | assert_param(IS_LPTIM_PERIOD(Period));
|
|---|
| 457 | assert_param(IS_LPTIM_PULSE(Pulse));
|
|---|
| 458 |
|
|---|
| 459 | /* Set the LPTIM state */
|
|---|
| 460 | hlptim->State = HAL_LPTIM_STATE_BUSY;
|
|---|
| 461 |
|
|---|
| 462 | /* Reset WAVE bit to set PWM mode */
|
|---|
| 463 | hlptim->Instance->CFGR &= ~LPTIM_CFGR_WAVE;
|
|---|
| 464 |
|
|---|
| 465 | /* Enable the Peripheral */
|
|---|
| 466 | __HAL_LPTIM_ENABLE(hlptim);
|
|---|
| 467 |
|
|---|
| 468 | /* Clear flag */
|
|---|
| 469 | __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
|
|---|
| 470 |
|
|---|
| 471 | /* Load the period value in the autoreload register */
|
|---|
| 472 | __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
|
|---|
| 473 |
|
|---|
| 474 | /* Wait for the completion of the write operation to the LPTIM_ARR register */
|
|---|
| 475 | if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT)
|
|---|
| 476 | {
|
|---|
| 477 | return HAL_TIMEOUT;
|
|---|
| 478 | }
|
|---|
| 479 |
|
|---|
| 480 | /* Clear flag */
|
|---|
| 481 | __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_CMPOK);
|
|---|
| 482 |
|
|---|
| 483 | /* Load the pulse value in the compare register */
|
|---|
| 484 | __HAL_LPTIM_COMPARE_SET(hlptim, Pulse);
|
|---|
| 485 |
|
|---|
| 486 | /* Wait for the completion of the write operation to the LPTIM_CMP register */
|
|---|
| 487 | if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_CMPOK) == HAL_TIMEOUT)
|
|---|
| 488 | {
|
|---|
| 489 | return HAL_TIMEOUT;
|
|---|
| 490 | }
|
|---|
| 491 |
|
|---|
| 492 | /* Start timer in continuous mode */
|
|---|
| 493 | __HAL_LPTIM_START_CONTINUOUS(hlptim);
|
|---|
| 494 |
|
|---|
| 495 | /* Change the TIM state*/
|
|---|
| 496 | hlptim->State = HAL_LPTIM_STATE_READY;
|
|---|
| 497 |
|
|---|
| 498 | /* Return function status */
|
|---|
| 499 | return HAL_OK;
|
|---|
| 500 | }
|
|---|
| 501 |
|
|---|
| 502 | /**
|
|---|
| 503 | * @brief Stop the LPTIM PWM generation.
|
|---|
| 504 | * @param hlptim LPTIM handle
|
|---|
| 505 | * @retval HAL status
|
|---|
| 506 | */
|
|---|
| 507 | HAL_StatusTypeDef HAL_LPTIM_PWM_Stop(LPTIM_HandleTypeDef *hlptim)
|
|---|
| 508 | {
|
|---|
| 509 | /* Check the parameters */
|
|---|
| 510 | assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
|
|---|
| 511 |
|
|---|
| 512 | /* Set the LPTIM state */
|
|---|
| 513 | hlptim->State = HAL_LPTIM_STATE_BUSY;
|
|---|
| 514 |
|
|---|
| 515 | /* Disable the Peripheral */
|
|---|
| 516 | __HAL_LPTIM_DISABLE(hlptim);
|
|---|
| 517 |
|
|---|
| 518 | if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
|
|---|
| 519 | {
|
|---|
| 520 | return HAL_TIMEOUT;
|
|---|
| 521 | }
|
|---|
| 522 |
|
|---|
| 523 | /* Change the TIM state*/
|
|---|
| 524 | hlptim->State = HAL_LPTIM_STATE_READY;
|
|---|
| 525 |
|
|---|
| 526 | /* Return function status */
|
|---|
| 527 | return HAL_OK;
|
|---|
| 528 | }
|
|---|
| 529 |
|
|---|
| 530 | /**
|
|---|
| 531 | * @brief Start the LPTIM PWM generation in interrupt mode.
|
|---|
| 532 | * @param hlptim LPTIM handle
|
|---|
| 533 | * @param Period Specifies the Autoreload value.
|
|---|
| 534 | * This parameter must be a value between 0x0000 and 0xFFFF
|
|---|
| 535 | * @param Pulse Specifies the compare value.
|
|---|
| 536 | * This parameter must be a value between 0x0000 and 0xFFFF
|
|---|
| 537 | * @retval HAL status
|
|---|
| 538 | */
|
|---|
| 539 | HAL_StatusTypeDef HAL_LPTIM_PWM_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse)
|
|---|
| 540 | {
|
|---|
| 541 | /* Check the parameters */
|
|---|
| 542 | assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
|
|---|
| 543 | assert_param(IS_LPTIM_PERIOD(Period));
|
|---|
| 544 | assert_param(IS_LPTIM_PULSE(Pulse));
|
|---|
| 545 |
|
|---|
| 546 | /* Set the LPTIM state */
|
|---|
| 547 | hlptim->State = HAL_LPTIM_STATE_BUSY;
|
|---|
| 548 |
|
|---|
| 549 | /* Reset WAVE bit to set PWM mode */
|
|---|
| 550 | hlptim->Instance->CFGR &= ~LPTIM_CFGR_WAVE;
|
|---|
| 551 |
|
|---|
| 552 | /* Enable the Peripheral */
|
|---|
| 553 | __HAL_LPTIM_ENABLE(hlptim);
|
|---|
| 554 |
|
|---|
| 555 | /* Clear flag */
|
|---|
| 556 | __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
|
|---|
| 557 |
|
|---|
| 558 | /* Load the period value in the autoreload register */
|
|---|
| 559 | __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
|
|---|
| 560 |
|
|---|
| 561 | /* Wait for the completion of the write operation to the LPTIM_ARR register */
|
|---|
| 562 | if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT)
|
|---|
| 563 | {
|
|---|
| 564 | return HAL_TIMEOUT;
|
|---|
| 565 | }
|
|---|
| 566 |
|
|---|
| 567 | /* Clear flag */
|
|---|
| 568 | __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_CMPOK);
|
|---|
| 569 |
|
|---|
| 570 | /* Load the pulse value in the compare register */
|
|---|
| 571 | __HAL_LPTIM_COMPARE_SET(hlptim, Pulse);
|
|---|
| 572 |
|
|---|
| 573 | /* Wait for the completion of the write operation to the LPTIM_CMP register */
|
|---|
| 574 | if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_CMPOK) == HAL_TIMEOUT)
|
|---|
| 575 | {
|
|---|
| 576 | return HAL_TIMEOUT;
|
|---|
| 577 | }
|
|---|
| 578 |
|
|---|
| 579 | /* Disable the Peripheral */
|
|---|
| 580 | __HAL_LPTIM_DISABLE(hlptim);
|
|---|
| 581 |
|
|---|
| 582 | if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
|
|---|
| 583 | {
|
|---|
| 584 | return HAL_TIMEOUT;
|
|---|
| 585 | }
|
|---|
| 586 |
|
|---|
| 587 | /* Enable Autoreload write complete interrupt */
|
|---|
| 588 | __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_ARROK);
|
|---|
| 589 |
|
|---|
| 590 | /* Enable Compare write complete interrupt */
|
|---|
| 591 | __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_CMPOK);
|
|---|
| 592 |
|
|---|
| 593 | /* Enable Autoreload match interrupt */
|
|---|
| 594 | __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_ARRM);
|
|---|
| 595 |
|
|---|
| 596 | /* Enable Compare match interrupt */
|
|---|
| 597 | __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_CMPM);
|
|---|
| 598 |
|
|---|
| 599 | /* If external trigger source is used, then enable external trigger interrupt */
|
|---|
| 600 | if ((hlptim->Init.Trigger.Source) != LPTIM_TRIGSOURCE_SOFTWARE)
|
|---|
| 601 | {
|
|---|
| 602 | /* Enable external trigger interrupt */
|
|---|
| 603 | __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_EXTTRIG);
|
|---|
| 604 | }
|
|---|
| 605 |
|
|---|
| 606 | /* Enable the Peripheral */
|
|---|
| 607 | __HAL_LPTIM_ENABLE(hlptim);
|
|---|
| 608 |
|
|---|
| 609 | /* Start timer in continuous mode */
|
|---|
| 610 | __HAL_LPTIM_START_CONTINUOUS(hlptim);
|
|---|
| 611 |
|
|---|
| 612 | /* Change the TIM state*/
|
|---|
| 613 | hlptim->State = HAL_LPTIM_STATE_READY;
|
|---|
| 614 |
|
|---|
| 615 | /* Return function status */
|
|---|
| 616 | return HAL_OK;
|
|---|
| 617 | }
|
|---|
| 618 |
|
|---|
| 619 | /**
|
|---|
| 620 | * @brief Stop the LPTIM PWM generation in interrupt mode.
|
|---|
| 621 | * @param hlptim LPTIM handle
|
|---|
| 622 | * @retval HAL status
|
|---|
| 623 | */
|
|---|
| 624 | HAL_StatusTypeDef HAL_LPTIM_PWM_Stop_IT(LPTIM_HandleTypeDef *hlptim)
|
|---|
| 625 | {
|
|---|
| 626 | /* Check the parameters */
|
|---|
| 627 | assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
|
|---|
| 628 |
|
|---|
| 629 | /* Set the LPTIM state */
|
|---|
| 630 | hlptim->State = HAL_LPTIM_STATE_BUSY;
|
|---|
| 631 |
|
|---|
| 632 | /* Disable the Peripheral */
|
|---|
| 633 | __HAL_LPTIM_DISABLE(hlptim);
|
|---|
| 634 |
|
|---|
| 635 | if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
|
|---|
| 636 | {
|
|---|
| 637 | return HAL_TIMEOUT;
|
|---|
| 638 | }
|
|---|
| 639 |
|
|---|
| 640 | /* Disable Autoreload write complete interrupt */
|
|---|
| 641 | __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_ARROK);
|
|---|
| 642 |
|
|---|
| 643 | /* Disable Compare write complete interrupt */
|
|---|
| 644 | __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_CMPOK);
|
|---|
| 645 |
|
|---|
| 646 | /* Disable Autoreload match interrupt */
|
|---|
| 647 | __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_ARRM);
|
|---|
| 648 |
|
|---|
| 649 | /* Disable Compare match interrupt */
|
|---|
| 650 | __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_CMPM);
|
|---|
| 651 |
|
|---|
| 652 | /* If external trigger source is used, then disable external trigger interrupt */
|
|---|
| 653 | if ((hlptim->Init.Trigger.Source) != LPTIM_TRIGSOURCE_SOFTWARE)
|
|---|
| 654 | {
|
|---|
| 655 | /* Disable external trigger interrupt */
|
|---|
| 656 | __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_EXTTRIG);
|
|---|
| 657 | }
|
|---|
| 658 |
|
|---|
| 659 | /* Change the TIM state*/
|
|---|
| 660 | hlptim->State = HAL_LPTIM_STATE_READY;
|
|---|
| 661 |
|
|---|
| 662 | /* Return function status */
|
|---|
| 663 | return HAL_OK;
|
|---|
| 664 | }
|
|---|
| 665 |
|
|---|
| 666 | /**
|
|---|
| 667 | * @brief Start the LPTIM One pulse generation.
|
|---|
| 668 | * @param hlptim LPTIM handle
|
|---|
| 669 | * @param Period Specifies the Autoreload value.
|
|---|
| 670 | * This parameter must be a value between 0x0000 and 0xFFFF.
|
|---|
| 671 | * @param Pulse Specifies the compare value.
|
|---|
| 672 | * This parameter must be a value between 0x0000 and 0xFFFF.
|
|---|
| 673 | * @retval HAL status
|
|---|
| 674 | */
|
|---|
| 675 | HAL_StatusTypeDef HAL_LPTIM_OnePulse_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse)
|
|---|
| 676 | {
|
|---|
| 677 | /* Check the parameters */
|
|---|
| 678 | assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
|
|---|
| 679 | assert_param(IS_LPTIM_PERIOD(Period));
|
|---|
| 680 | assert_param(IS_LPTIM_PULSE(Pulse));
|
|---|
| 681 |
|
|---|
| 682 | /* Set the LPTIM state */
|
|---|
| 683 | hlptim->State = HAL_LPTIM_STATE_BUSY;
|
|---|
| 684 |
|
|---|
| 685 | /* Reset WAVE bit to set one pulse mode */
|
|---|
| 686 | hlptim->Instance->CFGR &= ~LPTIM_CFGR_WAVE;
|
|---|
| 687 |
|
|---|
| 688 | /* Enable the Peripheral */
|
|---|
| 689 | __HAL_LPTIM_ENABLE(hlptim);
|
|---|
| 690 |
|
|---|
| 691 | /* Clear flag */
|
|---|
| 692 | __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
|
|---|
| 693 |
|
|---|
| 694 | /* Load the period value in the autoreload register */
|
|---|
| 695 | __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
|
|---|
| 696 |
|
|---|
| 697 | /* Wait for the completion of the write operation to the LPTIM_ARR register */
|
|---|
| 698 | if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT)
|
|---|
| 699 | {
|
|---|
| 700 | return HAL_TIMEOUT;
|
|---|
| 701 | }
|
|---|
| 702 |
|
|---|
| 703 | /* Clear flag */
|
|---|
| 704 | __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_CMPOK);
|
|---|
| 705 |
|
|---|
| 706 | /* Load the pulse value in the compare register */
|
|---|
| 707 | __HAL_LPTIM_COMPARE_SET(hlptim, Pulse);
|
|---|
| 708 |
|
|---|
| 709 | /* Wait for the completion of the write operation to the LPTIM_CMP register */
|
|---|
| 710 | if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_CMPOK) == HAL_TIMEOUT)
|
|---|
| 711 | {
|
|---|
| 712 | return HAL_TIMEOUT;
|
|---|
| 713 | }
|
|---|
| 714 |
|
|---|
| 715 | /* Start timer in single (one shot) mode */
|
|---|
| 716 | __HAL_LPTIM_START_SINGLE(hlptim);
|
|---|
| 717 |
|
|---|
| 718 | /* Change the TIM state*/
|
|---|
| 719 | hlptim->State = HAL_LPTIM_STATE_READY;
|
|---|
| 720 |
|
|---|
| 721 | /* Return function status */
|
|---|
| 722 | return HAL_OK;
|
|---|
| 723 | }
|
|---|
| 724 |
|
|---|
| 725 | /**
|
|---|
| 726 | * @brief Stop the LPTIM One pulse generation.
|
|---|
| 727 | * @param hlptim LPTIM handle
|
|---|
| 728 | * @retval HAL status
|
|---|
| 729 | */
|
|---|
| 730 | HAL_StatusTypeDef HAL_LPTIM_OnePulse_Stop(LPTIM_HandleTypeDef *hlptim)
|
|---|
| 731 | {
|
|---|
| 732 | /* Check the parameters */
|
|---|
| 733 | assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
|
|---|
| 734 |
|
|---|
| 735 | /* Set the LPTIM state */
|
|---|
| 736 | hlptim->State = HAL_LPTIM_STATE_BUSY;
|
|---|
| 737 |
|
|---|
| 738 | /* Disable the Peripheral */
|
|---|
| 739 | __HAL_LPTIM_DISABLE(hlptim);
|
|---|
| 740 |
|
|---|
| 741 | if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
|
|---|
| 742 | {
|
|---|
| 743 | return HAL_TIMEOUT;
|
|---|
| 744 | }
|
|---|
| 745 |
|
|---|
| 746 | /* Change the TIM state*/
|
|---|
| 747 | hlptim->State = HAL_LPTIM_STATE_READY;
|
|---|
| 748 |
|
|---|
| 749 | /* Return function status */
|
|---|
| 750 | return HAL_OK;
|
|---|
| 751 | }
|
|---|
| 752 |
|
|---|
| 753 | /**
|
|---|
| 754 | * @brief Start the LPTIM One pulse generation in interrupt mode.
|
|---|
| 755 | * @param hlptim LPTIM handle
|
|---|
| 756 | * @param Period Specifies the Autoreload value.
|
|---|
| 757 | * This parameter must be a value between 0x0000 and 0xFFFF.
|
|---|
| 758 | * @param Pulse Specifies the compare value.
|
|---|
| 759 | * This parameter must be a value between 0x0000 and 0xFFFF.
|
|---|
| 760 | * @retval HAL status
|
|---|
| 761 | */
|
|---|
| 762 | HAL_StatusTypeDef HAL_LPTIM_OnePulse_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse)
|
|---|
| 763 | {
|
|---|
| 764 | /* Check the parameters */
|
|---|
| 765 | assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
|
|---|
| 766 | assert_param(IS_LPTIM_PERIOD(Period));
|
|---|
| 767 | assert_param(IS_LPTIM_PULSE(Pulse));
|
|---|
| 768 |
|
|---|
| 769 | /* Set the LPTIM state */
|
|---|
| 770 | hlptim->State = HAL_LPTIM_STATE_BUSY;
|
|---|
| 771 |
|
|---|
| 772 | /* Reset WAVE bit to set one pulse mode */
|
|---|
| 773 | hlptim->Instance->CFGR &= ~LPTIM_CFGR_WAVE;
|
|---|
| 774 |
|
|---|
| 775 | /* Enable the Peripheral */
|
|---|
| 776 | __HAL_LPTIM_ENABLE(hlptim);
|
|---|
| 777 |
|
|---|
| 778 | /* Clear flag */
|
|---|
| 779 | __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
|
|---|
| 780 |
|
|---|
| 781 | /* Load the period value in the autoreload register */
|
|---|
| 782 | __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
|
|---|
| 783 |
|
|---|
| 784 | /* Wait for the completion of the write operation to the LPTIM_ARR register */
|
|---|
| 785 | if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT)
|
|---|
| 786 | {
|
|---|
| 787 | return HAL_TIMEOUT;
|
|---|
| 788 | }
|
|---|
| 789 |
|
|---|
| 790 | /* Clear flag */
|
|---|
| 791 | __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_CMPOK);
|
|---|
| 792 |
|
|---|
| 793 | /* Load the pulse value in the compare register */
|
|---|
| 794 | __HAL_LPTIM_COMPARE_SET(hlptim, Pulse);
|
|---|
| 795 |
|
|---|
| 796 | /* Wait for the completion of the write operation to the LPTIM_CMP register */
|
|---|
| 797 | if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_CMPOK) == HAL_TIMEOUT)
|
|---|
| 798 | {
|
|---|
| 799 | return HAL_TIMEOUT;
|
|---|
| 800 | }
|
|---|
| 801 |
|
|---|
| 802 | /* Disable the Peripheral */
|
|---|
| 803 | __HAL_LPTIM_DISABLE(hlptim);
|
|---|
| 804 |
|
|---|
| 805 | if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
|
|---|
| 806 | {
|
|---|
| 807 | return HAL_TIMEOUT;
|
|---|
| 808 | }
|
|---|
| 809 |
|
|---|
| 810 | /* Enable Autoreload write complete interrupt */
|
|---|
| 811 | __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_ARROK);
|
|---|
| 812 |
|
|---|
| 813 | /* Enable Compare write complete interrupt */
|
|---|
| 814 | __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_CMPOK);
|
|---|
| 815 |
|
|---|
| 816 | /* Enable Autoreload match interrupt */
|
|---|
| 817 | __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_ARRM);
|
|---|
| 818 |
|
|---|
| 819 | /* Enable Compare match interrupt */
|
|---|
| 820 | __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_CMPM);
|
|---|
| 821 |
|
|---|
| 822 | /* If external trigger source is used, then enable external trigger interrupt */
|
|---|
| 823 | if ((hlptim->Init.Trigger.Source) != LPTIM_TRIGSOURCE_SOFTWARE)
|
|---|
| 824 | {
|
|---|
| 825 | /* Enable external trigger interrupt */
|
|---|
| 826 | __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_EXTTRIG);
|
|---|
| 827 | }
|
|---|
| 828 |
|
|---|
| 829 | /* Enable the Peripheral */
|
|---|
| 830 | __HAL_LPTIM_ENABLE(hlptim);
|
|---|
| 831 |
|
|---|
| 832 | /* Start timer in single (one shot) mode */
|
|---|
| 833 | __HAL_LPTIM_START_SINGLE(hlptim);
|
|---|
| 834 |
|
|---|
| 835 | /* Change the TIM state*/
|
|---|
| 836 | hlptim->State = HAL_LPTIM_STATE_READY;
|
|---|
| 837 |
|
|---|
| 838 | /* Return function status */
|
|---|
| 839 | return HAL_OK;
|
|---|
| 840 | }
|
|---|
| 841 |
|
|---|
| 842 | /**
|
|---|
| 843 | * @brief Stop the LPTIM One pulse generation in interrupt mode.
|
|---|
| 844 | * @param hlptim LPTIM handle
|
|---|
| 845 | * @retval HAL status
|
|---|
| 846 | */
|
|---|
| 847 | HAL_StatusTypeDef HAL_LPTIM_OnePulse_Stop_IT(LPTIM_HandleTypeDef *hlptim)
|
|---|
| 848 | {
|
|---|
| 849 | /* Check the parameters */
|
|---|
| 850 | assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
|
|---|
| 851 |
|
|---|
| 852 | /* Set the LPTIM state */
|
|---|
| 853 | hlptim->State = HAL_LPTIM_STATE_BUSY;
|
|---|
| 854 |
|
|---|
| 855 | /* Disable the Peripheral */
|
|---|
| 856 | __HAL_LPTIM_DISABLE(hlptim);
|
|---|
| 857 |
|
|---|
| 858 | if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
|
|---|
| 859 | {
|
|---|
| 860 | return HAL_TIMEOUT;
|
|---|
| 861 | }
|
|---|
| 862 |
|
|---|
| 863 | /* Disable Autoreload write complete interrupt */
|
|---|
| 864 | __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_ARROK);
|
|---|
| 865 |
|
|---|
| 866 | /* Disable Compare write complete interrupt */
|
|---|
| 867 | __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_CMPOK);
|
|---|
| 868 |
|
|---|
| 869 | /* Disable Autoreload match interrupt */
|
|---|
| 870 | __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_ARRM);
|
|---|
| 871 |
|
|---|
| 872 | /* Disable Compare match interrupt */
|
|---|
| 873 | __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_CMPM);
|
|---|
| 874 |
|
|---|
| 875 | /* If external trigger source is used, then disable external trigger interrupt */
|
|---|
| 876 | if ((hlptim->Init.Trigger.Source) != LPTIM_TRIGSOURCE_SOFTWARE)
|
|---|
| 877 | {
|
|---|
| 878 | /* Disable external trigger interrupt */
|
|---|
| 879 | __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_EXTTRIG);
|
|---|
| 880 | }
|
|---|
| 881 |
|
|---|
| 882 | /* Change the TIM state*/
|
|---|
| 883 | hlptim->State = HAL_LPTIM_STATE_READY;
|
|---|
| 884 |
|
|---|
| 885 | /* Return function status */
|
|---|
| 886 | return HAL_OK;
|
|---|
| 887 | }
|
|---|
| 888 |
|
|---|
| 889 | /**
|
|---|
| 890 | * @brief Start the LPTIM in Set once mode.
|
|---|
| 891 | * @param hlptim LPTIM handle
|
|---|
| 892 | * @param Period Specifies the Autoreload value.
|
|---|
| 893 | * This parameter must be a value between 0x0000 and 0xFFFF.
|
|---|
| 894 | * @param Pulse Specifies the compare value.
|
|---|
| 895 | * This parameter must be a value between 0x0000 and 0xFFFF.
|
|---|
| 896 | * @retval HAL status
|
|---|
| 897 | */
|
|---|
| 898 | HAL_StatusTypeDef HAL_LPTIM_SetOnce_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse)
|
|---|
| 899 | {
|
|---|
| 900 | /* Check the parameters */
|
|---|
| 901 | assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
|
|---|
| 902 | assert_param(IS_LPTIM_PERIOD(Period));
|
|---|
| 903 | assert_param(IS_LPTIM_PULSE(Pulse));
|
|---|
| 904 |
|
|---|
| 905 | /* Set the LPTIM state */
|
|---|
| 906 | hlptim->State = HAL_LPTIM_STATE_BUSY;
|
|---|
| 907 |
|
|---|
| 908 | /* Set WAVE bit to enable the set once mode */
|
|---|
| 909 | hlptim->Instance->CFGR |= LPTIM_CFGR_WAVE;
|
|---|
| 910 |
|
|---|
| 911 | /* Enable the Peripheral */
|
|---|
| 912 | __HAL_LPTIM_ENABLE(hlptim);
|
|---|
| 913 |
|
|---|
| 914 | /* Clear flag */
|
|---|
| 915 | __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
|
|---|
| 916 |
|
|---|
| 917 | /* Load the period value in the autoreload register */
|
|---|
| 918 | __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
|
|---|
| 919 |
|
|---|
| 920 | /* Wait for the completion of the write operation to the LPTIM_ARR register */
|
|---|
| 921 | if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT)
|
|---|
| 922 | {
|
|---|
| 923 | return HAL_TIMEOUT;
|
|---|
| 924 | }
|
|---|
| 925 |
|
|---|
| 926 | /* Clear flag */
|
|---|
| 927 | __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_CMPOK);
|
|---|
| 928 |
|
|---|
| 929 | /* Load the pulse value in the compare register */
|
|---|
| 930 | __HAL_LPTIM_COMPARE_SET(hlptim, Pulse);
|
|---|
| 931 |
|
|---|
| 932 | /* Wait for the completion of the write operation to the LPTIM_CMP register */
|
|---|
| 933 | if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_CMPOK) == HAL_TIMEOUT)
|
|---|
| 934 | {
|
|---|
| 935 | return HAL_TIMEOUT;
|
|---|
| 936 | }
|
|---|
| 937 |
|
|---|
| 938 | /* Start timer in single (one shot) mode */
|
|---|
| 939 | __HAL_LPTIM_START_SINGLE(hlptim);
|
|---|
| 940 |
|
|---|
| 941 | /* Change the TIM state*/
|
|---|
| 942 | hlptim->State = HAL_LPTIM_STATE_READY;
|
|---|
| 943 |
|
|---|
| 944 | /* Return function status */
|
|---|
| 945 | return HAL_OK;
|
|---|
| 946 | }
|
|---|
| 947 |
|
|---|
| 948 | /**
|
|---|
| 949 | * @brief Stop the LPTIM Set once mode.
|
|---|
| 950 | * @param hlptim LPTIM handle
|
|---|
| 951 | * @retval HAL status
|
|---|
| 952 | */
|
|---|
| 953 | HAL_StatusTypeDef HAL_LPTIM_SetOnce_Stop(LPTIM_HandleTypeDef *hlptim)
|
|---|
| 954 | {
|
|---|
| 955 | /* Check the parameters */
|
|---|
| 956 | assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
|
|---|
| 957 |
|
|---|
| 958 | /* Set the LPTIM state */
|
|---|
| 959 | hlptim->State = HAL_LPTIM_STATE_BUSY;
|
|---|
| 960 |
|
|---|
| 961 | /* Disable the Peripheral */
|
|---|
| 962 | __HAL_LPTIM_DISABLE(hlptim);
|
|---|
| 963 |
|
|---|
| 964 | if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
|
|---|
| 965 | {
|
|---|
| 966 | return HAL_TIMEOUT;
|
|---|
| 967 | }
|
|---|
| 968 |
|
|---|
| 969 | /* Change the TIM state*/
|
|---|
| 970 | hlptim->State = HAL_LPTIM_STATE_READY;
|
|---|
| 971 |
|
|---|
| 972 | /* Return function status */
|
|---|
| 973 | return HAL_OK;
|
|---|
| 974 | }
|
|---|
| 975 |
|
|---|
| 976 | /**
|
|---|
| 977 | * @brief Start the LPTIM Set once mode in interrupt mode.
|
|---|
| 978 | * @param hlptim LPTIM handle
|
|---|
| 979 | * @param Period Specifies the Autoreload value.
|
|---|
| 980 | * This parameter must be a value between 0x0000 and 0xFFFF.
|
|---|
| 981 | * @param Pulse Specifies the compare value.
|
|---|
| 982 | * This parameter must be a value between 0x0000 and 0xFFFF.
|
|---|
| 983 | * @retval HAL status
|
|---|
| 984 | */
|
|---|
| 985 | HAL_StatusTypeDef HAL_LPTIM_SetOnce_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse)
|
|---|
| 986 | {
|
|---|
| 987 | /* Check the parameters */
|
|---|
| 988 | assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
|
|---|
| 989 | assert_param(IS_LPTIM_PERIOD(Period));
|
|---|
| 990 | assert_param(IS_LPTIM_PULSE(Pulse));
|
|---|
| 991 |
|
|---|
| 992 | /* Set the LPTIM state */
|
|---|
| 993 | hlptim->State = HAL_LPTIM_STATE_BUSY;
|
|---|
| 994 |
|
|---|
| 995 | /* Set WAVE bit to enable the set once mode */
|
|---|
| 996 | hlptim->Instance->CFGR |= LPTIM_CFGR_WAVE;
|
|---|
| 997 |
|
|---|
| 998 | /* Enable the Peripheral */
|
|---|
| 999 | __HAL_LPTIM_ENABLE(hlptim);
|
|---|
| 1000 |
|
|---|
| 1001 | /* Clear flag */
|
|---|
| 1002 | __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
|
|---|
| 1003 |
|
|---|
| 1004 | /* Load the period value in the autoreload register */
|
|---|
| 1005 | __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
|
|---|
| 1006 |
|
|---|
| 1007 | /* Wait for the completion of the write operation to the LPTIM_ARR register */
|
|---|
| 1008 | if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT)
|
|---|
| 1009 | {
|
|---|
| 1010 | return HAL_TIMEOUT;
|
|---|
| 1011 | }
|
|---|
| 1012 |
|
|---|
| 1013 | /* Clear flag */
|
|---|
| 1014 | __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_CMPOK);
|
|---|
| 1015 |
|
|---|
| 1016 | /* Load the pulse value in the compare register */
|
|---|
| 1017 | __HAL_LPTIM_COMPARE_SET(hlptim, Pulse);
|
|---|
| 1018 |
|
|---|
| 1019 | /* Wait for the completion of the write operation to the LPTIM_CMP register */
|
|---|
| 1020 | if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_CMPOK) == HAL_TIMEOUT)
|
|---|
| 1021 | {
|
|---|
| 1022 | return HAL_TIMEOUT;
|
|---|
| 1023 | }
|
|---|
| 1024 |
|
|---|
| 1025 | /* Disable the Peripheral */
|
|---|
| 1026 | __HAL_LPTIM_DISABLE(hlptim);
|
|---|
| 1027 |
|
|---|
| 1028 | if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
|
|---|
| 1029 | {
|
|---|
| 1030 | return HAL_TIMEOUT;
|
|---|
| 1031 | }
|
|---|
| 1032 |
|
|---|
| 1033 | /* Enable Autoreload write complete interrupt */
|
|---|
| 1034 | __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_ARROK);
|
|---|
| 1035 |
|
|---|
| 1036 | /* Enable Compare write complete interrupt */
|
|---|
| 1037 | __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_CMPOK);
|
|---|
| 1038 |
|
|---|
| 1039 | /* Enable Autoreload match interrupt */
|
|---|
| 1040 | __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_ARRM);
|
|---|
| 1041 |
|
|---|
| 1042 | /* Enable Compare match interrupt */
|
|---|
| 1043 | __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_CMPM);
|
|---|
| 1044 |
|
|---|
| 1045 | /* If external trigger source is used, then enable external trigger interrupt */
|
|---|
| 1046 | if ((hlptim->Init.Trigger.Source) != LPTIM_TRIGSOURCE_SOFTWARE)
|
|---|
| 1047 | {
|
|---|
| 1048 | /* Enable external trigger interrupt */
|
|---|
| 1049 | __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_EXTTRIG);
|
|---|
| 1050 | }
|
|---|
| 1051 |
|
|---|
| 1052 | /* Enable the Peripheral */
|
|---|
| 1053 | __HAL_LPTIM_ENABLE(hlptim);
|
|---|
| 1054 |
|
|---|
| 1055 | /* Start timer in single (one shot) mode */
|
|---|
| 1056 | __HAL_LPTIM_START_SINGLE(hlptim);
|
|---|
| 1057 |
|
|---|
| 1058 | /* Change the TIM state*/
|
|---|
| 1059 | hlptim->State = HAL_LPTIM_STATE_READY;
|
|---|
| 1060 |
|
|---|
| 1061 | /* Return function status */
|
|---|
| 1062 | return HAL_OK;
|
|---|
| 1063 | }
|
|---|
| 1064 |
|
|---|
| 1065 | /**
|
|---|
| 1066 | * @brief Stop the LPTIM Set once mode in interrupt mode.
|
|---|
| 1067 | * @param hlptim LPTIM handle
|
|---|
| 1068 | * @retval HAL status
|
|---|
| 1069 | */
|
|---|
| 1070 | HAL_StatusTypeDef HAL_LPTIM_SetOnce_Stop_IT(LPTIM_HandleTypeDef *hlptim)
|
|---|
| 1071 | {
|
|---|
| 1072 | /* Check the parameters */
|
|---|
| 1073 | assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
|
|---|
| 1074 |
|
|---|
| 1075 | /* Set the LPTIM state */
|
|---|
| 1076 | hlptim->State = HAL_LPTIM_STATE_BUSY;
|
|---|
| 1077 |
|
|---|
| 1078 | /* Disable the Peripheral */
|
|---|
| 1079 | __HAL_LPTIM_DISABLE(hlptim);
|
|---|
| 1080 |
|
|---|
| 1081 | if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
|
|---|
| 1082 | {
|
|---|
| 1083 | return HAL_TIMEOUT;
|
|---|
| 1084 | }
|
|---|
| 1085 |
|
|---|
| 1086 | /* Disable Autoreload write complete interrupt */
|
|---|
| 1087 | __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_ARROK);
|
|---|
| 1088 |
|
|---|
| 1089 | /* Disable Compare write complete interrupt */
|
|---|
| 1090 | __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_CMPOK);
|
|---|
| 1091 |
|
|---|
| 1092 | /* Disable Autoreload match interrupt */
|
|---|
| 1093 | __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_ARRM);
|
|---|
| 1094 |
|
|---|
| 1095 | /* Disable Compare match interrupt */
|
|---|
| 1096 | __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_CMPM);
|
|---|
| 1097 |
|
|---|
| 1098 | /* If external trigger source is used, then disable external trigger interrupt */
|
|---|
| 1099 | if ((hlptim->Init.Trigger.Source) != LPTIM_TRIGSOURCE_SOFTWARE)
|
|---|
| 1100 | {
|
|---|
| 1101 | /* Disable external trigger interrupt */
|
|---|
| 1102 | __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_EXTTRIG);
|
|---|
| 1103 | }
|
|---|
| 1104 |
|
|---|
| 1105 | /* Change the TIM state*/
|
|---|
| 1106 | hlptim->State = HAL_LPTIM_STATE_READY;
|
|---|
| 1107 |
|
|---|
| 1108 | /* Return function status */
|
|---|
| 1109 | return HAL_OK;
|
|---|
| 1110 | }
|
|---|
| 1111 |
|
|---|
| 1112 | /**
|
|---|
| 1113 | * @brief Start the Encoder interface.
|
|---|
| 1114 | * @param hlptim LPTIM handle
|
|---|
| 1115 | * @param Period Specifies the Autoreload value.
|
|---|
| 1116 | * This parameter must be a value between 0x0000 and 0xFFFF.
|
|---|
| 1117 | * @retval HAL status
|
|---|
| 1118 | */
|
|---|
| 1119 | HAL_StatusTypeDef HAL_LPTIM_Encoder_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period)
|
|---|
| 1120 | {
|
|---|
| 1121 | uint32_t tmpcfgr;
|
|---|
| 1122 |
|
|---|
| 1123 | /* Check the parameters */
|
|---|
| 1124 | assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
|
|---|
| 1125 | assert_param(IS_LPTIM_PERIOD(Period));
|
|---|
| 1126 | assert_param(hlptim->Init.Clock.Source == LPTIM_CLOCKSOURCE_APBCLOCK_LPOSC);
|
|---|
| 1127 | assert_param(hlptim->Init.Clock.Prescaler == LPTIM_PRESCALER_DIV1);
|
|---|
| 1128 | assert_param(IS_LPTIM_CLOCK_POLARITY(hlptim->Init.UltraLowPowerClock.Polarity));
|
|---|
| 1129 |
|
|---|
| 1130 | /* Set the LPTIM state */
|
|---|
| 1131 | hlptim->State = HAL_LPTIM_STATE_BUSY;
|
|---|
| 1132 |
|
|---|
| 1133 | /* Get the LPTIMx CFGR value */
|
|---|
| 1134 | tmpcfgr = hlptim->Instance->CFGR;
|
|---|
| 1135 |
|
|---|
| 1136 | /* Clear CKPOL bits */
|
|---|
| 1137 | tmpcfgr &= (uint32_t)(~LPTIM_CFGR_CKPOL);
|
|---|
| 1138 |
|
|---|
| 1139 | /* Set Input polarity */
|
|---|
| 1140 | tmpcfgr |= hlptim->Init.UltraLowPowerClock.Polarity;
|
|---|
| 1141 |
|
|---|
| 1142 | /* Write to LPTIMx CFGR */
|
|---|
| 1143 | hlptim->Instance->CFGR = tmpcfgr;
|
|---|
| 1144 |
|
|---|
| 1145 | /* Set ENC bit to enable the encoder interface */
|
|---|
| 1146 | hlptim->Instance->CFGR |= LPTIM_CFGR_ENC;
|
|---|
| 1147 |
|
|---|
| 1148 | /* Enable the Peripheral */
|
|---|
| 1149 | __HAL_LPTIM_ENABLE(hlptim);
|
|---|
| 1150 |
|
|---|
| 1151 | /* Clear flag */
|
|---|
| 1152 | __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
|
|---|
| 1153 |
|
|---|
| 1154 | /* Load the period value in the autoreload register */
|
|---|
| 1155 | __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
|
|---|
| 1156 |
|
|---|
| 1157 | /* Wait for the completion of the write operation to the LPTIM_ARR register */
|
|---|
| 1158 | if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT)
|
|---|
| 1159 | {
|
|---|
| 1160 | return HAL_TIMEOUT;
|
|---|
| 1161 | }
|
|---|
| 1162 |
|
|---|
| 1163 | /* Start timer in continuous mode */
|
|---|
| 1164 | __HAL_LPTIM_START_CONTINUOUS(hlptim);
|
|---|
| 1165 |
|
|---|
| 1166 | /* Change the TIM state*/
|
|---|
| 1167 | hlptim->State = HAL_LPTIM_STATE_READY;
|
|---|
| 1168 |
|
|---|
| 1169 | /* Return function status */
|
|---|
| 1170 | return HAL_OK;
|
|---|
| 1171 | }
|
|---|
| 1172 |
|
|---|
| 1173 | /**
|
|---|
| 1174 | * @brief Stop the Encoder interface.
|
|---|
| 1175 | * @param hlptim LPTIM handle
|
|---|
| 1176 | * @retval HAL status
|
|---|
| 1177 | */
|
|---|
| 1178 | HAL_StatusTypeDef HAL_LPTIM_Encoder_Stop(LPTIM_HandleTypeDef *hlptim)
|
|---|
| 1179 | {
|
|---|
| 1180 | /* Check the parameters */
|
|---|
| 1181 | assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
|
|---|
| 1182 |
|
|---|
| 1183 | /* Set the LPTIM state */
|
|---|
| 1184 | hlptim->State = HAL_LPTIM_STATE_BUSY;
|
|---|
| 1185 |
|
|---|
| 1186 | /* Disable the Peripheral */
|
|---|
| 1187 | __HAL_LPTIM_DISABLE(hlptim);
|
|---|
| 1188 |
|
|---|
| 1189 | if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
|
|---|
| 1190 | {
|
|---|
| 1191 | return HAL_TIMEOUT;
|
|---|
| 1192 | }
|
|---|
| 1193 |
|
|---|
| 1194 | /* Reset ENC bit to disable the encoder interface */
|
|---|
| 1195 | hlptim->Instance->CFGR &= ~LPTIM_CFGR_ENC;
|
|---|
| 1196 |
|
|---|
| 1197 | /* Change the TIM state*/
|
|---|
| 1198 | hlptim->State = HAL_LPTIM_STATE_READY;
|
|---|
| 1199 |
|
|---|
| 1200 | /* Return function status */
|
|---|
| 1201 | return HAL_OK;
|
|---|
| 1202 | }
|
|---|
| 1203 |
|
|---|
| 1204 | /**
|
|---|
| 1205 | * @brief Start the Encoder interface in interrupt mode.
|
|---|
| 1206 | * @param hlptim LPTIM handle
|
|---|
| 1207 | * @param Period Specifies the Autoreload value.
|
|---|
| 1208 | * This parameter must be a value between 0x0000 and 0xFFFF.
|
|---|
| 1209 | * @retval HAL status
|
|---|
| 1210 | */
|
|---|
| 1211 | HAL_StatusTypeDef HAL_LPTIM_Encoder_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period)
|
|---|
| 1212 | {
|
|---|
| 1213 | uint32_t tmpcfgr;
|
|---|
| 1214 |
|
|---|
| 1215 | /* Check the parameters */
|
|---|
| 1216 | assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
|
|---|
| 1217 | assert_param(IS_LPTIM_PERIOD(Period));
|
|---|
| 1218 | assert_param(hlptim->Init.Clock.Source == LPTIM_CLOCKSOURCE_APBCLOCK_LPOSC);
|
|---|
| 1219 | assert_param(hlptim->Init.Clock.Prescaler == LPTIM_PRESCALER_DIV1);
|
|---|
| 1220 | assert_param(IS_LPTIM_CLOCK_POLARITY(hlptim->Init.UltraLowPowerClock.Polarity));
|
|---|
| 1221 |
|
|---|
| 1222 | /* Set the LPTIM state */
|
|---|
| 1223 | hlptim->State = HAL_LPTIM_STATE_BUSY;
|
|---|
| 1224 |
|
|---|
| 1225 | /* Configure edge sensitivity for encoder mode */
|
|---|
| 1226 | /* Get the LPTIMx CFGR value */
|
|---|
| 1227 | tmpcfgr = hlptim->Instance->CFGR;
|
|---|
| 1228 |
|
|---|
| 1229 | /* Clear CKPOL bits */
|
|---|
| 1230 | tmpcfgr &= (uint32_t)(~LPTIM_CFGR_CKPOL);
|
|---|
| 1231 |
|
|---|
| 1232 | /* Set Input polarity */
|
|---|
| 1233 | tmpcfgr |= hlptim->Init.UltraLowPowerClock.Polarity;
|
|---|
| 1234 |
|
|---|
| 1235 | /* Write to LPTIMx CFGR */
|
|---|
| 1236 | hlptim->Instance->CFGR = tmpcfgr;
|
|---|
| 1237 |
|
|---|
| 1238 | /* Set ENC bit to enable the encoder interface */
|
|---|
| 1239 | hlptim->Instance->CFGR |= LPTIM_CFGR_ENC;
|
|---|
| 1240 |
|
|---|
| 1241 | /* Enable the Peripheral */
|
|---|
| 1242 | __HAL_LPTIM_ENABLE(hlptim);
|
|---|
| 1243 |
|
|---|
| 1244 | /* Clear flag */
|
|---|
| 1245 | __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
|
|---|
| 1246 |
|
|---|
| 1247 | /* Load the period value in the autoreload register */
|
|---|
| 1248 | __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
|
|---|
| 1249 |
|
|---|
| 1250 | /* Wait for the completion of the write operation to the LPTIM_ARR register */
|
|---|
| 1251 | if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT)
|
|---|
| 1252 | {
|
|---|
| 1253 | return HAL_TIMEOUT;
|
|---|
| 1254 | }
|
|---|
| 1255 |
|
|---|
| 1256 | /* Disable the Peripheral */
|
|---|
| 1257 | __HAL_LPTIM_DISABLE(hlptim);
|
|---|
| 1258 |
|
|---|
| 1259 | if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
|
|---|
| 1260 | {
|
|---|
| 1261 | return HAL_TIMEOUT;
|
|---|
| 1262 | }
|
|---|
| 1263 |
|
|---|
| 1264 | /* Enable "switch to down direction" interrupt */
|
|---|
| 1265 | __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_DOWN);
|
|---|
| 1266 |
|
|---|
| 1267 | /* Enable "switch to up direction" interrupt */
|
|---|
| 1268 | __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_UP);
|
|---|
| 1269 |
|
|---|
| 1270 | /* Enable the Peripheral */
|
|---|
| 1271 | __HAL_LPTIM_ENABLE(hlptim);
|
|---|
| 1272 |
|
|---|
| 1273 | /* Start timer in continuous mode */
|
|---|
| 1274 | __HAL_LPTIM_START_CONTINUOUS(hlptim);
|
|---|
| 1275 |
|
|---|
| 1276 | /* Change the TIM state*/
|
|---|
| 1277 | hlptim->State = HAL_LPTIM_STATE_READY;
|
|---|
| 1278 |
|
|---|
| 1279 | /* Return function status */
|
|---|
| 1280 | return HAL_OK;
|
|---|
| 1281 | }
|
|---|
| 1282 |
|
|---|
| 1283 | /**
|
|---|
| 1284 | * @brief Stop the Encoder interface in interrupt mode.
|
|---|
| 1285 | * @param hlptim LPTIM handle
|
|---|
| 1286 | * @retval HAL status
|
|---|
| 1287 | */
|
|---|
| 1288 | HAL_StatusTypeDef HAL_LPTIM_Encoder_Stop_IT(LPTIM_HandleTypeDef *hlptim)
|
|---|
| 1289 | {
|
|---|
| 1290 | /* Check the parameters */
|
|---|
| 1291 | assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
|
|---|
| 1292 |
|
|---|
| 1293 | /* Set the LPTIM state */
|
|---|
| 1294 | hlptim->State = HAL_LPTIM_STATE_BUSY;
|
|---|
| 1295 |
|
|---|
| 1296 | /* Disable the Peripheral */
|
|---|
| 1297 | __HAL_LPTIM_DISABLE(hlptim);
|
|---|
| 1298 |
|
|---|
| 1299 | if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
|
|---|
| 1300 | {
|
|---|
| 1301 | return HAL_TIMEOUT;
|
|---|
| 1302 | }
|
|---|
| 1303 |
|
|---|
| 1304 | /* Reset ENC bit to disable the encoder interface */
|
|---|
| 1305 | hlptim->Instance->CFGR &= ~LPTIM_CFGR_ENC;
|
|---|
| 1306 |
|
|---|
| 1307 | /* Disable "switch to down direction" interrupt */
|
|---|
| 1308 | __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_DOWN);
|
|---|
| 1309 |
|
|---|
| 1310 | /* Disable "switch to up direction" interrupt */
|
|---|
| 1311 | __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_UP);
|
|---|
| 1312 |
|
|---|
| 1313 | /* Change the TIM state*/
|
|---|
| 1314 | hlptim->State = HAL_LPTIM_STATE_READY;
|
|---|
| 1315 |
|
|---|
| 1316 | /* Return function status */
|
|---|
| 1317 | return HAL_OK;
|
|---|
| 1318 | }
|
|---|
| 1319 |
|
|---|
| 1320 | /**
|
|---|
| 1321 | * @brief Start the Timeout function.
|
|---|
| 1322 | * @note The first trigger event will start the timer, any successive
|
|---|
| 1323 | * trigger event will reset the counter and the timer restarts.
|
|---|
| 1324 | * @param hlptim LPTIM handle
|
|---|
| 1325 | * @param Period Specifies the Autoreload value.
|
|---|
| 1326 | * This parameter must be a value between 0x0000 and 0xFFFF.
|
|---|
| 1327 | * @param Timeout Specifies the TimeOut value to reset the counter.
|
|---|
| 1328 | * This parameter must be a value between 0x0000 and 0xFFFF.
|
|---|
| 1329 | * @retval HAL status
|
|---|
| 1330 | */
|
|---|
| 1331 | HAL_StatusTypeDef HAL_LPTIM_TimeOut_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Timeout)
|
|---|
| 1332 | {
|
|---|
| 1333 | /* Check the parameters */
|
|---|
| 1334 | assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
|
|---|
| 1335 | assert_param(IS_LPTIM_PERIOD(Period));
|
|---|
| 1336 | assert_param(IS_LPTIM_PULSE(Timeout));
|
|---|
| 1337 |
|
|---|
| 1338 | /* Set the LPTIM state */
|
|---|
| 1339 | hlptim->State = HAL_LPTIM_STATE_BUSY;
|
|---|
| 1340 |
|
|---|
| 1341 | /* Set TIMOUT bit to enable the timeout function */
|
|---|
| 1342 | hlptim->Instance->CFGR |= LPTIM_CFGR_TIMOUT;
|
|---|
| 1343 |
|
|---|
| 1344 | /* Enable the Peripheral */
|
|---|
| 1345 | __HAL_LPTIM_ENABLE(hlptim);
|
|---|
| 1346 |
|
|---|
| 1347 | /* Clear flag */
|
|---|
| 1348 | __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
|
|---|
| 1349 |
|
|---|
| 1350 | /* Load the period value in the autoreload register */
|
|---|
| 1351 | __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
|
|---|
| 1352 |
|
|---|
| 1353 | /* Wait for the completion of the write operation to the LPTIM_ARR register */
|
|---|
| 1354 | if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT)
|
|---|
| 1355 | {
|
|---|
| 1356 | return HAL_TIMEOUT;
|
|---|
| 1357 | }
|
|---|
| 1358 |
|
|---|
| 1359 | /* Clear flag */
|
|---|
| 1360 | __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_CMPOK);
|
|---|
| 1361 |
|
|---|
| 1362 | /* Load the Timeout value in the compare register */
|
|---|
| 1363 | __HAL_LPTIM_COMPARE_SET(hlptim, Timeout);
|
|---|
| 1364 |
|
|---|
| 1365 | /* Wait for the completion of the write operation to the LPTIM_CMP register */
|
|---|
| 1366 | if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_CMPOK) == HAL_TIMEOUT)
|
|---|
| 1367 | {
|
|---|
| 1368 | return HAL_TIMEOUT;
|
|---|
| 1369 | }
|
|---|
| 1370 |
|
|---|
| 1371 | /* Start timer in continuous mode */
|
|---|
| 1372 | __HAL_LPTIM_START_CONTINUOUS(hlptim);
|
|---|
| 1373 |
|
|---|
| 1374 | /* Change the TIM state*/
|
|---|
| 1375 | hlptim->State = HAL_LPTIM_STATE_READY;
|
|---|
| 1376 |
|
|---|
| 1377 | /* Return function status */
|
|---|
| 1378 | return HAL_OK;
|
|---|
| 1379 | }
|
|---|
| 1380 |
|
|---|
| 1381 | /**
|
|---|
| 1382 | * @brief Stop the Timeout function.
|
|---|
| 1383 | * @param hlptim LPTIM handle
|
|---|
| 1384 | * @retval HAL status
|
|---|
| 1385 | */
|
|---|
| 1386 | HAL_StatusTypeDef HAL_LPTIM_TimeOut_Stop(LPTIM_HandleTypeDef *hlptim)
|
|---|
| 1387 | {
|
|---|
| 1388 | /* Check the parameters */
|
|---|
| 1389 | assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
|
|---|
| 1390 |
|
|---|
| 1391 | /* Set the LPTIM state */
|
|---|
| 1392 | hlptim->State = HAL_LPTIM_STATE_BUSY;
|
|---|
| 1393 |
|
|---|
| 1394 | /* Disable the Peripheral */
|
|---|
| 1395 | __HAL_LPTIM_DISABLE(hlptim);
|
|---|
| 1396 |
|
|---|
| 1397 | if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
|
|---|
| 1398 | {
|
|---|
| 1399 | return HAL_TIMEOUT;
|
|---|
| 1400 | }
|
|---|
| 1401 |
|
|---|
| 1402 | /* Reset TIMOUT bit to enable the timeout function */
|
|---|
| 1403 | hlptim->Instance->CFGR &= ~LPTIM_CFGR_TIMOUT;
|
|---|
| 1404 |
|
|---|
| 1405 | /* Change the TIM state*/
|
|---|
| 1406 | hlptim->State = HAL_LPTIM_STATE_READY;
|
|---|
| 1407 |
|
|---|
| 1408 | /* Return function status */
|
|---|
| 1409 | return HAL_OK;
|
|---|
| 1410 | }
|
|---|
| 1411 |
|
|---|
| 1412 | /**
|
|---|
| 1413 | * @brief Start the Timeout function in interrupt mode.
|
|---|
| 1414 | * @note The first trigger event will start the timer, any successive
|
|---|
| 1415 | * trigger event will reset the counter and the timer restarts.
|
|---|
| 1416 | * @param hlptim LPTIM handle
|
|---|
| 1417 | * @param Period Specifies the Autoreload value.
|
|---|
| 1418 | * This parameter must be a value between 0x0000 and 0xFFFF.
|
|---|
| 1419 | * @param Timeout Specifies the TimeOut value to reset the counter.
|
|---|
| 1420 | * This parameter must be a value between 0x0000 and 0xFFFF.
|
|---|
| 1421 | * @retval HAL status
|
|---|
| 1422 | */
|
|---|
| 1423 | HAL_StatusTypeDef HAL_LPTIM_TimeOut_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Timeout)
|
|---|
| 1424 | {
|
|---|
| 1425 | /* Check the parameters */
|
|---|
| 1426 | assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
|
|---|
| 1427 | assert_param(IS_LPTIM_PERIOD(Period));
|
|---|
| 1428 | assert_param(IS_LPTIM_PULSE(Timeout));
|
|---|
| 1429 |
|
|---|
| 1430 | /* Set the LPTIM state */
|
|---|
| 1431 | hlptim->State = HAL_LPTIM_STATE_BUSY;
|
|---|
| 1432 |
|
|---|
| 1433 | /* Enable EXTI Line interrupt on the LPTIM Wake-up Timer */
|
|---|
| 1434 | __HAL_LPTIM_WAKEUPTIMER_EXTI_ENABLE_IT();
|
|---|
| 1435 | #if defined(EXTI_IMR_MR23)
|
|---|
| 1436 | /* Enable rising edge trigger on the LPTIM Wake-up Timer Exti line */
|
|---|
| 1437 | __HAL_LPTIM_WAKEUPTIMER_EXTI_ENABLE_RISING_EDGE();
|
|---|
| 1438 | #endif /* EXTI_IMR_MR23 */
|
|---|
| 1439 |
|
|---|
| 1440 | /* Set TIMOUT bit to enable the timeout function */
|
|---|
| 1441 | hlptim->Instance->CFGR |= LPTIM_CFGR_TIMOUT;
|
|---|
| 1442 |
|
|---|
| 1443 | /* Enable the Peripheral */
|
|---|
| 1444 | __HAL_LPTIM_ENABLE(hlptim);
|
|---|
| 1445 |
|
|---|
| 1446 | /* Clear flag */
|
|---|
| 1447 | __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
|
|---|
| 1448 |
|
|---|
| 1449 | /* Load the period value in the autoreload register */
|
|---|
| 1450 | __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
|
|---|
| 1451 |
|
|---|
| 1452 | /* Wait for the completion of the write operation to the LPTIM_ARR register */
|
|---|
| 1453 | if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT)
|
|---|
| 1454 | {
|
|---|
| 1455 | return HAL_TIMEOUT;
|
|---|
| 1456 | }
|
|---|
| 1457 |
|
|---|
| 1458 | /* Clear flag */
|
|---|
| 1459 | __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_CMPOK);
|
|---|
| 1460 |
|
|---|
| 1461 | /* Load the Timeout value in the compare register */
|
|---|
| 1462 | __HAL_LPTIM_COMPARE_SET(hlptim, Timeout);
|
|---|
| 1463 |
|
|---|
| 1464 | /* Wait for the completion of the write operation to the LPTIM_CMP register */
|
|---|
| 1465 | if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_CMPOK) == HAL_TIMEOUT)
|
|---|
| 1466 | {
|
|---|
| 1467 | return HAL_TIMEOUT;
|
|---|
| 1468 | }
|
|---|
| 1469 |
|
|---|
| 1470 | /* Disable the Peripheral */
|
|---|
| 1471 | __HAL_LPTIM_DISABLE(hlptim);
|
|---|
| 1472 |
|
|---|
| 1473 | if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
|
|---|
| 1474 | {
|
|---|
| 1475 | return HAL_TIMEOUT;
|
|---|
| 1476 | }
|
|---|
| 1477 |
|
|---|
| 1478 | /* Enable Compare match interrupt */
|
|---|
| 1479 | __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_CMPM);
|
|---|
| 1480 |
|
|---|
| 1481 | /* Enable the Peripheral */
|
|---|
| 1482 | __HAL_LPTIM_ENABLE(hlptim);
|
|---|
| 1483 |
|
|---|
| 1484 | /* Start timer in continuous mode */
|
|---|
| 1485 | __HAL_LPTIM_START_CONTINUOUS(hlptim);
|
|---|
| 1486 |
|
|---|
| 1487 | /* Change the TIM state*/
|
|---|
| 1488 | hlptim->State = HAL_LPTIM_STATE_READY;
|
|---|
| 1489 |
|
|---|
| 1490 | /* Return function status */
|
|---|
| 1491 | return HAL_OK;
|
|---|
| 1492 | }
|
|---|
| 1493 |
|
|---|
| 1494 | /**
|
|---|
| 1495 | * @brief Stop the Timeout function in interrupt mode.
|
|---|
| 1496 | * @param hlptim LPTIM handle
|
|---|
| 1497 | * @retval HAL status
|
|---|
| 1498 | */
|
|---|
| 1499 | HAL_StatusTypeDef HAL_LPTIM_TimeOut_Stop_IT(LPTIM_HandleTypeDef *hlptim)
|
|---|
| 1500 | {
|
|---|
| 1501 | /* Check the parameters */
|
|---|
| 1502 | assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
|
|---|
| 1503 |
|
|---|
| 1504 | /* Set the LPTIM state */
|
|---|
| 1505 | hlptim->State = HAL_LPTIM_STATE_BUSY;
|
|---|
| 1506 | #if defined(EXTI_IMR_MR23)
|
|---|
| 1507 | /* Disable rising edge trigger on the LPTIM Wake-up Timer Exti line */
|
|---|
| 1508 | __HAL_LPTIM_WAKEUPTIMER_EXTI_DISABLE_RISING_EDGE();
|
|---|
| 1509 | #endif /* EXTI_IMR_MR23 */
|
|---|
| 1510 |
|
|---|
| 1511 | /* Disable EXTI Line interrupt on the LPTIM Wake-up Timer */
|
|---|
| 1512 | __HAL_LPTIM_WAKEUPTIMER_EXTI_DISABLE_IT();
|
|---|
| 1513 |
|
|---|
| 1514 | /* Disable the Peripheral */
|
|---|
| 1515 | __HAL_LPTIM_DISABLE(hlptim);
|
|---|
| 1516 |
|
|---|
| 1517 | if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
|
|---|
| 1518 | {
|
|---|
| 1519 | return HAL_TIMEOUT;
|
|---|
| 1520 | }
|
|---|
| 1521 |
|
|---|
| 1522 | /* Reset TIMOUT bit to enable the timeout function */
|
|---|
| 1523 | hlptim->Instance->CFGR &= ~LPTIM_CFGR_TIMOUT;
|
|---|
| 1524 |
|
|---|
| 1525 | /* Disable Compare match interrupt */
|
|---|
| 1526 | __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_CMPM);
|
|---|
| 1527 |
|
|---|
| 1528 | /* Change the TIM state*/
|
|---|
| 1529 | hlptim->State = HAL_LPTIM_STATE_READY;
|
|---|
| 1530 |
|
|---|
| 1531 | /* Return function status */
|
|---|
| 1532 | return HAL_OK;
|
|---|
| 1533 | }
|
|---|
| 1534 |
|
|---|
| 1535 | /**
|
|---|
| 1536 | * @brief Start the Counter mode.
|
|---|
| 1537 | * @param hlptim LPTIM handle
|
|---|
| 1538 | * @param Period Specifies the Autoreload value.
|
|---|
| 1539 | * This parameter must be a value between 0x0000 and 0xFFFF.
|
|---|
| 1540 | * @retval HAL status
|
|---|
| 1541 | */
|
|---|
| 1542 | HAL_StatusTypeDef HAL_LPTIM_Counter_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period)
|
|---|
| 1543 | {
|
|---|
| 1544 | /* Check the parameters */
|
|---|
| 1545 | assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
|
|---|
| 1546 | assert_param(IS_LPTIM_PERIOD(Period));
|
|---|
| 1547 |
|
|---|
| 1548 | /* Set the LPTIM state */
|
|---|
| 1549 | hlptim->State = HAL_LPTIM_STATE_BUSY;
|
|---|
| 1550 |
|
|---|
| 1551 | /* If clock source is not ULPTIM clock and counter source is external, then it must not be prescaled */
|
|---|
| 1552 | if ((hlptim->Init.Clock.Source != LPTIM_CLOCKSOURCE_ULPTIM)
|
|---|
| 1553 | && (hlptim->Init.CounterSource == LPTIM_COUNTERSOURCE_EXTERNAL))
|
|---|
| 1554 | {
|
|---|
| 1555 | /* Check if clock is prescaled */
|
|---|
| 1556 | assert_param(IS_LPTIM_CLOCK_PRESCALERDIV1(hlptim->Init.Clock.Prescaler));
|
|---|
| 1557 | /* Set clock prescaler to 0 */
|
|---|
| 1558 | hlptim->Instance->CFGR &= ~LPTIM_CFGR_PRESC;
|
|---|
| 1559 | }
|
|---|
| 1560 |
|
|---|
| 1561 | /* Enable the Peripheral */
|
|---|
| 1562 | __HAL_LPTIM_ENABLE(hlptim);
|
|---|
| 1563 |
|
|---|
| 1564 | /* Clear flag */
|
|---|
| 1565 | __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
|
|---|
| 1566 |
|
|---|
| 1567 | /* Load the period value in the autoreload register */
|
|---|
| 1568 | __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
|
|---|
| 1569 |
|
|---|
| 1570 | /* Wait for the completion of the write operation to the LPTIM_ARR register */
|
|---|
| 1571 | if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT)
|
|---|
| 1572 | {
|
|---|
| 1573 | return HAL_TIMEOUT;
|
|---|
| 1574 | }
|
|---|
| 1575 |
|
|---|
| 1576 | /* Start timer in continuous mode */
|
|---|
| 1577 | __HAL_LPTIM_START_CONTINUOUS(hlptim);
|
|---|
| 1578 |
|
|---|
| 1579 | /* Change the TIM state*/
|
|---|
| 1580 | hlptim->State = HAL_LPTIM_STATE_READY;
|
|---|
| 1581 |
|
|---|
| 1582 | /* Return function status */
|
|---|
| 1583 | return HAL_OK;
|
|---|
| 1584 | }
|
|---|
| 1585 |
|
|---|
| 1586 | /**
|
|---|
| 1587 | * @brief Stop the Counter mode.
|
|---|
| 1588 | * @param hlptim LPTIM handle
|
|---|
| 1589 | * @retval HAL status
|
|---|
| 1590 | */
|
|---|
| 1591 | HAL_StatusTypeDef HAL_LPTIM_Counter_Stop(LPTIM_HandleTypeDef *hlptim)
|
|---|
| 1592 | {
|
|---|
| 1593 | /* Check the parameters */
|
|---|
| 1594 | assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
|
|---|
| 1595 |
|
|---|
| 1596 | /* Set the LPTIM state */
|
|---|
| 1597 | hlptim->State = HAL_LPTIM_STATE_BUSY;
|
|---|
| 1598 |
|
|---|
| 1599 | /* Disable the Peripheral */
|
|---|
| 1600 | __HAL_LPTIM_DISABLE(hlptim);
|
|---|
| 1601 |
|
|---|
| 1602 | if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
|
|---|
| 1603 | {
|
|---|
| 1604 | return HAL_TIMEOUT;
|
|---|
| 1605 | }
|
|---|
| 1606 |
|
|---|
| 1607 | /* Change the TIM state*/
|
|---|
| 1608 | hlptim->State = HAL_LPTIM_STATE_READY;
|
|---|
| 1609 |
|
|---|
| 1610 | /* Return function status */
|
|---|
| 1611 | return HAL_OK;
|
|---|
| 1612 | }
|
|---|
| 1613 |
|
|---|
| 1614 | /**
|
|---|
| 1615 | * @brief Start the Counter mode in interrupt mode.
|
|---|
| 1616 | * @param hlptim LPTIM handle
|
|---|
| 1617 | * @param Period Specifies the Autoreload value.
|
|---|
| 1618 | * This parameter must be a value between 0x0000 and 0xFFFF.
|
|---|
| 1619 | * @retval HAL status
|
|---|
| 1620 | */
|
|---|
| 1621 | HAL_StatusTypeDef HAL_LPTIM_Counter_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period)
|
|---|
| 1622 | {
|
|---|
| 1623 | /* Check the parameters */
|
|---|
| 1624 | assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
|
|---|
| 1625 | assert_param(IS_LPTIM_PERIOD(Period));
|
|---|
| 1626 |
|
|---|
| 1627 | /* Set the LPTIM state */
|
|---|
| 1628 | hlptim->State = HAL_LPTIM_STATE_BUSY;
|
|---|
| 1629 |
|
|---|
| 1630 | /* Enable EXTI Line interrupt on the LPTIM Wake-up Timer */
|
|---|
| 1631 | __HAL_LPTIM_WAKEUPTIMER_EXTI_ENABLE_IT();
|
|---|
| 1632 | #if defined(EXTI_IMR_MR23)
|
|---|
| 1633 | /* Enable rising edge trigger on the LPTIM Wake-up Timer Exti line */
|
|---|
| 1634 | __HAL_LPTIM_WAKEUPTIMER_EXTI_ENABLE_RISING_EDGE();
|
|---|
| 1635 | #endif /* EXTI_IMR_MR23 */
|
|---|
| 1636 |
|
|---|
| 1637 | /* If clock source is not ULPTIM clock and counter source is external, then it must not be prescaled */
|
|---|
| 1638 | if ((hlptim->Init.Clock.Source != LPTIM_CLOCKSOURCE_ULPTIM)
|
|---|
| 1639 | && (hlptim->Init.CounterSource == LPTIM_COUNTERSOURCE_EXTERNAL))
|
|---|
| 1640 | {
|
|---|
| 1641 | /* Check if clock is prescaled */
|
|---|
| 1642 | assert_param(IS_LPTIM_CLOCK_PRESCALERDIV1(hlptim->Init.Clock.Prescaler));
|
|---|
| 1643 | /* Set clock prescaler to 0 */
|
|---|
| 1644 | hlptim->Instance->CFGR &= ~LPTIM_CFGR_PRESC;
|
|---|
| 1645 | }
|
|---|
| 1646 |
|
|---|
| 1647 | /* Enable the Peripheral */
|
|---|
| 1648 | __HAL_LPTIM_ENABLE(hlptim);
|
|---|
| 1649 |
|
|---|
| 1650 | /* Clear flag */
|
|---|
| 1651 | __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
|
|---|
| 1652 |
|
|---|
| 1653 | /* Load the period value in the autoreload register */
|
|---|
| 1654 | __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
|
|---|
| 1655 |
|
|---|
| 1656 | /* Wait for the completion of the write operation to the LPTIM_ARR register */
|
|---|
| 1657 | if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT)
|
|---|
| 1658 | {
|
|---|
| 1659 | return HAL_TIMEOUT;
|
|---|
| 1660 | }
|
|---|
| 1661 |
|
|---|
| 1662 | /* Disable the Peripheral */
|
|---|
| 1663 | __HAL_LPTIM_DISABLE(hlptim);
|
|---|
| 1664 |
|
|---|
| 1665 | if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
|
|---|
| 1666 | {
|
|---|
| 1667 | return HAL_TIMEOUT;
|
|---|
| 1668 | }
|
|---|
| 1669 |
|
|---|
| 1670 | /* Enable Autoreload write complete interrupt */
|
|---|
| 1671 | __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_ARROK);
|
|---|
| 1672 |
|
|---|
| 1673 | /* Enable Autoreload match interrupt */
|
|---|
| 1674 | __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_ARRM);
|
|---|
| 1675 |
|
|---|
| 1676 | /* Enable the Peripheral */
|
|---|
| 1677 | __HAL_LPTIM_ENABLE(hlptim);
|
|---|
| 1678 |
|
|---|
| 1679 | /* Start timer in continuous mode */
|
|---|
| 1680 | __HAL_LPTIM_START_CONTINUOUS(hlptim);
|
|---|
| 1681 |
|
|---|
| 1682 | /* Change the TIM state*/
|
|---|
| 1683 | hlptim->State = HAL_LPTIM_STATE_READY;
|
|---|
| 1684 |
|
|---|
| 1685 | /* Return function status */
|
|---|
| 1686 | return HAL_OK;
|
|---|
| 1687 | }
|
|---|
| 1688 |
|
|---|
| 1689 | /**
|
|---|
| 1690 | * @brief Stop the Counter mode in interrupt mode.
|
|---|
| 1691 | * @param hlptim LPTIM handle
|
|---|
| 1692 | * @retval HAL status
|
|---|
| 1693 | */
|
|---|
| 1694 | HAL_StatusTypeDef HAL_LPTIM_Counter_Stop_IT(LPTIM_HandleTypeDef *hlptim)
|
|---|
| 1695 | {
|
|---|
| 1696 | /* Check the parameters */
|
|---|
| 1697 | assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
|
|---|
| 1698 |
|
|---|
| 1699 | /* Set the LPTIM state */
|
|---|
| 1700 | hlptim->State = HAL_LPTIM_STATE_BUSY;
|
|---|
| 1701 | #if defined(EXTI_IMR_MR23)
|
|---|
| 1702 | /* Disable rising edge trigger on the LPTIM Wake-up Timer Exti line */
|
|---|
| 1703 | __HAL_LPTIM_WAKEUPTIMER_EXTI_DISABLE_RISING_EDGE();
|
|---|
| 1704 | #endif /* EXTI_IMR_MR23 */
|
|---|
| 1705 |
|
|---|
| 1706 | /* Disable EXTI Line interrupt on the LPTIM Wake-up Timer */
|
|---|
| 1707 | __HAL_LPTIM_WAKEUPTIMER_EXTI_DISABLE_IT();
|
|---|
| 1708 |
|
|---|
| 1709 | /* Disable the Peripheral */
|
|---|
| 1710 | __HAL_LPTIM_DISABLE(hlptim);
|
|---|
| 1711 |
|
|---|
| 1712 | if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
|
|---|
| 1713 | {
|
|---|
| 1714 | return HAL_TIMEOUT;
|
|---|
| 1715 | }
|
|---|
| 1716 |
|
|---|
| 1717 | /* Disable Autoreload write complete interrupt */
|
|---|
| 1718 | __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_ARROK);
|
|---|
| 1719 |
|
|---|
| 1720 | /* Disable Autoreload match interrupt */
|
|---|
| 1721 | __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_ARRM);
|
|---|
| 1722 | /* Change the TIM state*/
|
|---|
| 1723 | hlptim->State = HAL_LPTIM_STATE_READY;
|
|---|
| 1724 |
|
|---|
| 1725 | /* Return function status */
|
|---|
| 1726 | return HAL_OK;
|
|---|
| 1727 | }
|
|---|
| 1728 |
|
|---|
| 1729 | /**
|
|---|
| 1730 | * @}
|
|---|
| 1731 | */
|
|---|
| 1732 |
|
|---|
| 1733 | /** @defgroup LPTIM_Exported_Functions_Group3 LPTIM Read operation functions
|
|---|
| 1734 | * @brief Read operation functions.
|
|---|
| 1735 | *
|
|---|
| 1736 | @verbatim
|
|---|
| 1737 | ==============================================================================
|
|---|
| 1738 | ##### LPTIM Read operation functions #####
|
|---|
| 1739 | ==============================================================================
|
|---|
| 1740 | [..] This section provides LPTIM Reading functions.
|
|---|
| 1741 | (+) Read the counter value.
|
|---|
| 1742 | (+) Read the period (Auto-reload) value.
|
|---|
| 1743 | (+) Read the pulse (Compare)value.
|
|---|
| 1744 | @endverbatim
|
|---|
| 1745 | * @{
|
|---|
| 1746 | */
|
|---|
| 1747 |
|
|---|
| 1748 | /**
|
|---|
| 1749 | * @brief Return the current counter value.
|
|---|
| 1750 | * @param hlptim LPTIM handle
|
|---|
| 1751 | * @retval Counter value.
|
|---|
| 1752 | */
|
|---|
| 1753 | uint32_t HAL_LPTIM_ReadCounter(LPTIM_HandleTypeDef *hlptim)
|
|---|
| 1754 | {
|
|---|
| 1755 | /* Check the parameters */
|
|---|
| 1756 | assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
|
|---|
| 1757 |
|
|---|
| 1758 | return (hlptim->Instance->CNT);
|
|---|
| 1759 | }
|
|---|
| 1760 |
|
|---|
| 1761 | /**
|
|---|
| 1762 | * @brief Return the current Autoreload (Period) value.
|
|---|
| 1763 | * @param hlptim LPTIM handle
|
|---|
| 1764 | * @retval Autoreload value.
|
|---|
| 1765 | */
|
|---|
| 1766 | uint32_t HAL_LPTIM_ReadAutoReload(LPTIM_HandleTypeDef *hlptim)
|
|---|
| 1767 | {
|
|---|
| 1768 | /* Check the parameters */
|
|---|
| 1769 | assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
|
|---|
| 1770 |
|
|---|
| 1771 | return (hlptim->Instance->ARR);
|
|---|
| 1772 | }
|
|---|
| 1773 |
|
|---|
| 1774 | /**
|
|---|
| 1775 | * @brief Return the current Compare (Pulse) value.
|
|---|
| 1776 | * @param hlptim LPTIM handle
|
|---|
| 1777 | * @retval Compare value.
|
|---|
| 1778 | */
|
|---|
| 1779 | uint32_t HAL_LPTIM_ReadCompare(LPTIM_HandleTypeDef *hlptim)
|
|---|
| 1780 | {
|
|---|
| 1781 | /* Check the parameters */
|
|---|
| 1782 | assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
|
|---|
| 1783 |
|
|---|
| 1784 | return (hlptim->Instance->CMP);
|
|---|
| 1785 | }
|
|---|
| 1786 |
|
|---|
| 1787 | /**
|
|---|
| 1788 | * @}
|
|---|
| 1789 | */
|
|---|
| 1790 |
|
|---|
| 1791 | /** @defgroup LPTIM_Exported_Functions_Group4 LPTIM IRQ handler and callbacks
|
|---|
| 1792 | * @brief LPTIM IRQ handler.
|
|---|
| 1793 | *
|
|---|
| 1794 | @verbatim
|
|---|
| 1795 | ==============================================================================
|
|---|
| 1796 | ##### LPTIM IRQ handler and callbacks #####
|
|---|
| 1797 | ==============================================================================
|
|---|
| 1798 | [..] This section provides LPTIM IRQ handler and callback functions called within
|
|---|
| 1799 | the IRQ handler:
|
|---|
| 1800 | (+) LPTIM interrupt request handler
|
|---|
| 1801 | (+) Compare match Callback
|
|---|
| 1802 | (+) Auto-reload match Callback
|
|---|
| 1803 | (+) External trigger event detection Callback
|
|---|
| 1804 | (+) Compare register write complete Callback
|
|---|
| 1805 | (+) Auto-reload register write complete Callback
|
|---|
| 1806 | (+) Up-counting direction change Callback
|
|---|
| 1807 | (+) Down-counting direction change Callback
|
|---|
| 1808 |
|
|---|
| 1809 | @endverbatim
|
|---|
| 1810 | * @{
|
|---|
| 1811 | */
|
|---|
| 1812 |
|
|---|
| 1813 | /**
|
|---|
| 1814 | * @brief Handle LPTIM interrupt request.
|
|---|
| 1815 | * @param hlptim LPTIM handle
|
|---|
| 1816 | * @retval None
|
|---|
| 1817 | */
|
|---|
| 1818 | void HAL_LPTIM_IRQHandler(LPTIM_HandleTypeDef *hlptim)
|
|---|
| 1819 | {
|
|---|
| 1820 | /* Compare match interrupt */
|
|---|
| 1821 | if (__HAL_LPTIM_GET_FLAG(hlptim, LPTIM_FLAG_CMPM) != RESET)
|
|---|
| 1822 | {
|
|---|
| 1823 | if (__HAL_LPTIM_GET_IT_SOURCE(hlptim, LPTIM_IT_CMPM) != RESET)
|
|---|
| 1824 | {
|
|---|
| 1825 | /* Clear Compare match flag */
|
|---|
| 1826 | __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_CMPM);
|
|---|
| 1827 |
|
|---|
| 1828 | /* Compare match Callback */
|
|---|
| 1829 | #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
|
|---|
| 1830 | hlptim->CompareMatchCallback(hlptim);
|
|---|
| 1831 | #else
|
|---|
| 1832 | HAL_LPTIM_CompareMatchCallback(hlptim);
|
|---|
| 1833 | #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
|
|---|
| 1834 | }
|
|---|
| 1835 | }
|
|---|
| 1836 |
|
|---|
| 1837 | /* Autoreload match interrupt */
|
|---|
| 1838 | if (__HAL_LPTIM_GET_FLAG(hlptim, LPTIM_FLAG_ARRM) != RESET)
|
|---|
| 1839 | {
|
|---|
| 1840 | if (__HAL_LPTIM_GET_IT_SOURCE(hlptim, LPTIM_IT_ARRM) != RESET)
|
|---|
| 1841 | {
|
|---|
| 1842 | /* Clear Autoreload match flag */
|
|---|
| 1843 | __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARRM);
|
|---|
| 1844 |
|
|---|
| 1845 | /* Autoreload match Callback */
|
|---|
| 1846 | #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
|
|---|
| 1847 | hlptim->AutoReloadMatchCallback(hlptim);
|
|---|
| 1848 | #else
|
|---|
| 1849 | HAL_LPTIM_AutoReloadMatchCallback(hlptim);
|
|---|
| 1850 | #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
|
|---|
| 1851 | }
|
|---|
| 1852 | }
|
|---|
| 1853 |
|
|---|
| 1854 | /* Trigger detected interrupt */
|
|---|
| 1855 | if (__HAL_LPTIM_GET_FLAG(hlptim, LPTIM_FLAG_EXTTRIG) != RESET)
|
|---|
| 1856 | {
|
|---|
| 1857 | if (__HAL_LPTIM_GET_IT_SOURCE(hlptim, LPTIM_IT_EXTTRIG) != RESET)
|
|---|
| 1858 | {
|
|---|
| 1859 | /* Clear Trigger detected flag */
|
|---|
| 1860 | __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_EXTTRIG);
|
|---|
| 1861 |
|
|---|
| 1862 | /* Trigger detected callback */
|
|---|
| 1863 | #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
|
|---|
| 1864 | hlptim->TriggerCallback(hlptim);
|
|---|
| 1865 | #else
|
|---|
| 1866 | HAL_LPTIM_TriggerCallback(hlptim);
|
|---|
| 1867 | #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
|
|---|
| 1868 | }
|
|---|
| 1869 | }
|
|---|
| 1870 |
|
|---|
| 1871 | /* Compare write interrupt */
|
|---|
| 1872 | if (__HAL_LPTIM_GET_FLAG(hlptim, LPTIM_FLAG_CMPOK) != RESET)
|
|---|
| 1873 | {
|
|---|
| 1874 | if (__HAL_LPTIM_GET_IT_SOURCE(hlptim, LPTIM_IT_CMPOK) != RESET)
|
|---|
| 1875 | {
|
|---|
| 1876 | /* Clear Compare write flag */
|
|---|
| 1877 | __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_CMPOK);
|
|---|
| 1878 |
|
|---|
| 1879 | /* Compare write Callback */
|
|---|
| 1880 | #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
|
|---|
| 1881 | hlptim->CompareWriteCallback(hlptim);
|
|---|
| 1882 | #else
|
|---|
| 1883 | HAL_LPTIM_CompareWriteCallback(hlptim);
|
|---|
| 1884 | #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
|
|---|
| 1885 | }
|
|---|
| 1886 | }
|
|---|
| 1887 |
|
|---|
| 1888 | /* Autoreload write interrupt */
|
|---|
| 1889 | if (__HAL_LPTIM_GET_FLAG(hlptim, LPTIM_FLAG_ARROK) != RESET)
|
|---|
| 1890 | {
|
|---|
| 1891 | if (__HAL_LPTIM_GET_IT_SOURCE(hlptim, LPTIM_IT_ARROK) != RESET)
|
|---|
| 1892 | {
|
|---|
| 1893 | /* Clear Autoreload write flag */
|
|---|
| 1894 | __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
|
|---|
| 1895 |
|
|---|
| 1896 | /* Autoreload write Callback */
|
|---|
| 1897 | #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
|
|---|
| 1898 | hlptim->AutoReloadWriteCallback(hlptim);
|
|---|
| 1899 | #else
|
|---|
| 1900 | HAL_LPTIM_AutoReloadWriteCallback(hlptim);
|
|---|
| 1901 | #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
|
|---|
| 1902 | }
|
|---|
| 1903 | }
|
|---|
| 1904 |
|
|---|
| 1905 | /* Direction counter changed from Down to Up interrupt */
|
|---|
| 1906 | if (__HAL_LPTIM_GET_FLAG(hlptim, LPTIM_FLAG_UP) != RESET)
|
|---|
| 1907 | {
|
|---|
| 1908 | if (__HAL_LPTIM_GET_IT_SOURCE(hlptim, LPTIM_IT_UP) != RESET)
|
|---|
| 1909 | {
|
|---|
| 1910 | /* Clear Direction counter changed from Down to Up flag */
|
|---|
| 1911 | __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_UP);
|
|---|
| 1912 |
|
|---|
| 1913 | /* Direction counter changed from Down to Up Callback */
|
|---|
| 1914 | #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
|
|---|
| 1915 | hlptim->DirectionUpCallback(hlptim);
|
|---|
| 1916 | #else
|
|---|
| 1917 | HAL_LPTIM_DirectionUpCallback(hlptim);
|
|---|
| 1918 | #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
|
|---|
| 1919 | }
|
|---|
| 1920 | }
|
|---|
| 1921 |
|
|---|
| 1922 | /* Direction counter changed from Up to Down interrupt */
|
|---|
| 1923 | if (__HAL_LPTIM_GET_FLAG(hlptim, LPTIM_FLAG_DOWN) != RESET)
|
|---|
| 1924 | {
|
|---|
| 1925 | if (__HAL_LPTIM_GET_IT_SOURCE(hlptim, LPTIM_IT_DOWN) != RESET)
|
|---|
| 1926 | {
|
|---|
| 1927 | /* Clear Direction counter changed from Up to Down flag */
|
|---|
| 1928 | __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_DOWN);
|
|---|
| 1929 |
|
|---|
| 1930 | /* Direction counter changed from Up to Down Callback */
|
|---|
| 1931 | #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
|
|---|
| 1932 | hlptim->DirectionDownCallback(hlptim);
|
|---|
| 1933 | #else
|
|---|
| 1934 | HAL_LPTIM_DirectionDownCallback(hlptim);
|
|---|
| 1935 | #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
|
|---|
| 1936 | }
|
|---|
| 1937 | }
|
|---|
| 1938 | #if defined(EXTI_IMR_MR23)
|
|---|
| 1939 | __HAL_LPTIM_WAKEUPTIMER_EXTI_CLEAR_FLAG();
|
|---|
| 1940 | #endif /* EXTI_IMR_MR23 */
|
|---|
| 1941 | }
|
|---|
| 1942 |
|
|---|
| 1943 | /**
|
|---|
| 1944 | * @brief Compare match callback in non-blocking mode.
|
|---|
| 1945 | * @param hlptim LPTIM handle
|
|---|
| 1946 | * @retval None
|
|---|
| 1947 | */
|
|---|
| 1948 | __weak void HAL_LPTIM_CompareMatchCallback(LPTIM_HandleTypeDef *hlptim)
|
|---|
| 1949 | {
|
|---|
| 1950 | /* Prevent unused argument(s) compilation warning */
|
|---|
| 1951 | UNUSED(hlptim);
|
|---|
| 1952 |
|
|---|
| 1953 | /* NOTE : This function should not be modified, when the callback is needed,
|
|---|
| 1954 | the HAL_LPTIM_CompareMatchCallback could be implemented in the user file
|
|---|
| 1955 | */
|
|---|
| 1956 | }
|
|---|
| 1957 |
|
|---|
| 1958 | /**
|
|---|
| 1959 | * @brief Autoreload match callback in non-blocking mode.
|
|---|
| 1960 | * @param hlptim LPTIM handle
|
|---|
| 1961 | * @retval None
|
|---|
| 1962 | */
|
|---|
| 1963 | __weak void HAL_LPTIM_AutoReloadMatchCallback(LPTIM_HandleTypeDef *hlptim)
|
|---|
| 1964 | {
|
|---|
| 1965 | /* Prevent unused argument(s) compilation warning */
|
|---|
| 1966 | UNUSED(hlptim);
|
|---|
| 1967 |
|
|---|
| 1968 | /* NOTE : This function should not be modified, when the callback is needed,
|
|---|
| 1969 | the HAL_LPTIM_AutoReloadMatchCallback could be implemented in the user file
|
|---|
| 1970 | */
|
|---|
| 1971 | }
|
|---|
| 1972 |
|
|---|
| 1973 | /**
|
|---|
| 1974 | * @brief Trigger detected callback in non-blocking mode.
|
|---|
| 1975 | * @param hlptim LPTIM handle
|
|---|
| 1976 | * @retval None
|
|---|
| 1977 | */
|
|---|
| 1978 | __weak void HAL_LPTIM_TriggerCallback(LPTIM_HandleTypeDef *hlptim)
|
|---|
| 1979 | {
|
|---|
| 1980 | /* Prevent unused argument(s) compilation warning */
|
|---|
| 1981 | UNUSED(hlptim);
|
|---|
| 1982 |
|
|---|
| 1983 | /* NOTE : This function should not be modified, when the callback is needed,
|
|---|
| 1984 | the HAL_LPTIM_TriggerCallback could be implemented in the user file
|
|---|
| 1985 | */
|
|---|
| 1986 | }
|
|---|
| 1987 |
|
|---|
| 1988 | /**
|
|---|
| 1989 | * @brief Compare write callback in non-blocking mode.
|
|---|
| 1990 | * @param hlptim LPTIM handle
|
|---|
| 1991 | * @retval None
|
|---|
| 1992 | */
|
|---|
| 1993 | __weak void HAL_LPTIM_CompareWriteCallback(LPTIM_HandleTypeDef *hlptim)
|
|---|
| 1994 | {
|
|---|
| 1995 | /* Prevent unused argument(s) compilation warning */
|
|---|
| 1996 | UNUSED(hlptim);
|
|---|
| 1997 |
|
|---|
| 1998 | /* NOTE : This function should not be modified, when the callback is needed,
|
|---|
| 1999 | the HAL_LPTIM_CompareWriteCallback could be implemented in the user file
|
|---|
| 2000 | */
|
|---|
| 2001 | }
|
|---|
| 2002 |
|
|---|
| 2003 | /**
|
|---|
| 2004 | * @brief Autoreload write callback in non-blocking mode.
|
|---|
| 2005 | * @param hlptim LPTIM handle
|
|---|
| 2006 | * @retval None
|
|---|
| 2007 | */
|
|---|
| 2008 | __weak void HAL_LPTIM_AutoReloadWriteCallback(LPTIM_HandleTypeDef *hlptim)
|
|---|
| 2009 | {
|
|---|
| 2010 | /* Prevent unused argument(s) compilation warning */
|
|---|
| 2011 | UNUSED(hlptim);
|
|---|
| 2012 |
|
|---|
| 2013 | /* NOTE : This function should not be modified, when the callback is needed,
|
|---|
| 2014 | the HAL_LPTIM_AutoReloadWriteCallback could be implemented in the user file
|
|---|
| 2015 | */
|
|---|
| 2016 | }
|
|---|
| 2017 |
|
|---|
| 2018 | /**
|
|---|
| 2019 | * @brief Direction counter changed from Down to Up callback in non-blocking mode.
|
|---|
| 2020 | * @param hlptim LPTIM handle
|
|---|
| 2021 | * @retval None
|
|---|
| 2022 | */
|
|---|
| 2023 | __weak void HAL_LPTIM_DirectionUpCallback(LPTIM_HandleTypeDef *hlptim)
|
|---|
| 2024 | {
|
|---|
| 2025 | /* Prevent unused argument(s) compilation warning */
|
|---|
| 2026 | UNUSED(hlptim);
|
|---|
| 2027 |
|
|---|
| 2028 | /* NOTE : This function should not be modified, when the callback is needed,
|
|---|
| 2029 | the HAL_LPTIM_DirectionUpCallback could be implemented in the user file
|
|---|
| 2030 | */
|
|---|
| 2031 | }
|
|---|
| 2032 |
|
|---|
| 2033 | /**
|
|---|
| 2034 | * @brief Direction counter changed from Up to Down callback in non-blocking mode.
|
|---|
| 2035 | * @param hlptim LPTIM handle
|
|---|
| 2036 | * @retval None
|
|---|
| 2037 | */
|
|---|
| 2038 | __weak void HAL_LPTIM_DirectionDownCallback(LPTIM_HandleTypeDef *hlptim)
|
|---|
| 2039 | {
|
|---|
| 2040 | /* Prevent unused argument(s) compilation warning */
|
|---|
| 2041 | UNUSED(hlptim);
|
|---|
| 2042 |
|
|---|
| 2043 | /* NOTE : This function should not be modified, when the callback is needed,
|
|---|
| 2044 | the HAL_LPTIM_DirectionDownCallback could be implemented in the user file
|
|---|
| 2045 | */
|
|---|
| 2046 | }
|
|---|
| 2047 |
|
|---|
| 2048 | #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
|
|---|
| 2049 | /**
|
|---|
| 2050 | * @brief Register a User LPTIM callback to be used instead of the weak predefined callback
|
|---|
| 2051 | * @param hlptim LPTIM handle
|
|---|
| 2052 | * @param CallbackID ID of the callback to be registered
|
|---|
| 2053 | * This parameter can be one of the following values:
|
|---|
| 2054 | * @arg @ref HAL_LPTIM_MSPINIT_CB_ID LPTIM Base Msp Init Callback ID
|
|---|
| 2055 | * @arg @ref HAL_LPTIM_MSPDEINIT_CB_ID LPTIM Base Msp DeInit Callback ID
|
|---|
| 2056 | * @arg @ref HAL_LPTIM_COMPARE_MATCH_CB_ID Compare match Callback ID
|
|---|
| 2057 | * @arg @ref HAL_LPTIM_AUTORELOAD_MATCH_CB_ID Auto-reload match Callback ID
|
|---|
| 2058 | * @arg @ref HAL_LPTIM_TRIGGER_CB_ID External trigger event detection Callback ID
|
|---|
| 2059 | * @arg @ref HAL_LPTIM_COMPARE_WRITE_CB_ID Compare register write complete Callback ID
|
|---|
| 2060 | * @arg @ref HAL_LPTIM_AUTORELOAD_WRITE_CB_ID Auto-reload register write complete Callback ID
|
|---|
| 2061 | * @arg @ref HAL_LPTIM_DIRECTION_UP_CB_ID Up-counting direction change Callback ID
|
|---|
| 2062 | * @arg @ref HAL_LPTIM_DIRECTION_DOWN_CB_ID Down-counting direction change Callback ID
|
|---|
| 2063 | * @param pCallback pointer to the callback function
|
|---|
| 2064 | * @retval status
|
|---|
| 2065 | */
|
|---|
| 2066 | HAL_StatusTypeDef HAL_LPTIM_RegisterCallback(LPTIM_HandleTypeDef *hlptim,
|
|---|
| 2067 | HAL_LPTIM_CallbackIDTypeDef CallbackID,
|
|---|
| 2068 | pLPTIM_CallbackTypeDef pCallback)
|
|---|
| 2069 | {
|
|---|
| 2070 | HAL_StatusTypeDef status = HAL_OK;
|
|---|
| 2071 |
|
|---|
| 2072 | if (pCallback == NULL)
|
|---|
| 2073 | {
|
|---|
| 2074 | return HAL_ERROR;
|
|---|
| 2075 | }
|
|---|
| 2076 |
|
|---|
| 2077 | /* Process locked */
|
|---|
| 2078 | __HAL_LOCK(hlptim);
|
|---|
| 2079 |
|
|---|
| 2080 | if (hlptim->State == HAL_LPTIM_STATE_READY)
|
|---|
| 2081 | {
|
|---|
| 2082 | switch (CallbackID)
|
|---|
| 2083 | {
|
|---|
| 2084 | case HAL_LPTIM_MSPINIT_CB_ID :
|
|---|
| 2085 | hlptim->MspInitCallback = pCallback;
|
|---|
| 2086 | break;
|
|---|
| 2087 |
|
|---|
| 2088 | case HAL_LPTIM_MSPDEINIT_CB_ID :
|
|---|
| 2089 | hlptim->MspDeInitCallback = pCallback;
|
|---|
| 2090 | break;
|
|---|
| 2091 |
|
|---|
| 2092 | case HAL_LPTIM_COMPARE_MATCH_CB_ID :
|
|---|
| 2093 | hlptim->CompareMatchCallback = pCallback;
|
|---|
| 2094 | break;
|
|---|
| 2095 |
|
|---|
| 2096 | case HAL_LPTIM_AUTORELOAD_MATCH_CB_ID :
|
|---|
| 2097 | hlptim->AutoReloadMatchCallback = pCallback;
|
|---|
| 2098 | break;
|
|---|
| 2099 |
|
|---|
| 2100 | case HAL_LPTIM_TRIGGER_CB_ID :
|
|---|
| 2101 | hlptim->TriggerCallback = pCallback;
|
|---|
| 2102 | break;
|
|---|
| 2103 |
|
|---|
| 2104 | case HAL_LPTIM_COMPARE_WRITE_CB_ID :
|
|---|
| 2105 | hlptim->CompareWriteCallback = pCallback;
|
|---|
| 2106 | break;
|
|---|
| 2107 |
|
|---|
| 2108 | case HAL_LPTIM_AUTORELOAD_WRITE_CB_ID :
|
|---|
| 2109 | hlptim->AutoReloadWriteCallback = pCallback;
|
|---|
| 2110 | break;
|
|---|
| 2111 |
|
|---|
| 2112 | case HAL_LPTIM_DIRECTION_UP_CB_ID :
|
|---|
| 2113 | hlptim->DirectionUpCallback = pCallback;
|
|---|
| 2114 | break;
|
|---|
| 2115 |
|
|---|
| 2116 | case HAL_LPTIM_DIRECTION_DOWN_CB_ID :
|
|---|
| 2117 | hlptim->DirectionDownCallback = pCallback;
|
|---|
| 2118 | break;
|
|---|
| 2119 |
|
|---|
| 2120 | default :
|
|---|
| 2121 | /* Return error status */
|
|---|
| 2122 | status = HAL_ERROR;
|
|---|
| 2123 | break;
|
|---|
| 2124 | }
|
|---|
| 2125 | }
|
|---|
| 2126 | else if (hlptim->State == HAL_LPTIM_STATE_RESET)
|
|---|
| 2127 | {
|
|---|
| 2128 | switch (CallbackID)
|
|---|
| 2129 | {
|
|---|
| 2130 | case HAL_LPTIM_MSPINIT_CB_ID :
|
|---|
| 2131 | hlptim->MspInitCallback = pCallback;
|
|---|
| 2132 | break;
|
|---|
| 2133 |
|
|---|
| 2134 | case HAL_LPTIM_MSPDEINIT_CB_ID :
|
|---|
| 2135 | hlptim->MspDeInitCallback = pCallback;
|
|---|
| 2136 | break;
|
|---|
| 2137 |
|
|---|
| 2138 | default :
|
|---|
| 2139 | /* Return error status */
|
|---|
| 2140 | status = HAL_ERROR;
|
|---|
| 2141 | break;
|
|---|
| 2142 | }
|
|---|
| 2143 | }
|
|---|
| 2144 | else
|
|---|
| 2145 | {
|
|---|
| 2146 | /* Return error status */
|
|---|
| 2147 | status = HAL_ERROR;
|
|---|
| 2148 | }
|
|---|
| 2149 |
|
|---|
| 2150 | /* Release Lock */
|
|---|
| 2151 | __HAL_UNLOCK(hlptim);
|
|---|
| 2152 |
|
|---|
| 2153 | return status;
|
|---|
| 2154 | }
|
|---|
| 2155 |
|
|---|
| 2156 | /**
|
|---|
| 2157 | * @brief Unregister a LPTIM callback
|
|---|
| 2158 | * LLPTIM callback is redirected to the weak predefined callback
|
|---|
| 2159 | * @param hlptim LPTIM handle
|
|---|
| 2160 | * @param CallbackID ID of the callback to be unregistered
|
|---|
| 2161 | * This parameter can be one of the following values:
|
|---|
| 2162 | * @arg @ref HAL_LPTIM_MSPINIT_CB_ID LPTIM Base Msp Init Callback ID
|
|---|
| 2163 | * @arg @ref HAL_LPTIM_MSPDEINIT_CB_ID LPTIM Base Msp DeInit Callback ID
|
|---|
| 2164 | * @arg @ref HAL_LPTIM_COMPARE_MATCH_CB_ID Compare match Callback ID
|
|---|
| 2165 | * @arg @ref HAL_LPTIM_AUTORELOAD_MATCH_CB_ID Auto-reload match Callback ID
|
|---|
| 2166 | * @arg @ref HAL_LPTIM_TRIGGER_CB_ID External trigger event detection Callback ID
|
|---|
| 2167 | * @arg @ref HAL_LPTIM_COMPARE_WRITE_CB_ID Compare register write complete Callback ID
|
|---|
| 2168 | * @arg @ref HAL_LPTIM_AUTORELOAD_WRITE_CB_ID Auto-reload register write complete Callback ID
|
|---|
| 2169 | * @arg @ref HAL_LPTIM_DIRECTION_UP_CB_ID Up-counting direction change Callback ID
|
|---|
| 2170 | * @arg @ref HAL_LPTIM_DIRECTION_DOWN_CB_ID Down-counting direction change Callback ID
|
|---|
| 2171 | * @retval status
|
|---|
| 2172 | */
|
|---|
| 2173 | HAL_StatusTypeDef HAL_LPTIM_UnRegisterCallback(LPTIM_HandleTypeDef *hlptim,
|
|---|
| 2174 | HAL_LPTIM_CallbackIDTypeDef CallbackID)
|
|---|
| 2175 | {
|
|---|
| 2176 | HAL_StatusTypeDef status = HAL_OK;
|
|---|
| 2177 |
|
|---|
| 2178 | /* Process locked */
|
|---|
| 2179 | __HAL_LOCK(hlptim);
|
|---|
| 2180 |
|
|---|
| 2181 | if (hlptim->State == HAL_LPTIM_STATE_READY)
|
|---|
| 2182 | {
|
|---|
| 2183 | switch (CallbackID)
|
|---|
| 2184 | {
|
|---|
| 2185 | case HAL_LPTIM_MSPINIT_CB_ID :
|
|---|
| 2186 | hlptim->MspInitCallback = HAL_LPTIM_MspInit; /* Legacy weak MspInit Callback */
|
|---|
| 2187 | break;
|
|---|
| 2188 |
|
|---|
| 2189 | case HAL_LPTIM_MSPDEINIT_CB_ID :
|
|---|
| 2190 | hlptim->MspDeInitCallback = HAL_LPTIM_MspDeInit; /* Legacy weak Msp DeInit Callback */
|
|---|
| 2191 | break;
|
|---|
| 2192 |
|
|---|
| 2193 | case HAL_LPTIM_COMPARE_MATCH_CB_ID :
|
|---|
| 2194 | hlptim->CompareMatchCallback = HAL_LPTIM_CompareMatchCallback; /* Legacy weak Compare match Callback */
|
|---|
| 2195 | break;
|
|---|
| 2196 |
|
|---|
| 2197 | case HAL_LPTIM_AUTORELOAD_MATCH_CB_ID :
|
|---|
| 2198 | hlptim->AutoReloadMatchCallback = HAL_LPTIM_AutoReloadMatchCallback; /* Legacy weak Auto-reload match Callback */
|
|---|
| 2199 | break;
|
|---|
| 2200 |
|
|---|
| 2201 | case HAL_LPTIM_TRIGGER_CB_ID :
|
|---|
| 2202 | hlptim->TriggerCallback = HAL_LPTIM_TriggerCallback; /* Legacy weak External trigger event detection Callback */
|
|---|
| 2203 | break;
|
|---|
| 2204 |
|
|---|
| 2205 | case HAL_LPTIM_COMPARE_WRITE_CB_ID :
|
|---|
| 2206 | hlptim->CompareWriteCallback = HAL_LPTIM_CompareWriteCallback; /* Legacy weak Compare register write complete Callback */
|
|---|
| 2207 | break;
|
|---|
| 2208 |
|
|---|
| 2209 | case HAL_LPTIM_AUTORELOAD_WRITE_CB_ID :
|
|---|
| 2210 | hlptim->AutoReloadWriteCallback = HAL_LPTIM_AutoReloadWriteCallback; /* Legacy weak Auto-reload register write complete Callback */
|
|---|
| 2211 | break;
|
|---|
| 2212 |
|
|---|
| 2213 | case HAL_LPTIM_DIRECTION_UP_CB_ID :
|
|---|
| 2214 | hlptim->DirectionUpCallback = HAL_LPTIM_DirectionUpCallback; /* Legacy weak Up-counting direction change Callback */
|
|---|
| 2215 | break;
|
|---|
| 2216 |
|
|---|
| 2217 | case HAL_LPTIM_DIRECTION_DOWN_CB_ID :
|
|---|
| 2218 | hlptim->DirectionDownCallback = HAL_LPTIM_DirectionDownCallback; /* Legacy weak Down-counting direction change Callback */
|
|---|
| 2219 | break;
|
|---|
| 2220 |
|
|---|
| 2221 | default :
|
|---|
| 2222 | /* Return error status */
|
|---|
| 2223 | status = HAL_ERROR;
|
|---|
| 2224 | break;
|
|---|
| 2225 | }
|
|---|
| 2226 | }
|
|---|
| 2227 | else if (hlptim->State == HAL_LPTIM_STATE_RESET)
|
|---|
| 2228 | {
|
|---|
| 2229 | switch (CallbackID)
|
|---|
| 2230 | {
|
|---|
| 2231 | case HAL_LPTIM_MSPINIT_CB_ID :
|
|---|
| 2232 | hlptim->MspInitCallback = HAL_LPTIM_MspInit; /* Legacy weak MspInit Callback */
|
|---|
| 2233 | break;
|
|---|
| 2234 |
|
|---|
| 2235 | case HAL_LPTIM_MSPDEINIT_CB_ID :
|
|---|
| 2236 | hlptim->MspDeInitCallback = HAL_LPTIM_MspDeInit; /* Legacy weak Msp DeInit Callback */
|
|---|
| 2237 | break;
|
|---|
| 2238 |
|
|---|
| 2239 | default :
|
|---|
| 2240 | /* Return error status */
|
|---|
| 2241 | status = HAL_ERROR;
|
|---|
| 2242 | break;
|
|---|
| 2243 | }
|
|---|
| 2244 | }
|
|---|
| 2245 | else
|
|---|
| 2246 | {
|
|---|
| 2247 | /* Return error status */
|
|---|
| 2248 | status = HAL_ERROR;
|
|---|
| 2249 | }
|
|---|
| 2250 |
|
|---|
| 2251 | /* Release Lock */
|
|---|
| 2252 | __HAL_UNLOCK(hlptim);
|
|---|
| 2253 |
|
|---|
| 2254 | return status;
|
|---|
| 2255 | }
|
|---|
| 2256 | #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
|
|---|
| 2257 |
|
|---|
| 2258 | /**
|
|---|
| 2259 | * @}
|
|---|
| 2260 | */
|
|---|
| 2261 |
|
|---|
| 2262 | /** @defgroup LPTIM_Group5 Peripheral State functions
|
|---|
| 2263 | * @brief Peripheral State functions.
|
|---|
| 2264 | *
|
|---|
| 2265 | @verbatim
|
|---|
| 2266 | ==============================================================================
|
|---|
| 2267 | ##### Peripheral State functions #####
|
|---|
| 2268 | ==============================================================================
|
|---|
| 2269 | [..]
|
|---|
| 2270 | This subsection permits to get in run-time the status of the peripheral.
|
|---|
| 2271 |
|
|---|
| 2272 | @endverbatim
|
|---|
| 2273 | * @{
|
|---|
| 2274 | */
|
|---|
| 2275 |
|
|---|
| 2276 | /**
|
|---|
| 2277 | * @brief Return the LPTIM handle state.
|
|---|
| 2278 | * @param hlptim LPTIM handle
|
|---|
| 2279 | * @retval HAL state
|
|---|
| 2280 | */
|
|---|
| 2281 | HAL_LPTIM_StateTypeDef HAL_LPTIM_GetState(LPTIM_HandleTypeDef *hlptim)
|
|---|
| 2282 | {
|
|---|
| 2283 | /* Return LPTIM handle state */
|
|---|
| 2284 | return hlptim->State;
|
|---|
| 2285 | }
|
|---|
| 2286 |
|
|---|
| 2287 | /**
|
|---|
| 2288 | * @}
|
|---|
| 2289 | */
|
|---|
| 2290 |
|
|---|
| 2291 |
|
|---|
| 2292 | /**
|
|---|
| 2293 | * @}
|
|---|
| 2294 | */
|
|---|
| 2295 |
|
|---|
| 2296 | /* Private functions ---------------------------------------------------------*/
|
|---|
| 2297 |
|
|---|
| 2298 | /** @defgroup LPTIM_Private_Functions LPTIM Private Functions
|
|---|
| 2299 | * @{
|
|---|
| 2300 | */
|
|---|
| 2301 | #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
|
|---|
| 2302 | /**
|
|---|
| 2303 | * @brief Reset interrupt callbacks to the legacy weak callbacks.
|
|---|
| 2304 | * @param lptim pointer to a LPTIM_HandleTypeDef structure that contains
|
|---|
| 2305 | * the configuration information for LPTIM module.
|
|---|
| 2306 | * @retval None
|
|---|
| 2307 | */
|
|---|
| 2308 | static void LPTIM_ResetCallback(LPTIM_HandleTypeDef *lptim)
|
|---|
| 2309 | {
|
|---|
| 2310 | /* Reset the LPTIM callback to the legacy weak callbacks */
|
|---|
| 2311 | lptim->CompareMatchCallback = HAL_LPTIM_CompareMatchCallback; /* Compare match Callback */
|
|---|
| 2312 | lptim->AutoReloadMatchCallback = HAL_LPTIM_AutoReloadMatchCallback; /* Auto-reload match Callback */
|
|---|
| 2313 | lptim->TriggerCallback = HAL_LPTIM_TriggerCallback; /* External trigger event detection Callback */
|
|---|
| 2314 | lptim->CompareWriteCallback = HAL_LPTIM_CompareWriteCallback; /* Compare register write complete Callback */
|
|---|
| 2315 | lptim->AutoReloadWriteCallback = HAL_LPTIM_AutoReloadWriteCallback; /* Auto-reload register write complete Callback */
|
|---|
| 2316 | lptim->DirectionUpCallback = HAL_LPTIM_DirectionUpCallback; /* Up-counting direction change Callback */
|
|---|
| 2317 | lptim->DirectionDownCallback = HAL_LPTIM_DirectionDownCallback; /* Down-counting direction change Callback */
|
|---|
| 2318 | }
|
|---|
| 2319 | #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
|
|---|
| 2320 |
|
|---|
| 2321 | /**
|
|---|
| 2322 | * @brief LPTimer Wait for flag set
|
|---|
| 2323 | * @param hlptim pointer to a LPTIM_HandleTypeDef structure that contains
|
|---|
| 2324 | * the configuration information for LPTIM module.
|
|---|
| 2325 | * @param flag The lptim flag
|
|---|
| 2326 | * @retval HAL status
|
|---|
| 2327 | */
|
|---|
| 2328 | static HAL_StatusTypeDef LPTIM_WaitForFlag(LPTIM_HandleTypeDef *hlptim, uint32_t flag)
|
|---|
| 2329 | {
|
|---|
| 2330 | HAL_StatusTypeDef result = HAL_OK;
|
|---|
| 2331 | uint32_t count = TIMEOUT * (SystemCoreClock / 20UL / 1000UL);
|
|---|
| 2332 | do
|
|---|
| 2333 | {
|
|---|
| 2334 | count--;
|
|---|
| 2335 | if (count == 0UL)
|
|---|
| 2336 | {
|
|---|
| 2337 | result = HAL_TIMEOUT;
|
|---|
| 2338 | }
|
|---|
| 2339 | } while ((!(__HAL_LPTIM_GET_FLAG((hlptim), (flag)))) && (count != 0UL));
|
|---|
| 2340 |
|
|---|
| 2341 | return result;
|
|---|
| 2342 | }
|
|---|
| 2343 |
|
|---|
| 2344 | /**
|
|---|
| 2345 | * @brief Disable LPTIM HW instance.
|
|---|
| 2346 | * @param hlptim pointer to a LPTIM_HandleTypeDef structure that contains
|
|---|
| 2347 | * the configuration information for LPTIM module.
|
|---|
| 2348 | * @note The following sequence is required to solve LPTIM disable HW limitation.
|
|---|
| 2349 | * Please check Errata Sheet ES0335 for more details under "MCU may remain
|
|---|
| 2350 | * stuck in LPTIM interrupt when entering Stop mode" section.
|
|---|
| 2351 | * @retval None
|
|---|
| 2352 | */
|
|---|
| 2353 | void LPTIM_Disable(LPTIM_HandleTypeDef *hlptim)
|
|---|
| 2354 | {
|
|---|
| 2355 | uint32_t tmpclksource = 0;
|
|---|
| 2356 | uint32_t tmpIER;
|
|---|
| 2357 | uint32_t tmpCFGR;
|
|---|
| 2358 | uint32_t tmpCMP;
|
|---|
| 2359 | uint32_t tmpARR;
|
|---|
| 2360 | uint32_t tmpOR;
|
|---|
| 2361 |
|
|---|
| 2362 | __disable_irq();
|
|---|
| 2363 |
|
|---|
| 2364 | /*********** Save LPTIM Config ***********/
|
|---|
| 2365 | /* Save LPTIM source clock */
|
|---|
| 2366 | switch ((uint32_t)hlptim->Instance)
|
|---|
| 2367 | {
|
|---|
| 2368 | case LPTIM1_BASE:
|
|---|
| 2369 | tmpclksource = __HAL_RCC_GET_LPTIM1_SOURCE();
|
|---|
| 2370 | break;
|
|---|
| 2371 | default:
|
|---|
| 2372 | break;
|
|---|
| 2373 | }
|
|---|
| 2374 |
|
|---|
| 2375 | /* Save LPTIM configuration registers */
|
|---|
| 2376 | tmpIER = hlptim->Instance->IER;
|
|---|
| 2377 | tmpCFGR = hlptim->Instance->CFGR;
|
|---|
| 2378 | tmpCMP = hlptim->Instance->CMP;
|
|---|
| 2379 | tmpARR = hlptim->Instance->ARR;
|
|---|
| 2380 | tmpOR = hlptim->Instance->OR;
|
|---|
| 2381 |
|
|---|
| 2382 | /*********** Reset LPTIM ***********/
|
|---|
| 2383 | switch ((uint32_t)hlptim->Instance)
|
|---|
| 2384 | {
|
|---|
| 2385 | case LPTIM1_BASE:
|
|---|
| 2386 | __HAL_RCC_LPTIM1_FORCE_RESET();
|
|---|
| 2387 | __HAL_RCC_LPTIM1_RELEASE_RESET();
|
|---|
| 2388 | break;
|
|---|
| 2389 | default:
|
|---|
| 2390 | break;
|
|---|
| 2391 | }
|
|---|
| 2392 |
|
|---|
| 2393 | /*********** Restore LPTIM Config ***********/
|
|---|
| 2394 | if ((tmpCMP != 0UL) || (tmpARR != 0UL))
|
|---|
| 2395 | {
|
|---|
| 2396 | /* Force LPTIM source kernel clock from APB */
|
|---|
| 2397 | switch ((uint32_t)hlptim->Instance)
|
|---|
| 2398 | {
|
|---|
| 2399 | case LPTIM1_BASE:
|
|---|
| 2400 | __HAL_RCC_LPTIM1_CONFIG(RCC_LPTIM1CLKSOURCE_PCLK1);
|
|---|
| 2401 | break;
|
|---|
| 2402 | default:
|
|---|
| 2403 | break;
|
|---|
| 2404 | }
|
|---|
| 2405 |
|
|---|
| 2406 | if (tmpCMP != 0UL)
|
|---|
| 2407 | {
|
|---|
| 2408 | /* Restore CMP register (LPTIM should be enabled first) */
|
|---|
| 2409 | hlptim->Instance->CR |= LPTIM_CR_ENABLE;
|
|---|
| 2410 | hlptim->Instance->CMP = tmpCMP;
|
|---|
| 2411 |
|
|---|
| 2412 | /* Wait for the completion of the write operation to the LPTIM_CMP register */
|
|---|
| 2413 | if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_CMPOK) == HAL_TIMEOUT)
|
|---|
| 2414 | {
|
|---|
| 2415 | hlptim->State = HAL_LPTIM_STATE_TIMEOUT;
|
|---|
| 2416 | }
|
|---|
| 2417 | __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_CMPOK);
|
|---|
| 2418 | }
|
|---|
| 2419 |
|
|---|
| 2420 | if (tmpARR != 0UL)
|
|---|
| 2421 | {
|
|---|
| 2422 | /* Restore ARR register (LPTIM should be enabled first) */
|
|---|
| 2423 | hlptim->Instance->CR |= LPTIM_CR_ENABLE;
|
|---|
| 2424 | hlptim->Instance->ARR = tmpARR;
|
|---|
| 2425 |
|
|---|
| 2426 | /* Wait for the completion of the write operation to the LPTIM_ARR register */
|
|---|
| 2427 | if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT)
|
|---|
| 2428 | {
|
|---|
| 2429 | hlptim->State = HAL_LPTIM_STATE_TIMEOUT;
|
|---|
| 2430 | }
|
|---|
| 2431 |
|
|---|
| 2432 | __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
|
|---|
| 2433 | }
|
|---|
| 2434 |
|
|---|
| 2435 | /* Restore LPTIM source kernel clock */
|
|---|
| 2436 | switch ((uint32_t)hlptim->Instance)
|
|---|
| 2437 | {
|
|---|
| 2438 | case LPTIM1_BASE:
|
|---|
| 2439 | __HAL_RCC_LPTIM1_CONFIG(tmpclksource);
|
|---|
| 2440 | break;
|
|---|
| 2441 | default:
|
|---|
| 2442 | break;
|
|---|
| 2443 | }
|
|---|
| 2444 | }
|
|---|
| 2445 |
|
|---|
| 2446 | /* Restore configuration registers (LPTIM should be disabled first) */
|
|---|
| 2447 | hlptim->Instance->CR &= ~(LPTIM_CR_ENABLE);
|
|---|
| 2448 | hlptim->Instance->IER = tmpIER;
|
|---|
| 2449 | hlptim->Instance->CFGR = tmpCFGR;
|
|---|
| 2450 | hlptim->Instance->OR = tmpOR;
|
|---|
| 2451 |
|
|---|
| 2452 | __enable_irq();
|
|---|
| 2453 | }
|
|---|
| 2454 | /**
|
|---|
| 2455 | * @}
|
|---|
| 2456 | */
|
|---|
| 2457 | #endif /* LPTIM1 */
|
|---|
| 2458 |
|
|---|
| 2459 | #endif /* HAL_LPTIM_MODULE_ENABLED */
|
|---|
| 2460 | /**
|
|---|
| 2461 | * @}
|
|---|
| 2462 | */
|
|---|
| 2463 |
|
|---|
| 2464 | /**
|
|---|
| 2465 | * @}
|
|---|
| 2466 | */
|
|---|
| 2467 |
|
|---|
| 2468 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
|---|