1 | /**
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2 | ******************************************************************************
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3 | * @file stm32f4xx_ll_lptim.c
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4 | * @author MCD Application Team
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5 | * @brief LPTIM LL module driver.
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6 | ******************************************************************************
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7 | * @attention
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8 | *
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9 | * <h2><center>© Copyright (c) 2016 STMicroelectronics.
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10 | * All rights reserved.</center></h2>
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11 | *
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12 | * This software component is licensed by ST under BSD 3-Clause license,
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13 | * the "License"; You may not use this file except in compliance with the
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14 | * License. You may obtain a copy of the License at:
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15 | * opensource.org/licenses/BSD-3-Clause
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16 | *
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17 | ******************************************************************************
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18 | */
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19 | #if defined(USE_FULL_LL_DRIVER)
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20 |
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21 | /* Includes ------------------------------------------------------------------*/
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22 | #include "stm32f4xx_ll_lptim.h"
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23 | #include "stm32f4xx_ll_bus.h"
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24 | #include "stm32f4xx_ll_rcc.h"
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25 |
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26 |
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27 | #ifdef USE_FULL_ASSERT
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28 | #include "stm32_assert.h"
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29 | #else
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30 | #define assert_param(expr) ((void)0U)
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31 | #endif
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32 |
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33 | /** @addtogroup STM32F4xx_LL_Driver
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34 | * @{
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35 | */
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36 |
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37 | #if defined (LPTIM1)
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38 |
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39 | /** @addtogroup LPTIM_LL
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40 | * @{
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41 | */
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42 |
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43 | /* Private types -------------------------------------------------------------*/
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44 | /* Private variables ---------------------------------------------------------*/
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45 | /* Private constants ---------------------------------------------------------*/
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46 | /* Private macros ------------------------------------------------------------*/
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47 | /** @addtogroup LPTIM_LL_Private_Macros
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48 | * @{
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49 | */
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50 | #define IS_LL_LPTIM_CLOCK_SOURCE(__VALUE__) (((__VALUE__) == LL_LPTIM_CLK_SOURCE_INTERNAL) \
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51 | || ((__VALUE__) == LL_LPTIM_CLK_SOURCE_EXTERNAL))
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52 |
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53 | #define IS_LL_LPTIM_CLOCK_PRESCALER(__VALUE__) (((__VALUE__) == LL_LPTIM_PRESCALER_DIV1) \
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54 | || ((__VALUE__) == LL_LPTIM_PRESCALER_DIV2) \
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55 | || ((__VALUE__) == LL_LPTIM_PRESCALER_DIV4) \
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56 | || ((__VALUE__) == LL_LPTIM_PRESCALER_DIV8) \
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57 | || ((__VALUE__) == LL_LPTIM_PRESCALER_DIV16) \
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58 | || ((__VALUE__) == LL_LPTIM_PRESCALER_DIV32) \
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59 | || ((__VALUE__) == LL_LPTIM_PRESCALER_DIV64) \
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60 | || ((__VALUE__) == LL_LPTIM_PRESCALER_DIV128))
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61 |
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62 | #define IS_LL_LPTIM_WAVEFORM(__VALUE__) (((__VALUE__) == LL_LPTIM_OUTPUT_WAVEFORM_PWM) \
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63 | || ((__VALUE__) == LL_LPTIM_OUTPUT_WAVEFORM_SETONCE))
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64 |
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65 | #define IS_LL_LPTIM_OUTPUT_POLARITY(__VALUE__) (((__VALUE__) == LL_LPTIM_OUTPUT_POLARITY_REGULAR) \
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66 | || ((__VALUE__) == LL_LPTIM_OUTPUT_POLARITY_INVERSE))
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67 | /**
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68 | * @}
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69 | */
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70 |
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71 |
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72 | /* Private function prototypes -----------------------------------------------*/
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73 | /* Private functions ---------------------------------------------------------*/
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74 | /** @defgroup LPTIM_Private_Functions LPTIM Private Functions
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75 | * @{
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76 | */
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77 | /**
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78 | * @}
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79 | */
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80 | /* Exported functions --------------------------------------------------------*/
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81 | /** @addtogroup LPTIM_LL_Exported_Functions
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82 | * @{
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83 | */
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84 |
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85 | /** @addtogroup LPTIM_LL_EF_Init
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86 | * @{
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87 | */
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88 |
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89 | /**
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90 | * @brief Set LPTIMx registers to their reset values.
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91 | * @param LPTIMx LP Timer instance
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92 | * @retval An ErrorStatus enumeration value:
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93 | * - SUCCESS: LPTIMx registers are de-initialized
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94 | * - ERROR: invalid LPTIMx instance
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95 | */
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96 | ErrorStatus LL_LPTIM_DeInit(LPTIM_TypeDef *LPTIMx)
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97 | {
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98 | ErrorStatus result = SUCCESS;
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99 |
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100 | /* Check the parameters */
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101 | assert_param(IS_LPTIM_INSTANCE(LPTIMx));
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102 |
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103 | if (LPTIMx == LPTIM1)
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104 | {
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105 | LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_LPTIM1);
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106 | LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_LPTIM1);
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107 | }
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108 | else
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109 | {
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110 | result = ERROR;
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111 | }
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112 |
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113 | return result;
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114 | }
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115 |
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116 | /**
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117 | * @brief Set each fields of the LPTIM_InitStruct structure to its default
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118 | * value.
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119 | * @param LPTIM_InitStruct pointer to a @ref LL_LPTIM_InitTypeDef structure
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120 | * @retval None
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121 | */
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122 | void LL_LPTIM_StructInit(LL_LPTIM_InitTypeDef *LPTIM_InitStruct)
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123 | {
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124 | /* Set the default configuration */
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125 | LPTIM_InitStruct->ClockSource = LL_LPTIM_CLK_SOURCE_INTERNAL;
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126 | LPTIM_InitStruct->Prescaler = LL_LPTIM_PRESCALER_DIV1;
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127 | LPTIM_InitStruct->Waveform = LL_LPTIM_OUTPUT_WAVEFORM_PWM;
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128 | LPTIM_InitStruct->Polarity = LL_LPTIM_OUTPUT_POLARITY_REGULAR;
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129 | }
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130 |
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131 | /**
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132 | * @brief Configure the LPTIMx peripheral according to the specified parameters.
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133 | * @note LL_LPTIM_Init can only be called when the LPTIM instance is disabled.
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134 | * @note LPTIMx can be disabled using unitary function @ref LL_LPTIM_Disable().
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135 | * @param LPTIMx LP Timer Instance
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136 | * @param LPTIM_InitStruct pointer to a @ref LL_LPTIM_InitTypeDef structure
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137 | * @retval An ErrorStatus enumeration value:
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138 | * - SUCCESS: LPTIMx instance has been initialized
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139 | * - ERROR: LPTIMx instance hasn't been initialized
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140 | */
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141 | ErrorStatus LL_LPTIM_Init(LPTIM_TypeDef *LPTIMx, LL_LPTIM_InitTypeDef *LPTIM_InitStruct)
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142 | {
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143 | ErrorStatus result = SUCCESS;
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144 | /* Check the parameters */
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145 | assert_param(IS_LPTIM_INSTANCE(LPTIMx));
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146 | assert_param(IS_LL_LPTIM_CLOCK_SOURCE(LPTIM_InitStruct->ClockSource));
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147 | assert_param(IS_LL_LPTIM_CLOCK_PRESCALER(LPTIM_InitStruct->Prescaler));
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148 | assert_param(IS_LL_LPTIM_WAVEFORM(LPTIM_InitStruct->Waveform));
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149 | assert_param(IS_LL_LPTIM_OUTPUT_POLARITY(LPTIM_InitStruct->Polarity));
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150 |
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151 | /* The LPTIMx_CFGR register must only be modified when the LPTIM is disabled
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152 | (ENABLE bit is reset to 0).
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153 | */
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154 | if (LL_LPTIM_IsEnabled(LPTIMx) == 1UL)
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155 | {
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156 | result = ERROR;
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157 | }
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158 | else
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159 | {
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160 | /* Set CKSEL bitfield according to ClockSource value */
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161 | /* Set PRESC bitfield according to Prescaler value */
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162 | /* Set WAVE bitfield according to Waveform value */
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163 | /* Set WAVEPOL bitfield according to Polarity value */
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164 | MODIFY_REG(LPTIMx->CFGR,
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165 | (LPTIM_CFGR_CKSEL | LPTIM_CFGR_PRESC | LPTIM_CFGR_WAVE | LPTIM_CFGR_WAVPOL),
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166 | LPTIM_InitStruct->ClockSource | \
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167 | LPTIM_InitStruct->Prescaler | \
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168 | LPTIM_InitStruct->Waveform | \
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169 | LPTIM_InitStruct->Polarity);
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170 | }
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171 |
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172 | return result;
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173 | }
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174 |
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175 | /**
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176 | * @brief Disable the LPTIM instance
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177 | * @rmtoll CR ENABLE LL_LPTIM_Disable
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178 | * @param LPTIMx Low-Power Timer instance
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179 | * @note The following sequence is required to solve LPTIM disable HW limitation.
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180 | * Please check Errata Sheet ES0335 for more details under "MCU may remain
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181 | * stuck in LPTIM interrupt when entering Stop mode" section.
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182 | * @retval None
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183 | */
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184 | void LL_LPTIM_Disable(LPTIM_TypeDef *LPTIMx)
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185 | {
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186 | LL_RCC_ClocksTypeDef rcc_clock;
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187 | uint32_t tmpclksource = 0;
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188 | uint32_t tmpIER;
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189 | uint32_t tmpCFGR;
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190 | uint32_t tmpCMP;
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191 | uint32_t tmpARR;
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192 | uint32_t tmpOR;
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193 |
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194 | /* Check the parameters */
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195 | assert_param(IS_LPTIM_INSTANCE(LPTIMx));
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196 |
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197 | __disable_irq();
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198 |
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199 | /********** Save LPTIM Config *********/
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200 | /* Save LPTIM source clock */
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201 | switch ((uint32_t)LPTIMx)
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202 | {
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203 | case LPTIM1_BASE:
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204 | tmpclksource = LL_RCC_GetLPTIMClockSource(LL_RCC_LPTIM1_CLKSOURCE);
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205 | break;
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206 | default:
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207 | break;
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208 | }
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209 |
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210 | /* Save LPTIM configuration registers */
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211 | tmpIER = LPTIMx->IER;
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212 | tmpCFGR = LPTIMx->CFGR;
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213 | tmpCMP = LPTIMx->CMP;
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214 | tmpARR = LPTIMx->ARR;
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215 | tmpOR = LPTIMx->OR;
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216 |
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217 | /************* Reset LPTIM ************/
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218 | (void)LL_LPTIM_DeInit(LPTIMx);
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219 |
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220 | /********* Restore LPTIM Config *******/
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221 | LL_RCC_GetSystemClocksFreq(&rcc_clock);
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222 |
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223 | if ((tmpCMP != 0UL) || (tmpARR != 0UL))
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224 | {
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225 | /* Force LPTIM source kernel clock from APB */
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226 | switch ((uint32_t)LPTIMx)
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227 | {
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228 | case LPTIM1_BASE:
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229 | LL_RCC_SetLPTIMClockSource(LL_RCC_LPTIM1_CLKSOURCE_PCLK1);
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230 | break;
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231 | default:
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232 | break;
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233 | }
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234 |
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235 | if (tmpCMP != 0UL)
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236 | {
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237 | /* Restore CMP and ARR registers (LPTIM should be enabled first) */
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238 | LPTIMx->CR |= LPTIM_CR_ENABLE;
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239 | LPTIMx->CMP = tmpCMP;
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240 |
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241 | /* Polling on CMP write ok status after above restore operation */
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242 | do
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243 | {
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244 | rcc_clock.SYSCLK_Frequency--; /* Used for timeout */
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245 | } while (((LL_LPTIM_IsActiveFlag_CMPOK(LPTIMx) != 1UL)) && ((rcc_clock.SYSCLK_Frequency) > 0UL));
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246 |
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247 | LL_LPTIM_ClearFlag_CMPOK(LPTIMx);
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248 | }
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249 |
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250 | if (tmpARR != 0UL)
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251 | {
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252 | LPTIMx->CR |= LPTIM_CR_ENABLE;
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253 | LPTIMx->ARR = tmpARR;
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254 |
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255 | LL_RCC_GetSystemClocksFreq(&rcc_clock);
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256 | /* Polling on ARR write ok status after above restore operation */
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257 | do
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258 | {
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259 | rcc_clock.SYSCLK_Frequency--; /* Used for timeout */
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260 | }
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261 | while (((LL_LPTIM_IsActiveFlag_ARROK(LPTIMx) != 1UL)) && ((rcc_clock.SYSCLK_Frequency) > 0UL));
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262 |
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263 | LL_LPTIM_ClearFlag_ARROK(LPTIMx);
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264 | }
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265 |
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266 |
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267 | /* Restore LPTIM source kernel clock */
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268 | LL_RCC_SetLPTIMClockSource(tmpclksource);
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269 | }
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270 |
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271 | /* Restore configuration registers (LPTIM should be disabled first) */
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272 | LPTIMx->CR &= ~(LPTIM_CR_ENABLE);
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273 | LPTIMx->IER = tmpIER;
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274 | LPTIMx->CFGR = tmpCFGR;
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275 | LPTIMx->OR = tmpOR;
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276 |
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277 | __enable_irq();
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278 | }
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279 |
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280 | /**
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281 | * @}
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282 | */
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283 |
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284 | /**
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285 | * @}
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286 | */
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287 |
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288 | /**
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289 | * @}
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290 | */
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291 |
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292 | #endif /* LPTIM1 */
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293 |
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294 | /**
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295 | * @}
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296 | */
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297 |
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298 | #endif /* USE_FULL_LL_DRIVER */
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299 |
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300 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
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