source: S-port/trunk/MDK-ARM/startup_stm32f427xx.s

Last change on this file was 1, checked in by AlexLir, 4 years ago
File size: 29.5 KB
Line 
1;*******************************************************************************
2;* File Name : startup_stm32f427xx.s
3;* Author : MCD Application Team
4;* Description : STM32F427x devices vector table for MDK-ARM toolchain.
5;* This module performs:
6;* - Set the initial SP
7;* - Set the initial PC == Reset_Handler
8;* - Set the vector table entries with the exceptions ISR address
9;* After Reset the CortexM4 processor is in Thread mode,
10;* priority is Privileged, and the Stack is set to Main.
11;********************************************************************************
12;* @attention
13;*
14;* <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
15;* All rights reserved.</center></h2>
16;*
17;* This software component is licensed by ST under BSD 3-Clause license,
18;* the "License"; You may not use this file except in compliance with the
19;* License. You may obtain a copy of the License at:
20;* opensource.org/licenses/BSD-3-Clause
21;*
22;*******************************************************************************
23;* <<< Use Configuration Wizard in Context Menu >>>
24;
25; Amount of memory (in bytes) allocated for Stack
26; Tailor this value to your application needs
27; <h> Stack Configuration
28; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
29; </h>
30
31Stack_Size EQU 0x2200
32
33 AREA STACK, NOINIT, READWRITE, ALIGN=3
34Stack_Mem SPACE Stack_Size
35__initial_sp
36
37
38; <h> Heap Configuration
39; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
40; </h>
41
42Heap_Size EQU 0x2200
43
44
45 AREA HEAP, NOINIT, READWRITE, ALIGN=3
46__heap_base
47Heap_Mem SPACE Heap_Size
48__heap_limit
49
50 PRESERVE8
51 THUMB
52
53
54; Vector Table Mapped to Address 0 at Reset
55 AREA RESET, DATA, READONLY
56 EXPORT __Vectors
57 EXPORT __Vectors_End
58 EXPORT __Vectors_Size
59
60__Vectors DCD __initial_sp ; Top of Stack
61 DCD Reset_Handler ; Reset Handler
62 DCD NMI_Handler ; NMI Handler
63 DCD HardFault_Handler ; Hard Fault Handler
64 DCD MemManage_Handler ; MPU Fault Handler
65 DCD BusFault_Handler ; Bus Fault Handler
66 DCD UsageFault_Handler ; Usage Fault Handler
67 DCD 0 ; Reserved
68 DCD 0 ; Reserved
69 DCD 0 ; Reserved
70 DCD 0 ; Reserved
71 DCD SVC_Handler ; SVCall Handler
72 DCD DebugMon_Handler ; Debug Monitor Handler
73 DCD 0 ; Reserved
74 DCD PendSV_Handler ; PendSV Handler
75 DCD SysTick_Handler ; SysTick Handler
76
77 ; External Interrupts
78 DCD WWDG_IRQHandler ; Window WatchDog
79 DCD PVD_IRQHandler ; PVD through EXTI Line detection
80 DCD TAMP_STAMP_IRQHandler ; Tamper and TimeStamps through the EXTI line
81 DCD RTC_WKUP_IRQHandler ; RTC Wakeup through the EXTI line
82 DCD FLASH_IRQHandler ; FLASH
83 DCD RCC_IRQHandler ; RCC
84 DCD EXTI0_IRQHandler ; EXTI Line0
85 DCD EXTI1_IRQHandler ; EXTI Line1
86 DCD EXTI2_IRQHandler ; EXTI Line2
87 DCD EXTI3_IRQHandler ; EXTI Line3
88 DCD EXTI4_IRQHandler ; EXTI Line4
89 DCD DMA1_Stream0_IRQHandler ; DMA1 Stream 0
90 DCD DMA1_Stream1_IRQHandler ; DMA1 Stream 1
91 DCD DMA1_Stream2_IRQHandler ; DMA1 Stream 2
92 DCD DMA1_Stream3_IRQHandler ; DMA1 Stream 3
93 DCD DMA1_Stream4_IRQHandler ; DMA1 Stream 4
94 DCD DMA1_Stream5_IRQHandler ; DMA1 Stream 5
95 DCD DMA1_Stream6_IRQHandler ; DMA1 Stream 6
96 DCD ADC_IRQHandler ; ADC1, ADC2 and ADC3s
97 DCD CAN1_TX_IRQHandler ; CAN1 TX
98 DCD CAN1_RX0_IRQHandler ; CAN1 RX0
99 DCD CAN1_RX1_IRQHandler ; CAN1 RX1
100 DCD CAN1_SCE_IRQHandler ; CAN1 SCE
101 DCD EXTI9_5_IRQHandler ; External Line[9:5]s
102 DCD TIM1_BRK_TIM9_IRQHandler ; TIM1 Break and TIM9
103 DCD TIM1_UP_TIM10_IRQHandler ; TIM1 Update and TIM10
104 DCD TIM1_TRG_COM_TIM11_IRQHandler ; TIM1 Trigger and Commutation and TIM11
105 DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare
106 DCD TIM2_IRQHandler ; TIM2
107 DCD TIM3_IRQHandler ; TIM3
108 DCD TIM4_IRQHandler ; TIM4
109 DCD I2C1_EV_IRQHandler ; I2C1 Event
110 DCD I2C1_ER_IRQHandler ; I2C1 Error
111 DCD I2C2_EV_IRQHandler ; I2C2 Event
112 DCD I2C2_ER_IRQHandler ; I2C2 Error
113 DCD SPI1_IRQHandler ; SPI1
114 DCD SPI2_IRQHandler ; SPI2
115 DCD USART1_IRQHandler ; USART1
116 DCD USART2_IRQHandler ; USART2
117 DCD USART3_IRQHandler ; USART3
118 DCD EXTI15_10_IRQHandler ; External Line[15:10]s
119 DCD RTC_Alarm_IRQHandler ; RTC Alarm (A and B) through EXTI Line
120 DCD OTG_FS_WKUP_IRQHandler ; USB OTG FS Wakeup through EXTI line
121 DCD TIM8_BRK_TIM12_IRQHandler ; TIM8 Break and TIM12
122 DCD TIM8_UP_TIM13_IRQHandler ; TIM8 Update and TIM13
123 DCD TIM8_TRG_COM_TIM14_IRQHandler ; TIM8 Trigger and Commutation and TIM14
124 DCD TIM8_CC_IRQHandler ; TIM8 Capture Compare
125 DCD DMA1_Stream7_IRQHandler ; DMA1 Stream7
126 DCD FMC_IRQHandler ; FMC
127 DCD SDIO_IRQHandler ; SDIO
128 DCD TIM5_IRQHandler ; TIM5
129 DCD SPI3_IRQHandler ; SPI3
130 DCD UART4_IRQHandler ; UART4
131 DCD UART5_IRQHandler ; UART5
132 DCD TIM6_DAC_IRQHandler ; TIM6 and DAC1&2 underrun errors
133 DCD TIM7_IRQHandler ; TIM7
134 DCD DMA2_Stream0_IRQHandler ; DMA2 Stream 0
135 DCD DMA2_Stream1_IRQHandler ; DMA2 Stream 1
136 DCD DMA2_Stream2_IRQHandler ; DMA2 Stream 2
137 DCD DMA2_Stream3_IRQHandler ; DMA2 Stream 3
138 DCD DMA2_Stream4_IRQHandler ; DMA2 Stream 4
139 DCD ETH_IRQHandler ; Ethernet
140 DCD ETH_WKUP_IRQHandler ; Ethernet Wakeup through EXTI line
141 DCD CAN2_TX_IRQHandler ; CAN2 TX
142 DCD CAN2_RX0_IRQHandler ; CAN2 RX0
143 DCD CAN2_RX1_IRQHandler ; CAN2 RX1
144 DCD CAN2_SCE_IRQHandler ; CAN2 SCE
145 DCD OTG_FS_IRQHandler ; USB OTG FS
146 DCD DMA2_Stream5_IRQHandler ; DMA2 Stream 5
147 DCD DMA2_Stream6_IRQHandler ; DMA2 Stream 6
148 DCD DMA2_Stream7_IRQHandler ; DMA2 Stream 7
149 DCD USART6_IRQHandler ; USART6
150 DCD I2C3_EV_IRQHandler ; I2C3 event
151 DCD I2C3_ER_IRQHandler ; I2C3 error
152 DCD OTG_HS_EP1_OUT_IRQHandler ; USB OTG HS End Point 1 Out
153 DCD OTG_HS_EP1_IN_IRQHandler ; USB OTG HS End Point 1 In
154 DCD OTG_HS_WKUP_IRQHandler ; USB OTG HS Wakeup through EXTI
155 DCD OTG_HS_IRQHandler ; USB OTG HS
156 DCD DCMI_IRQHandler ; DCMI
157 DCD 0 ; Reserved
158 DCD HASH_RNG_IRQHandler ; Hash and Rng
159 DCD FPU_IRQHandler ; FPU
160 DCD UART7_IRQHandler ; UART7
161 DCD UART8_IRQHandler ; UART8
162 DCD SPI4_IRQHandler ; SPI4
163 DCD SPI5_IRQHandler ; SPI5
164 DCD SPI6_IRQHandler ; SPI6
165 DCD SAI1_IRQHandler ; SAI1
166 DCD 0 ; Reserved
167 DCD 0 ; Reserved
168 DCD DMA2D_IRQHandler ; DMA2D
169
170__Vectors_End
171
172__Vectors_Size EQU __Vectors_End - __Vectors
173
174 AREA |.text|, CODE, READONLY
175
176; Reset handler
177Reset_Handler PROC
178 EXPORT Reset_Handler [WEAK]
179 IMPORT SystemInit
180 IMPORT __main
181
182 LDR R0, =SystemInit
183 BLX R0
184 LDR R0, =__main
185 BX R0
186 ENDP
187
188; Dummy Exception Handlers (infinite loops which can be modified)
189
190NMI_Handler PROC
191 EXPORT NMI_Handler [WEAK]
192 B .
193 ENDP
194HardFault_Handler\
195 PROC
196 EXPORT HardFault_Handler [WEAK]
197 B .
198 ENDP
199MemManage_Handler\
200 PROC
201 EXPORT MemManage_Handler [WEAK]
202 B .
203 ENDP
204BusFault_Handler\
205 PROC
206 EXPORT BusFault_Handler [WEAK]
207 B .
208 ENDP
209UsageFault_Handler\
210 PROC
211 EXPORT UsageFault_Handler [WEAK]
212 B .
213 ENDP
214SVC_Handler PROC
215 EXPORT SVC_Handler [WEAK]
216 B .
217 ENDP
218DebugMon_Handler\
219 PROC
220 EXPORT DebugMon_Handler [WEAK]
221 B .
222 ENDP
223PendSV_Handler PROC
224 EXPORT PendSV_Handler [WEAK]
225 B .
226 ENDP
227SysTick_Handler PROC
228 EXPORT SysTick_Handler [WEAK]
229 B .
230 ENDP
231
232Default_Handler PROC
233
234 EXPORT WWDG_IRQHandler [WEAK]
235 EXPORT PVD_IRQHandler [WEAK]
236 EXPORT TAMP_STAMP_IRQHandler [WEAK]
237 EXPORT RTC_WKUP_IRQHandler [WEAK]
238 EXPORT FLASH_IRQHandler [WEAK]
239 EXPORT RCC_IRQHandler [WEAK]
240 EXPORT EXTI0_IRQHandler [WEAK]
241 EXPORT EXTI1_IRQHandler [WEAK]
242 EXPORT EXTI2_IRQHandler [WEAK]
243 EXPORT EXTI3_IRQHandler [WEAK]
244 EXPORT EXTI4_IRQHandler [WEAK]
245 EXPORT DMA1_Stream0_IRQHandler [WEAK]
246 EXPORT DMA1_Stream1_IRQHandler [WEAK]
247 EXPORT DMA1_Stream2_IRQHandler [WEAK]
248 EXPORT DMA1_Stream3_IRQHandler [WEAK]
249 EXPORT DMA1_Stream4_IRQHandler [WEAK]
250 EXPORT DMA1_Stream5_IRQHandler [WEAK]
251 EXPORT DMA1_Stream6_IRQHandler [WEAK]
252 EXPORT ADC_IRQHandler [WEAK]
253 EXPORT CAN1_TX_IRQHandler [WEAK]
254 EXPORT CAN1_RX0_IRQHandler [WEAK]
255 EXPORT CAN1_RX1_IRQHandler [WEAK]
256 EXPORT CAN1_SCE_IRQHandler [WEAK]
257 EXPORT EXTI9_5_IRQHandler [WEAK]
258 EXPORT TIM1_BRK_TIM9_IRQHandler [WEAK]
259 EXPORT TIM1_UP_TIM10_IRQHandler [WEAK]
260 EXPORT TIM1_TRG_COM_TIM11_IRQHandler [WEAK]
261 EXPORT TIM1_CC_IRQHandler [WEAK]
262 EXPORT TIM2_IRQHandler [WEAK]
263 EXPORT TIM3_IRQHandler [WEAK]
264 EXPORT TIM4_IRQHandler [WEAK]
265 EXPORT I2C1_EV_IRQHandler [WEAK]
266 EXPORT I2C1_ER_IRQHandler [WEAK]
267 EXPORT I2C2_EV_IRQHandler [WEAK]
268 EXPORT I2C2_ER_IRQHandler [WEAK]
269 EXPORT SPI1_IRQHandler [WEAK]
270 EXPORT SPI2_IRQHandler [WEAK]
271 EXPORT USART1_IRQHandler [WEAK]
272 EXPORT USART2_IRQHandler [WEAK]
273 EXPORT USART3_IRQHandler [WEAK]
274 EXPORT EXTI15_10_IRQHandler [WEAK]
275 EXPORT RTC_Alarm_IRQHandler [WEAK]
276 EXPORT OTG_FS_WKUP_IRQHandler [WEAK]
277 EXPORT TIM8_BRK_TIM12_IRQHandler [WEAK]
278 EXPORT TIM8_UP_TIM13_IRQHandler [WEAK]
279 EXPORT TIM8_TRG_COM_TIM14_IRQHandler [WEAK]
280 EXPORT TIM8_CC_IRQHandler [WEAK]
281 EXPORT DMA1_Stream7_IRQHandler [WEAK]
282 EXPORT FMC_IRQHandler [WEAK]
283 EXPORT SDIO_IRQHandler [WEAK]
284 EXPORT TIM5_IRQHandler [WEAK]
285 EXPORT SPI3_IRQHandler [WEAK]
286 EXPORT UART4_IRQHandler [WEAK]
287 EXPORT UART5_IRQHandler [WEAK]
288 EXPORT TIM6_DAC_IRQHandler [WEAK]
289 EXPORT TIM7_IRQHandler [WEAK]
290 EXPORT DMA2_Stream0_IRQHandler [WEAK]
291 EXPORT DMA2_Stream1_IRQHandler [WEAK]
292 EXPORT DMA2_Stream2_IRQHandler [WEAK]
293 EXPORT DMA2_Stream3_IRQHandler [WEAK]
294 EXPORT DMA2_Stream4_IRQHandler [WEAK]
295 EXPORT ETH_IRQHandler [WEAK]
296 EXPORT ETH_WKUP_IRQHandler [WEAK]
297 EXPORT CAN2_TX_IRQHandler [WEAK]
298 EXPORT CAN2_RX0_IRQHandler [WEAK]
299 EXPORT CAN2_RX1_IRQHandler [WEAK]
300 EXPORT CAN2_SCE_IRQHandler [WEAK]
301 EXPORT OTG_FS_IRQHandler [WEAK]
302 EXPORT DMA2_Stream5_IRQHandler [WEAK]
303 EXPORT DMA2_Stream6_IRQHandler [WEAK]
304 EXPORT DMA2_Stream7_IRQHandler [WEAK]
305 EXPORT USART6_IRQHandler [WEAK]
306 EXPORT I2C3_EV_IRQHandler [WEAK]
307 EXPORT I2C3_ER_IRQHandler [WEAK]
308 EXPORT OTG_HS_EP1_OUT_IRQHandler [WEAK]
309 EXPORT OTG_HS_EP1_IN_IRQHandler [WEAK]
310 EXPORT OTG_HS_WKUP_IRQHandler [WEAK]
311 EXPORT OTG_HS_IRQHandler [WEAK]
312 EXPORT DCMI_IRQHandler [WEAK]
313 EXPORT HASH_RNG_IRQHandler [WEAK]
314 EXPORT FPU_IRQHandler [WEAK]
315 EXPORT UART7_IRQHandler [WEAK]
316 EXPORT UART8_IRQHandler [WEAK]
317 EXPORT SPI4_IRQHandler [WEAK]
318 EXPORT SPI5_IRQHandler [WEAK]
319 EXPORT SPI6_IRQHandler [WEAK]
320 EXPORT SAI1_IRQHandler [WEAK]
321 EXPORT DMA2D_IRQHandler [WEAK]
322
323WWDG_IRQHandler
324PVD_IRQHandler
325TAMP_STAMP_IRQHandler
326RTC_WKUP_IRQHandler
327FLASH_IRQHandler
328RCC_IRQHandler
329EXTI0_IRQHandler
330EXTI1_IRQHandler
331EXTI2_IRQHandler
332EXTI3_IRQHandler
333EXTI4_IRQHandler
334DMA1_Stream0_IRQHandler
335DMA1_Stream1_IRQHandler
336DMA1_Stream2_IRQHandler
337DMA1_Stream3_IRQHandler
338DMA1_Stream4_IRQHandler
339DMA1_Stream5_IRQHandler
340DMA1_Stream6_IRQHandler
341ADC_IRQHandler
342CAN1_TX_IRQHandler
343CAN1_RX0_IRQHandler
344CAN1_RX1_IRQHandler
345CAN1_SCE_IRQHandler
346EXTI9_5_IRQHandler
347TIM1_BRK_TIM9_IRQHandler
348TIM1_UP_TIM10_IRQHandler
349TIM1_TRG_COM_TIM11_IRQHandler
350TIM1_CC_IRQHandler
351TIM2_IRQHandler
352TIM3_IRQHandler
353TIM4_IRQHandler
354I2C1_EV_IRQHandler
355I2C1_ER_IRQHandler
356I2C2_EV_IRQHandler
357I2C2_ER_IRQHandler
358SPI1_IRQHandler
359SPI2_IRQHandler
360USART1_IRQHandler
361USART2_IRQHandler
362USART3_IRQHandler
363EXTI15_10_IRQHandler
364RTC_Alarm_IRQHandler
365OTG_FS_WKUP_IRQHandler
366TIM8_BRK_TIM12_IRQHandler
367TIM8_UP_TIM13_IRQHandler
368TIM8_TRG_COM_TIM14_IRQHandler
369TIM8_CC_IRQHandler
370DMA1_Stream7_IRQHandler
371FMC_IRQHandler
372SDIO_IRQHandler
373TIM5_IRQHandler
374SPI3_IRQHandler
375UART4_IRQHandler
376UART5_IRQHandler
377TIM6_DAC_IRQHandler
378TIM7_IRQHandler
379DMA2_Stream0_IRQHandler
380DMA2_Stream1_IRQHandler
381DMA2_Stream2_IRQHandler
382DMA2_Stream3_IRQHandler
383DMA2_Stream4_IRQHandler
384ETH_IRQHandler
385ETH_WKUP_IRQHandler
386CAN2_TX_IRQHandler
387CAN2_RX0_IRQHandler
388CAN2_RX1_IRQHandler
389CAN2_SCE_IRQHandler
390OTG_FS_IRQHandler
391DMA2_Stream5_IRQHandler
392DMA2_Stream6_IRQHandler
393DMA2_Stream7_IRQHandler
394USART6_IRQHandler
395I2C3_EV_IRQHandler
396I2C3_ER_IRQHandler
397OTG_HS_EP1_OUT_IRQHandler
398OTG_HS_EP1_IN_IRQHandler
399OTG_HS_WKUP_IRQHandler
400OTG_HS_IRQHandler
401DCMI_IRQHandler
402HASH_RNG_IRQHandler
403FPU_IRQHandler
404UART7_IRQHandler
405UART8_IRQHandler
406SPI4_IRQHandler
407SPI5_IRQHandler
408SPI6_IRQHandler
409SAI1_IRQHandler
410DMA2D_IRQHandler
411 B .
412
413 ENDP
414
415 ALIGN
416
417;*******************************************************************************
418; User Stack and Heap initialization
419;*******************************************************************************
420 IF :DEF:__MICROLIB
421
422 EXPORT __initial_sp
423 EXPORT __heap_base
424 EXPORT __heap_limit
425
426 ELSE
427
428 IMPORT __use_two_region_memory
429 EXPORT __user_initial_stackheap
430
431__user_initial_stackheap
432
433 LDR R0, = Heap_Mem
434 LDR R1, =(Stack_Mem + Stack_Size)
435 LDR R2, = (Heap_Mem + Heap_Size)
436 LDR R3, = Stack_Mem
437 BX LR
438
439 ALIGN
440
441 ENDIF
442
443 END
444
445;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE*****
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